Patent Application
20140119074
The present disclosure is related to rectifiers, and in particular, to a control system for controlling a plurality of active rectifiers.
Active rectifiers are currently used to convert AC power into DC power for driving an electrical device having a varying load, such as a motor on board an aircraft. A single active rectifier may include an active switching element that performs over a large input frequency range, e.g., 2:1, while maintaining a near unity power factor.
An active rectifier circuit may include a boost inductor to provide a steady current source to the active switching element. Based on the output of the boost inductor, the active rectifier performs at the highest power quality, i.e., operates most efficiently, when the electrical device operates at full load. However, the efficiency of the active rectifier may change as the load of the electrical device varies.
According to at least one feature the embodiments, an active rectifier system that rectifies power supplied to an electrical load comprises an output voltage detector to detect an output voltage level of an output signal supplied to the electrical load. The active rectifier system further includes a plurality of active rectifier modules configured to receive an input voltage signal. Each active rectifier module is selectively activated in response to a control signal to convert the input voltage signal into the output voltage. A control module is in electrical communication with the output voltage detector and the plurality of active rectifier modules. The control module is configured to selectively output the control signal to the plurality of active rectifier modules based on the output voltage level.
In another feature of the embodiments, a method of controlling an active rectifier system including a plurality of active rectifier modules comprises receiving a multi-phase input voltage signal to power an electrical device and performing a first signal rectification to convert the multi-phase input voltage signal into a first multi-level output voltage signal output to the electrical device. The method further includes detecting an effective output voltage level realized by the electrical device based on the first multi-level output voltage signal, and performing a second signal rectification to convert the multi-phase input voltage signal into a second multi-level output voltage signal based on the effective output voltage level and outputting the first and second multi-level output voltage signals to increase the effective output voltage level.
In yet another feature of the embodiments, a control module to interleave switching frequencies of a plurality of active rectifier modules comprises a field-programmable gate array to activate at least one active rectifier module and to generate a control signal that operates the at least one active rectifier module according to a switching period. A digital signal processor is in electrical communication with the field-programmable gate array to detect activation of first and second active rectifier modules. The digital signal processor is further configured to control field-programmable gate array to phase-shift the switching times of the first and second active rectifier modules and increase an effective output voltage generated by the first and second active rectifier modules.
The subject matter of embodiments of the disclosure is particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features of the disclosure are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
The multichannel active rectifier system 100 further includes a plurality of power stages, i.e., active rectifier modules 104 and a main control module 106 that controls the active rectifier modules 104. In at least one embodiment of the disclosure, the active rectifier modules 104 are electrically connected in parallel with one another, as further illustrated in
More specifically, the main control module 106 is configured to control operation of the plurality of active rectifier modules 104 based on the power and/or a load of the multichannel active rectifier system 100. In at least one embodiment of the disclosure, the main control module 106 may include a field-programmable gate array (FPGA) 116 and a digital signal processor (DSP) 118. The FPGA 116 generates a switching signal that controls the switching of the power switching unit 110 of a respective active rectifier module 104. The DSP 118 determines the power and/or load of the multichannel active rectifier system 100. For example, the DSP 118 may determine the regulated power at the DC bus 103 based on the power consumed by the electrical load 102. The DSP 119 may also determine the power output from each active rectifier module 104 with respect to a maximum power output threshold of each active rectifier module 104.
In at least one embodiment, the DC output voltage at the DC bus 103 may be set to a voltage to be provided to the electrical load 102. The DC output voltage realized by the electrical load 102 may be fed back to the main control module 106. One or more active rectifier modules 104 operate to regulate the DC output voltage at the DC bus 103 once the power drawn from the electrical load 102 exceeds a minimum operating value. The operating value may be calculated based on power measured in the active rectifier modules 104, as discussed in greater detail below. Based on the DC bus voltage, the DSP 118 may output a control signal to the FPGA 116 instructing which active rectifier module 104 to activate among the plurality of active rectifier modules 104. The FPGA 116 receives the control signal and outputs the switching signal corresponding to one or more respective active rectifier modules 104. The switching signal controls the switching operation, i.e., the switching, of the power switching unit 110 such that the DC bus voltage at the DC bus 103 is achieved. Although the DSP 118 has been described as activating one or more active rectifier modules 114, it can be appreciated that the DSP 118 may activate different active rectifier modules 104 at random. For example, in a first operation of the multichannel active rectifier system 100, a first set of active rectifier modules 104 may be activated to convert the AC signal into the DC signal. However, in a second operation of the system 100, a second set of active rectifier modules 104 different from the first set may activated to convert the AC signal into the DC signal. This may prevent over-use of particular active rectifier modules 104, thereby prolonging the life of the system 100.
In addition, it can be appreciated that the DSP 118 may deactivate all of the active rectifier modules 104 when the electrical device 102 applies a light load, i.e., when the load applied by the electrical device is less than a threshold value. Accordingly, the multichannel active rectifier system 100 performs a passive rectification to lower the link voltage. As the load increases, however, the DSP 118 may activate a minimum number of active rectifier modules 114 capable of supplying a sufficient amount of power required by the electrical device 102 as discussed in detail above. Once the maximum power output capability of the minimum number of activated rectifier modules 104 is reached, the DSP 118 outputs a control signal to the FPGA 116 to activate an additional active rectifier module 104.
In an embodiment of the disclosure, the DSP 118 may determine the number of rectifiers modules 104 to activate based on a maximum output threshold of a respective active rectifier module 104. In at least one embodiment, each active rectifier 104 may have a maximum output threshold of 5 kilowatts (kW). The output threshold is not limited, however, to 5 kW. If the DC output voltage realized by the electrical load 102 exceeds a maximum threshold value of the one or more previously activated rectifier modules 104, the DSP 118 may determine that an additional rectifier module 104 should be activated simultaneously with the one or more previously activated active rectifier modules 104. Accordingly, a minimum number of active rectifier modules 104 may be activated such that the active rectifier modules 104 operate near full load capacity more often thereby providing the most efficient power quality performance to the system 100.
The DSP 118 may further be configured to shift the switching times after two or more active rectifier modules 104 are activated such that the switching frequencies of the active rectifier modules 104 are interleaved. A series of wave diagrams showing a relationship between switching times of a plurality of operating active rectifier modules 104 are illustrated in
The DSP 118 may control the FPGA 116 to shift the switching times by adjusting a phase shift of the active rectifier modules 104. For example, if two active rectifier modules 104 are enabled, a first switching period of a first rectifier module 104 may be phase-shifted, i.e., shifted in time, with respect to a second switching period of a second rectifier module 104. The DSP 118 may determine the phase shift according to the full switching period (e.g., 360 degrees) and the number of enabled active rectifier modules 104. That is, the phase-shift between the first and second active rectifier modules 104 may be determined as: 360 degrees/2 enabled active rectifier modules=180 degrees, as illustrated in
Referring again to
The EMI filter unit 122 may be disposed between the contactor module 120 and the main control module 106, and is configured to reduce common mode and differential conducted emissions from the multichannel active rectifier system 100. The EMI filter unit 122 may be a passive or active filter unit, and may include one or more filtering elements, such as a transistor, a MOSFET, a diode, a resistor-capacitor circuit, a resistor-inductor circuit, or a combination thereof Further, the EMI filter 122 may comprise a single pole filtering element or a multi-pole filtering element. As mentioned above, an effective switching frequency realized by the EMI filter 122 may be increased by interleaving the individual switching frequencies of two or more operating active rectifier modules 104. As a result, the overall dimensions of the EMI filter 122 may be reduced, and switching losses may be decreased.
Referring now to
The active rectifier module 104 includes the power switching device 110 and the corresponding boost inductor 108. The power switching device 110 may comprises, for example, a multi-level active rectifier that converts three-phase AC power (Vas, Vbs, Vcs) to multi-level DC output power at the DC bus 103. The multi-level DC output power may include a positive DC voltage potential (+DC), a negative DC voltage potential (−DC), and a mid-point voltage (Vm), i.e., a return voltage. The active rectifier module may comprise a plurality of solid-state switching devices illustrated here for the sake of simplicity as single-pole, multiple-throw switches 51, S2, S3 that selectively connect each phase of AC input to one of the plurality of DC outputs. In at least one embodiment, each switch S1, S2, S3 may include a plurality of solid-state switches configured to provide an AC input, i.e., Va, Vb, Vc to one of the plurality of DC outputs (e.g., +DC, −DC, Vm). The boost inductor 108 may include a plurality of inductors 109 (i.e., La, Lb, Lc) in electrical communication with the main control module 106 to provide a current source. Each inductor La, Lb, Lc provides a current that drives a respective switching S1, S2, S3 of the power switching device 110.
The active rectifier module 104 further includes a voltage sensor 111 and a one or more current sensors 113. The voltage sensor determines the DC output voltage realized by the electrical load 102 (RL), and outputs the DC output voltage to the main control module 106. In at least one embodiment, DC output voltage Vc1, Vc2 may be detected across capacitors C1 and C2, respectively, and fed back to the main control module 106 as illustrated in
The main control module 106 comprises a phase/frequency detector 128, a current regulator 130, a voltage regulator 132, and a power transform module 134. The phase/frequency detector 128 monitors AC input voltage Vas, Vbs, Vcs supplied to active rectifier module 104 and determines AC input phase θ and frequency ω information based on the AC input voltage Vas, Vbs, Vcs. In addition, the phase/frequency detector 128 samples the AC input voltage Vas, Vbs, Vcs at a frequency greater than the frequency of the AC input voltage, e.g., ten times greater. Although phase/frequency detector 128 is illustrated as sampling the AC input voltage Vas, Vbs, Vcs, the sampling may be executed by the FPGA 116 or the DSP 118 included in the main control module 106.
The current regulator 130 receives the phase θ and frequency ω information from the phase/frequency detector 128. Based on the phase θ0 and frequency ω information, the current regulator 130 calculates current feedback signals (Id_Fdbk, Iq_Fdbk) in the active rectifier module. These feedback signals are processed according to a proportional-integral (P-I) algorithm, along with the commanded currents (Id_Cmd, Iq_Cmd) to generate voltage control signals (Vq, Vd) that are output to the power transform module 134.
The power transform module 134 utilizes the phase θ and frequency ω information to convert Vq, Vd provided by current regulator 130 from a two-phase d,q reference frame to a three-phase a,b,c reference frame (e.g., Vs1, Vs2, Vs3, representing pulse-width modulated (PWM) duty cycle command signals provided to the switching component, i.e., S1, S2, S3, of the active rectifier module 104. In at least one embodiment, the duty cycle information calculated by the power transform module 134 is synchronized with updated phase information θ provided by phase/frequency detector 128, such that each calculation is made with a most recent estimate of phase information θ from the phase/frequency detector 128.
The voltage regulator 132 monitors the DC output voltages Vc1, Vc2 provided across capacitors C1 and C2, respectively, and compares Vc1, Vc2 to a reference value. The error, i.e., difference, between the monitored DC output voltages and the reference value, is provided as an input to the current regulator 130. The current regulator 130 controls a d-axis current (id) to be zero amps, which maintains unity power factor of the system. The q-axis current (iq) is set by the voltage regular 132. Accordingly, the current regulator 130 generates control signals provided to the power transform module 134 to control the DC output voltage at the electrical load 102 (RL). Thus, the currents ia, ib, is may be shifted in-phase with the monitored voltage as indicated by the phase and frequency information θ, ω provided by phase/frequency detector 128. In particular, phase information θ is employed by the current regulator 130 to transform the monitored currents from the three-phase a,b,c reference frame to a two-phase d,q reference frame. The frequency information ω is utilized by the current regulator 130 to decouple the d,q phase currents as part of d,q proportional-integral (P-I) control loops provided within current regulator 130. In response to these inputs, the current regulator 130 calculates duty cycle voltage commands generated with respect to the two-phase d,q reference frame, Vq, Vd, which are utilized by the power transform module 134. Accordingly, improved accuracy of phase information provided by phase/frequency detector 128 improves the power factor correction provided by current regulator 130, thereby reducing the EMI associated with active rectifier module 104.
As discussed above, the power transform module 134 receives duty cycle command instructions (Vq, Vd) from current regulator 130, and in response generates the duty cycle command signals, such as PWM signals, that are supplied to each of the solid-state switching components, i.e., 51, S2, S3, included power switching device 110. The conversion of duty cycle command instructions Vq, Vd from the two-phase phase d,q reference frame to the three-phase a,b,c reference frame Vs1, Vs2, Vs3 is based, in part, on the accuracy of the phase information provided by phase/frequency detector 128. By improving the accuracy of the phase θ and frequency ω information, the magnitude of current harmonics (e.g., 2nd, 3rd, 4th, etc.) may be reduced, thereby improving EMI performance of the multichannel active rectifier control system 100.
Referring now to
However, if the output exceeds the threshold of the enabled active rectifier module, an additional active rectifier module is activated at operation 410. Accordingly, the three-phase AC voltage signal is converted into the at least one DC output using both the at least one active rectifier module, i.e., the previously enabled active rectifier module, and the additional active rectifier module. At operation 412, the switching times of the at least one active rectifier module and the additional active rectifier module are adjusted such that the respective switching frequencies are interleaved. At operation 414, a determination as to whether the electrical device 414 is disconnected. If the electrical device is not disconnected, the AC power continues to be actively rectified using the enabled active rectifiers at operation 406. Otherwise, the three-phase AC voltage signal is disconnected at operation 416, and the method ends.
While the disclosure is described in detail in connection with various embodiments, it should be readily understood that the present disclosure is not limited to such disclosed embodiments. Rather, the embodiments can be modified to incorporate any number of variations, alterations, substitutions or equivalent arrangements not heretofore described, but which are commensurate with the spirit and scope of the present teachings. Additionally, while various embodiments of the disclosure have been presented, it is to be understood that only some features of the embodiments may be described. Accordingly, the embodiments are not to be seen as limited by the foregoing description.
