This application generally relates to an optical element for performing deconvolution.
Electronic devices, such as mobile phones, tablet computers, smartwatches, and so forth, often include one or more image sensors, such as a camera, that can capture images. For example, a personal electronic device may include one or more cameras on the rear, or back, of the device; may include one or more cameras on the front of the device; and may include one or more cameras oriented in other arrangements on the device.
An image taken by a camera, such as by a camera of an electronic device, may be degraded (or blurred) relative to the scene represented by the image due to a number of factors, such as interactions, obstructions, etc. that occur as light from the scene travels to the camera's sensor that captures the image. Degradation may be determined or represented by point-spread functions (PSFs) that describes the response of the camera's imaging system to various point sources, and a PSF may represent an amount of blurring that is present in an image of a point source. A set of PSFs may be used to construct an un-degraded, or de-blurred, image via deconvolution.
Images captured by an image sensor of an electronic device may be blurred for a variety of reasons. For example, a front-facing camera may be disposed under a display (or another surface) of a personal electronic device, for example to decrease the camera's footprint on the surface of the device and to increase the useable surface of the device. As an example, placing a front-facing camera behind a display of an electronic device may increase the size of the device's display. However, disposing the front-facing camera system behind the display panel may degrade images captured by the front-facing camera, for example because of interference caused by the display structure as light passes through the display to the camera sensor, as described more fully below.
One or more PSF measurements can be performed to characterize the degradation of an image captured by an image sensor, such as an under-display camera. Each PSF may be a function of the source's wavelength, distance, and angle with the optical axis with respect to the camera's sensor. The set of PSFs are then used to reconstruct an undegraded image via deconvolution, for example by convolving the blurred image with the inverse PSFs. The deconvolution is typically performed as a computational, numerical process by a computing device, such as by a processor of a computing device. Deconvolution calculations consume system resources, such as power, memory, and available processing capabilities, and for a device to perform deconvolution computationally the device must have the minimum capabilities, such as processing capabilities, necessary to perform the computations.
In contrast, embodiments of this disclosure perform deconvolution in the optical domain by using one or more physical optical elements designed to deblur images. The physical optical element optically performs deconvolution by manipulating the light that reaches a camera's sensor, and therefore requires little or no computation to be performed by the device in order to de-blur an image. Embodiments of this disclosure therefore reduce systems cost, computational requirements, power budget, and the time required for image reconstruction. Moreover, embodiments discloses herein enable deconvolution techniques to be performed by lightweight devices that do not have the computational resources necessary to perform deconvolution.
As shown in the example of
While the example of
At step 220, the method of
At step 240, the method of
Particular embodiments may repeat one or more steps of the method of
The multi-wavelength phase modulation field Φ can be used to design and fabricate a physical corrective optical element, which in particular embodiments may occur after simulation studies are used to test and validate Φ. A physical corrective optical element that deblurs distortion caused by, e.g., the layers of a device's display can be physically generated from the multi-wavelength phase modulation field Φ by any of a variety of different fabrication methods known in the field, including, for example binary amplitude masks, phase masks, kinoforms, freeform holographic optical elements, metalenses, etc.
Once the physical optical element is fabricated from the multi-wavelength phase modulation field Φ, the optical element can be disposed in a device at the location of the corrective mask plane described above. The device can then perform image deconvolution using the fabricated optical element, without having to deconvolve the images computationally.
This disclosure contemplates that a corrective optical element may be disposed in any suitable location in a device. For example,
Moreover, while examples in this disclosure relate to deconvolution and image capture of visible light, this disclosure contemplates that the optical elements described herein may be applied to other spectrums. For example, a depth sensor may sense electromagnetic waves in a spectrum that includes UV radiation or infrared radiation, or both, and an optical element may be fabricated for the depth sensor by, for example, including wavelengths in those spectrums in steps 210 and 220 of the example method of
This disclosure contemplates any suitable number of computer systems 500. This disclosure contemplates computer system 500 taking any suitable physical form. As example and not by way of limitation, computer system 500 may be an embedded computer system, a system-on-chip (SOC), a single-board computer system (SBC) (such as, for example, a computer-on-module (COM) or system-on-module (SOM)), a desktop computer system, a laptop or notebook computer system, an interactive kiosk, a mainframe, a mesh of computer systems, a mobile telephone, a personal digital assistant (PDA), a server, a tablet computer system, or a combination of two or more of these. Where appropriate, computer system 500 may include one or more computer systems 500; be unitary or distributed; span multiple locations; span multiple machines; span multiple data centers; or reside in a cloud, which may include one or more cloud components in one or more networks. Where appropriate, one or more computer systems 500 may perform without substantial spatial or temporal limitation one or more steps of one or more methods described or illustrated herein. As an example and not by way of limitation, one or more computer systems 500 may perform in real time or in batch mode one or more steps of one or more methods described or illustrated herein. One or more computer systems 500 may perform at different times or at different locations one or more steps of one or more methods described or illustrated herein, where appropriate.
In particular embodiments, computer system 500 includes a processor 502, memory 504, storage 506, an input/output (I/O) interface 508, a communication interface 510, and a bus 512. Although this disclosure describes and illustrates a particular computer system having a particular number of particular components in a particular arrangement, this disclosure contemplates any suitable computer system having any suitable number of any suitable components in any suitable arrangement.
In particular embodiments, processor 502 includes hardware for executing instructions, such as those making up a computer program. As an example and not by way of limitation, to execute instructions, processor 502 may retrieve (or fetch) the instructions from an internal register, an internal cache, memory 504, or storage 506; decode and execute them; and then write one or more results to an internal register, an internal cache, memory 504, or storage 506. In particular embodiments, processor 502 may include one or more internal caches for data, instructions, or addresses. This disclosure contemplates processor 502 including any suitable number of any suitable internal caches, where appropriate. As an example and not by way of limitation, processor 502 may include one or more instruction caches, one or more data caches, and one or more translation lookaside buffers (TLBs). Instructions in the instruction caches may be copies of instructions in memory 504 or storage 506, and the instruction caches may speed up retrieval of those instructions by processor 502. Data in the data caches may be copies of data in memory 504 or storage 506 for instructions executing at processor 502 to operate on; the results of previous instructions executed at processor 502 for access by subsequent instructions executing at processor 502 or for writing to memory 504 or storage 506; or other suitable data. The data caches may speed up read or write operations by processor 502. The TLBs may speed up virtual-address translation for processor 502. In particular embodiments, processor 502 may include one or more internal registers for data, instructions, or addresses. This disclosure contemplates processor 502 including any suitable number of any suitable internal registers, where appropriate. Where appropriate, processor 502 may include one or more arithmetic logic units (ALUs); be a multi-core processor; or include one or more processors 502. Although this disclosure describes and illustrates a particular processor, this disclosure contemplates any suitable processor.
In particular embodiments, memory 504 includes main memory for storing instructions for processor 502 to execute or data for processor 502 to operate on. As an example and not by way of limitation, computer system 500 may load instructions from storage 506 or another source (such as, for example, another computer system 500) to memory 504. Processor 502 may then load the instructions from memory 504 to an internal register or internal cache. To execute the instructions, processor 502 may retrieve the instructions from the internal register or internal cache and decode them. During or after execution of the instructions, processor 502 may write one or more results (which may be intermediate or final results) to the internal register or internal cache. Processor 502 may then write one or more of those results to memory 504. In particular embodiments, processor 502 executes only instructions in one or more internal registers or internal caches or in memory 504 (as opposed to storage 506 or elsewhere) and operates only on data in one or more internal registers or internal caches or in memory 504 (as opposed to storage 506 or elsewhere). One or more memory buses (which may each include an address bus and a data bus) may couple processor 502 to memory 504. Bus 512 may include one or more memory buses, as described below. In particular embodiments, one or more memory management units (MMUs) reside between processor 502 and memory 504 and facilitate accesses to memory 504 requested by processor 502. In particular embodiments, memory 504 includes random access memory (RAM). This RAM may be volatile memory, where appropriate Where appropriate, this RAM may be dynamic RAM (DRAM) or static RAM (SRAM). Moreover, where appropriate, this RAM may be single-ported or multi-ported RAM. This disclosure contemplates any suitable RAM. Memory 504 may include one or more memories 504, where appropriate. Although this disclosure describes and illustrates particular memory, this disclosure contemplates any suitable memory.
In particular embodiments, storage 506 includes mass storage for data or instructions. As an example and not by way of limitation, storage 506 may include a hard disk drive (HDD), a floppy disk drive, flash memory, an optical disc, a magneto-optical disc, magnetic tape, or a Universal Serial Bus (USB) drive or a combination of two or more of these. Storage 506 may include removable or non-removable (or fixed) media, where appropriate. Storage 506 may be internal or external to computer system 500, where appropriate. In particular embodiments, storage 506 is non-volatile, solid-state memory. In particular embodiments, storage 506 includes read-only memory (ROM). Where appropriate, this ROM may be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), electrically alterable ROM (EAROM), or flash memory or a combination of two or more of these. This disclosure contemplates mass storage 506 taking any suitable physical form. Storage 506 may include one or more storage control units facilitating communication between processor 502 and storage 506, where appropriate. Where appropriate, storage 506 may include one or more storages 506. Although this disclosure describes and illustrates particular storage, this disclosure contemplates any suitable storage.
In particular embodiments, I/O interface 508 includes hardware, software, or both, providing one or more interfaces for communication between computer system 500 and one or more I/O devices. Computer system 500 may include one or more of these I/O devices, where appropriate. One or more of these I/O devices may enable communication between a person and computer system 500. As an example and not by way of limitation, an I/O device may include a keyboard, keypad, microphone, monitor, mouse, printer, scanner, speaker, still camera, stylus, tablet, touch screen, trackball, video camera, another suitable I/O device or a combination of two or more of these. An I/O device may include one or more sensors. This disclosure contemplates any suitable I/O devices and any suitable I/O interfaces 508 for them. Where appropriate, I/O interface 508 may include one or more device or software drivers enabling processor 502 to drive one or more of these I/O devices. I/O interface 508 may include one or more I/O interfaces 508, where appropriate. Although this disclosure describes and illustrates a particular I/O interface, this disclosure contemplates any suitable I/O interface.
In particular embodiments, communication interface 510 includes hardware, software, or both providing one or more interfaces for communication (such as, for example, packet-based communication) between computer system 500 and one or more other computer systems 500 or one or more networks. As an example and not by way of limitation, communication interface 510 may include a network interface controller (NIC) or network adapter for communicating with an Ethernet or other wire-based network or a wireless NIC (WNIC) or wireless adapter for communicating with a wireless network, such as a WI-FI network. This disclosure contemplates any suitable network and any suitable communication interface 510 for it. As an example and not by way of limitation, computer system 500 may communicate with an ad hoc network, a personal area network (PAN), a local area network (LAN), a wide area network (WAN), a metropolitan area network (MAN), or one or more portions of the Internet or a combination of two or more of these. One or more portions of one or more of these networks may be wired or wireless. As an example, computer system 500 may communicate with a wireless PAN (WPAN) (such as, for example, a BLUETOOTH WPAN), a WI-FI network, a WI-MAX network, a cellular telephone network (such as, for example, a Global System for Mobile Communications (GSM) network), or other suitable wireless network or a combination of two or more of these. Computer system 500 may include any suitable communication interface 510 for any of these networks, where appropriate. Communication interface 510 may include one or more communication interfaces 510, where appropriate. Although this disclosure describes and illustrates a particular communication interface, this disclosure contemplates any suitable communication interface.
In particular embodiments, bus 512 includes hardware, software, or both coupling components of computer system 500 to each other. As an example and not by way of limitation, bus 512 may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a front-side bus (FSB), a HYPERTRANSPORT (HT) interconnect, an Industry Standard Architecture (ISA) bus, an INFINIBAND interconnect, a low-pin-count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCIe) bus, a serial advanced technology attachment (SATA) bus, a Video Electronics Standards Association local (VLB) bus, or another suitable bus or a combination of two or more of these. Bus 512 may include one or more buses 512, where appropriate. Although this disclosure describes and illustrates a particular bus, this disclosure contemplates any suitable bus or interconnect.
Herein, a computer-readable non-transitory storage medium or media may include one or more semiconductor-based or other integrated circuits (ICs) (such, as for example, field-programmable gate arrays (FPGAs) or application-specific ICs (ASICs)), hard disk drives (HDDs), hybrid hard drives (HHDs), optical discs, optical disc drives (ODDs), magneto-optical discs, magneto-optical drives, floppy diskettes, floppy disk drives (FDDs), magnetic tapes, solid-state drives (SSDs), RAM-drives, SECURE DIGITAL cards or drives, any other suitable computer-readable non-transitory storage media, or any suitable combination of two or more of these, where appropriate. A computer-readable non-transitory storage medium may be volatile, non-volatile, or a combination of volatile and non-volatile, where appropriate.
Herein, “or” is inclusive and not exclusive, unless expressly indicated otherwise or indicated otherwise by context. Therefore, herein, “A or B” means “A, B, or both,” unless expressly indicated otherwise or indicated otherwise by context. Moreover, “and” is both joint and several, unless expressly indicated otherwise or indicated otherwise by context. Therefore, herein, “A and B” means “A and B, jointly or severally,” unless expressly indicated otherwise or indicated otherwise by context.
The scope of this disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments described or illustrated herein that a person having ordinary skill in the art would comprehend. The scope of this disclosure is not limited to the example embodiments described or illustrated herein. Moreover, although this disclosure describes and illustrates respective embodiments herein as including particular components, elements, feature, functions, operations, or steps, any of these embodiments may include any combination or permutation of any of the components, elements, features, functions, operations, or steps described or illustrated anywhere herein that a person having ordinary skill in the art would comprehend.
This application claims the benefit under 35 U.S.C. 119 of U.S. Provisional Patent Application No. 63/255,819 filed Oct. 14, 2021, the entirety of which is incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
3971065 | Bayer | Jul 1976 | A |
6454414 | Ting | Sep 2002 | B1 |
7053613 | Lin | May 2006 | B2 |
8041142 | Schafer | Oct 2011 | B2 |
8433152 | Watanabe | Apr 2013 | B2 |
8582911 | Kim | Nov 2013 | B2 |
8587703 | Lelescu | Nov 2013 | B2 |
9220481 | Park | Dec 2015 | B2 |
9338354 | Hong | May 2016 | B2 |
9582862 | Zhang | Feb 2017 | B2 |
9654707 | Oniki | May 2017 | B2 |
9911208 | Zhou | Mar 2018 | B2 |
9916656 | Choi | Mar 2018 | B2 |
9947901 | Shedletsky | Apr 2018 | B2 |
9948849 | Kim | Apr 2018 | B2 |
10032254 | Harmeling | Jul 2018 | B2 |
10062153 | Oniki | Aug 2018 | B2 |
10083335 | Zhang | Sep 2018 | B2 |
10151933 | Siddiqui | Dec 2018 | B2 |
10178381 | Hall | Jan 2019 | B2 |
10191577 | Choi | Jan 2019 | B2 |
10217190 | Liu | Feb 2019 | B2 |
10416087 | Zhang | Sep 2019 | B2 |
10595724 | Lai | Mar 2020 | B2 |
10642059 | Soskind | May 2020 | B2 |
10656437 | Limon | May 2020 | B2 |
11003088 | Sorg | May 2021 | B2 |
11038143 | Moon | Jun 2021 | B2 |
11073712 | Yeke Yazdandoost | Jul 2021 | B2 |
11272106 | Lee | Mar 2022 | B1 |
11575865 | Liu | Feb 2023 | B2 |
11721001 | Liu | Aug 2023 | B2 |
11792515 | Lee | Oct 2023 | B2 |
20030002746 | Kusaka | Jan 2003 | A1 |
20060103951 | Bell | May 2006 | A1 |
20060256226 | Alon | Nov 2006 | A1 |
20080013850 | Sakurai | Jan 2008 | A1 |
20080068660 | Lace | Mar 2008 | A1 |
20080165261 | Kamo | Jul 2008 | A1 |
20080166115 | Sachs | Jul 2008 | A1 |
20080218597 | Cho | Sep 2008 | A1 |
20080292135 | Schafer | Nov 2008 | A1 |
20090147111 | Litvinov | Jun 2009 | A1 |
20090263043 | Cristobal | Oct 2009 | A1 |
20100073518 | Yeh | Mar 2010 | A1 |
20100188528 | Iwata | Jul 2010 | A1 |
20110019056 | Hirsch | Jan 2011 | A1 |
20110075257 | Hua | Mar 2011 | A1 |
20110158541 | Watanabe | Jun 2011 | A1 |
20110221888 | Choi | Sep 2011 | A1 |
20110285680 | Nakamura | Nov 2011 | A1 |
20120057072 | Yamashita | Mar 2012 | A1 |
20120162490 | Chung | Jun 2012 | A1 |
20120327277 | Myhrvold | Dec 2012 | A1 |
20130010077 | Nguyen | Jan 2013 | A1 |
20130147778 | Ninan | Jun 2013 | A1 |
20130182062 | Son | Jul 2013 | A1 |
20130308007 | Tanaka | Nov 2013 | A1 |
20130321686 | Tan | Dec 2013 | A1 |
20130336597 | Maeda | Dec 2013 | A1 |
20140044314 | Sezer | Feb 2014 | A1 |
20150049165 | Choi | Feb 2015 | A1 |
20150101411 | Zalev | Apr 2015 | A1 |
20150207962 | Sugimoto | Jul 2015 | A1 |
20150338639 | Mtsumoto | Nov 2015 | A1 |
20160062100 | Cohen | Mar 2016 | A1 |
20160180510 | Grau | Jun 2016 | A1 |
20160248975 | Choi | Aug 2016 | A1 |
20160277658 | Kim | Sep 2016 | A1 |
20160371821 | Hayashi | Dec 2016 | A1 |
20170076430 | Xu | Mar 2017 | A1 |
20170104897 | Kang | Apr 2017 | A1 |
20170212613 | Hwang | Jul 2017 | A1 |
20170316552 | Hanocka | Nov 2017 | A1 |
20180038768 | Hofmann | Feb 2018 | A1 |
20180052050 | Menon | Feb 2018 | A1 |
20180116500 | Escalier | May 2018 | A1 |
20180129061 | Shinohara | May 2018 | A1 |
20180198980 | Takagi | Jul 2018 | A1 |
20180211420 | Yoo | Jul 2018 | A1 |
20190212544 | Heber | Jul 2019 | A1 |
20190213717 | Oniki | Jul 2019 | A1 |
20190327417 | Moriuchi | Oct 2019 | A1 |
20190355101 | Chen | Nov 2019 | A1 |
20200159102 | Kouyama | May 2020 | A1 |
20200166807 | Sasaki | May 2020 | A1 |
20200169725 | Hua | May 2020 | A1 |
20200209604 | Chen | Jul 2020 | A1 |
20200321561 | Park | Oct 2020 | A1 |
20200389575 | Gove | Dec 2020 | A1 |
20200394964 | Hyun | Dec 2020 | A1 |
20210029336 | Liu | Jan 2021 | A1 |
20210136335 | Tanaka | May 2021 | A1 |
20210152735 | Zhou | May 2021 | A1 |
20210193756 | Oh | Jun 2021 | A1 |
20210199952 | Cho | Jul 2021 | A1 |
20210210533 | Cho | Jul 2021 | A1 |
20210233976 | Lee | Jul 2021 | A1 |
20210302316 | Walter | Sep 2021 | A1 |
20220067889 | Kang | Mar 2022 | A1 |
20220086309 | Kim | Mar 2022 | A1 |
20220138924 | Kwon | May 2022 | A1 |
20220261966 | Liu | Aug 2022 | A1 |
20220277426 | Vyas | Sep 2022 | A1 |
20220292637 | Huang | Sep 2022 | A1 |
20230341264 | Houck | Oct 2023 | A1 |
Number | Date | Country |
---|---|---|
101414094 | Apr 2009 | CN |
112202991 | Jan 2021 | CN |
113 053 253 | Jun 2021 | CN |
1113 067 961 | Jul 2021 | CN |
108335268 | Sep 2021 | CN |
114331886 | Apr 2022 | CN |
110675347 | May 2022 | CN |
2008-070566 | Mar 2008 | JP |
2019-068378 | Apr 2019 | JP |
6652052 | Feb 2020 | JP |
101894391 | Sep 2018 | KR |
10-2022-0014764 | Feb 2022 | KR |
WO 2010081229 | Jul 2010 | WO |
WO 2016-154392 | Sep 2016 | WO |
WO 2017117152 | Jul 2017 | WO |
WO 2021122471 | Jun 2021 | WO |
WO 2022-005157 | Jan 2022 | WO |
Entry |
---|
Notice of Allowance in U.S. Appl. No. 17/380,995, Dec. 21, 2022. |
PCT Search Report and Written Opinion in PCT/KR2022/015641, Jan. 26, 2023. |
International Search Report and Written Opinion for International Application No. PCT/KR2023/007313, Aug. 30, 2023. |
Image Restoration for Under-Display Camera, Yuqian Zhou et al., CVPR 2021, accessed on Oct. 25, 2022 at https://openaccess.thecvf.com/CVPR2021?day=all. |
Notice of Allowance in U.S. Appl. No. 17/176,535, Mar. 8, 2023. |
Anqi Yang et al., 'Designing Display Pixel Layouts for Under-Panel Cameras', IEEE Transactions on Pattern Analysis and Machine Intelligence, vol. 43, No. 7, pp. 2245-2256, Apr. 27, 2021. |
PCT Search Report and Written Decision in PCT/KR2022/011598, Nov. 16, 2022. |
Final Office Action in U.S. Appl. No. 17/176,535, Nov. 7, 2022. |
Levin, A. et al., “Image and Depth from a Conventional Camera with a Coded Aperture,” ACM Transactions on Graphics, vol. 26, No. 3, Article 70, Publication date Jul. 2007, DOI 10.1145/1239451.123952, http://doi.acm.org/10.1145/1239451.1239521, 9 pgs. |
Hong, J., et al., “Three-dimensional display technologies of recent interest: principles, status, and issues [Invited],” (Doc. ID 152226), Applied Optics, vol. 50, No. 34, , Dec. 1, 2011, https://www.researchgate.net/publication/51919272, DOI: 10.1364/A0.50.000H87, 0003-6935/11/340H87, © 2011 Optical Society of America, pp. H87-H115 (30 pages). |
Ren, Ng, “Digital light field photography,” PhD dissertation, Stanford University, Jul. 2006, 203 pgs. |
Qin, Zong, et al., “See-Through Image Blurring of Transparent Organic Light-Emitting Diodes Display: Calculation Method Based on Diffraction and Analysis of Pixel Structures,” Journal of Display Technology, vol. 12, No. 11, Nov. 2016, Digital Object Identifier 10.1109/JDT.2016.2594815, 1551-319X © 2016 IEEE, pp. 1242-1249 (9 pgs). |
Richardson, William Hadley, “Bayesian-Based Iterative Method of Image Restoration,” Journal of Optical Society of America, vol. 62, No. 1, Jan. 1972, pp. 55-59 (5 pgs). |
Lucy, L. B., “An Iterative Technique for the Rectification of Observed Distributions,” The Astronomical Journal, vol. 79, No. 6, Jun. 1974, © American Astronomical Society, provided by the NASA Astrophysics Data System, pp. 745-754 (10 pgs). |
Heide, Felix, et al., “ProxImaL: Efficient Image Optimization Using Proximal Algorithms,” SIGGRAPH 16 Technical paper, Jul. 24-28, 2016, Anaheim, CA. SIGGRAPH '16 Technical Paper, Jul. 24-28, 2016, Anaheim, CA, ISBN: 978-1-4503-4279-Jul. 16, 07 DOI: http://dx.doi.org/10.1145/2897824.2925875, 15 pages. |
Sitzmann, Vincent., et al., “End-to-End Optimization of Optics and Image Processing for Achromatic Extended Depth of Field and Super-Resolution Imaging,” © 2018 ACM 0730-0301/2018/8-ART114, https://doi.org/10.1145/3197517.3201333, ACM Transactions on Graphics vol. 37, No. 4, Article 114, Publication Aug. 2018, pp. 114:1-114: 13 (13 pgs.). |
Lai, Richard, “Oppo's under-screen camera is real and taking photos in Shanghai,” https://www.engadget.com/2019-06-26-oppo-under-screen-camera-mwc-shanghai.html, Jun. 26, 2019, 8 pgs. |
International Search Report and Written Opinion for International App. No. PCT/KR2020/009807, Oct. 26, 2020. |
European Search Report in EP 20846484.2, Mar. 14, 2022. |
Non-Final Office Action in U.S. Appl. No. 16/935,946, Apr. 5, 2022. |
Notice of Allowance in U.S. Appl. No. 16/935,946, Jul. 6, 2022. |
PCT Search Report and Written Decision in PCT/KR2022/001920, May 13, 2022. |
Non-Final Office Action in U.S. Appl. No. 17/176,535, Mar. 7, 2022. |
Yang, Hang, Zhongbo Zhang, and Yujing Guan. “An adaptive parameter estimation for guided filter based image deconvolution.” Signal Processing 138 (Mar. 7, 2017): 16-26. |
Youmaran, R., and A. Adler. “Combining regularization frameworks for image deblurring: optimization of combined hyper-parameters.” In Canadian Conference on Electrical and Computer Engineering 2004 (IEEE Cat. No. 04CH37513), vol. 2, pp. 723-726. IEEE, May 2, 2004. |
Non-Final Office Action in U.S. Appl. No. 17/380,995, Jun. 22, 2022. |
PCT Search Report and written decision in PCT/KR2022/001024, May 10, 2022. |
Notice of Allowance in U.S. Appl. No. 16/935,946, Sep. 30, 2022. |
International Search Report and Written Opinion for International Application No. PCT/KR2023/017304, Feb. 2, 2024. |
Yangjie Wei et al., Blurring kernel extraction and super-resolution image reconstruction based on style generative adersarial networks, Optics Express vol. 29, Issue 26, Dec. 16, 2021. |
Eric Yang, Variable Synthetic Depth of Field with Mobile Stereo Cameras, Computer Science Engineering, https://stanford.edu/class/ee367/sections 3.2, 4.3; 2020, retrieved on Jan. 9, 2024. |
Soldevila F et al: “Phase imaging by spatial wavefront sampling”, arxiv.org, Cornell University Library, 201 Olin Library Cornell University Ithaca, NY 14853, Nov. 11, 2017 (Nov. 11, 2017), XP081287443, DOI: 10.1364/OPTICA.5.000164, Nov. 11, 2017. |
Katkovnik Vladhviir et al: “A novel binary and multilevel phase masks for enhanced depth-of-focus infrared imaging”, 2018 52nd Asilomar Conference on Signals, Systems, and Computers, IEEE, Oct. 28, 2018 (Oct. 28, 2018), pp. 386-390, XP033520926, DOI: 10.1109/ACSSC.2018.8645129, Oct. 28, 2018. |
European Patent Office Extended European Search Report in Application No. 228814190-1207/4327058 PCT/KR2022015641, Sep. 19, 2024. |
Number | Date | Country | |
---|---|---|---|
20230119549 A1 | Apr 2023 | US |
Number | Date | Country | |
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63255819 | Oct 2021 | US |