The present disclosure relates to an optical semiconductor element and a method of manufacturing the same, and an optical integrated semiconductor element and a method of manufacturing the same.
Optical semiconductor elements have been used in optical communication systems (for example, Patent Document 1). To reduce the power consumption, it is required to reduce the series resistance of the optical semiconductor element. On the other hand, for high-speed operation, it is required to reduce the capacitance of the optical semiconductor element.
Patent Docuemnt 1: Japanese Patent Application Publication No. H5-55696
An optical semiconductor element in accordance with the present disclosure includes: a semiconductor substrate; a first cladding layer of a first conductive type provided on the semiconductor substrate; an active layer provided on the first cladding layer; a second cladding layer of a second conductive type provided on the active layer; a first mesa constituted of a part of the first cladding layer, the active layer, and the second cladding layer; an auxiliary cladding layer of the second conductive type provided on the first mesa; a second mesa constituted of the auxiliary cladding layer; and the semi-insulating layer provided on the first cladding layer and on both sides of the first mesa and both sides of the second mesa, wherein a width of the second mesa is greater than a width of the first mesa.
An optical integrated semiconductor element in accordance with the present disclosure includes: a semiconductor substrate including a first region acting as a laser element and a second region acting as a modulator, the first region and the second region being continuous along an optical axis direction of the laser element; a first cladding layer of a first conductive type provided in the first region and the second region on the semiconductor substrate; a first active layer provided on the first cladding layer and in the first region; a second active layer provided on the first cladding layer and in the second region, the first active layer and the second active layer being continuous along the optical axis direction of the laser element; a second cladding layer of a second conductive type provided on the first active layer; a third cladding layer of a second conductive type provided on the second active layer, the second cladding layer and the third cladding layer being continuous along the optical axis direction of the laser element; a first mesa that is in the first region, and is constituted of a part of the first cladding layer, the first active layer, and the second cladding layer; a second mesa that is provided in the second region such that the second mesa and the first mesa are continuous along the optical axis direction of the laser element, and is constituted of a part of the first cladding layer, the second active layer, and the third cladding layer; an auxiliary cladding layer of the second conductive type provided on the second cladding layer and the third cladding layer; a third mesa that is provided in the first region, and is constituted of the auxiliary cladding layer; and a fourth mesa that is provided in the second region such that the third mesa and the fourth mesa are continuous along the optical axis direction of the laser element, and is constituted of the auxiliary cladding layer; and a semi-insulating layer provided on the first cladding layer and on both sides of the first mesa, both sides of the second mesa, both sides of the third mesa, and both sides of the fourth mesa, wherein a width of the third mesa is greater than a width of the first mesa, and a width of the fourth mesa is greater than a width of the second mesa, and the width of the third mesa is greater than the width of the fourth mesa.
A method of manufacturing an optical semiconductor element in accordance with the present disclosure, includes: a step of forming a first cladding layer of a first conductive type on a semiconductor substrate; a step of forming an active layer on the first cladding layer; a step of forming a second cladding layer of a second conductive type on the active layer; a step of forming a first mesa constituted of the first cladding layer, the active layer, and the second cladding layer by etching a part of the first cladding layer, the active layer, and the second cladding layer; a step of forming a first semi-insulating layer on the first cladding layer and on both sides of the first mesa; a step of causing an auxiliary cladding layer of the second conductive type to be grown on the first mesa and the first semi-insulating layer; a step of forming, on the first mesa, a second mesa having a larger width than the first mesa by etching a part of the first semi-insulating layer and the auxiliary cladding layer; and a step of forming a second semi-insulating layer on the first semi-insulating layer and on both sides of the second mesa, wherein a width of the second mesa is greater than a width of the first mesa.
A method of manufacturing an optical integrated semiconductor element on a semiconductor substrate, the semiconductor substrate including a first region acting as a laser element and a second region acting as a modulator, the first region and the second region being continuous along an optical axis direction of the laser element, includes: a step of forming a first cladding layer of a first conductive type in the first region and the second region on the semiconductor substrate; a step of forming a first active layer on the first cladding layer; a step of forming a second cladding layer of a second conductive type on the first active layer; a step of removing the first active layer and the second cladding layer in the second region; a step of forming a second active layer on the first cladding layer in the second region such that the first active layer and the second active layer are continuous along the optical axis direction of the laser element; a step of forming a third cladding layer of the second conductive type on the second active layer in the second region such that the second cladding layer and the third cladding layer are continuous along the optical axis direction of the laser element; a step of forming, in the first region, a first mesa constituted of the first cladding layer, the first active layer, and the second cladding layer and forming, in the second region, a second mesa constituted of the first cladding layer, the second active layer, and the third cladding such that the first mesa and the second mesa are continuous along the optical axis direction of the laser element, by etching a part of the first cladding layer, the first active layer, the second cladding layer, the second active layer, and the third cladding layer; a step of forming a first semi-insulating layer on the first cladding layer and on both sides of the first mesa and both sides of the second mesa; a step of forming an auxiliary cladding layer of the second conductive type on the first semi-insulating layer and on the first mesa and the second mesa; a step of forming, on the first mesa, a third mesa that is constituted of the auxiliary cladding layer and has a larger width than the first mesa, by etching a part of the first semi-insulating layer and the auxiliary cladding layer in the first region, and forming, on the second mesa, a fourth mesa that is constituted of the auxiliary cladding layer and has a larger width than the second mesa such that the third mesa and the fourth mesa are continuous along the optical axis direction of the laser element, by etching a part of the first semi-insulating layer and the auxiliary cladding layer in the second region; and a step of forming a second semi-insulating layer on the first semi-insulating layer and on both sides of the third mesa and both sides of the fourth mesa, wherein a width of the third mesa is greater than a width of the fourth mesa.
To reduce the series resistance, the width of the cladding layer of the optical semiconductor element is to be increased. On the other hand, to reduce the capacitance, the width of the cladding layer is to be decreased. Thus, it is difficult to achieve both the reduction in series resistance and the reduction in capacitance. Hence, it is an object of the present disclosure to provide an optical semiconductor element and a method of manufacturing the same and an optical integrated semiconductor element and a method of manufacturing the same that are capable of achieving both reduction in series resistance and reduction in capacitance.
According to the present disclosure, both reduction in series resistance and reduction in capacitance can be achieved.
[Description of Embodiments of the Present Invention]
First, details of embodiments of the present disclosure will be described as listed below.
An embodiment of the present disclosure is (1) an optical semiconductor element including: a semiconductor substrate; a first cladding layer of a first conductive type provided on the semiconductor substrate; an active layer provided on the first cladding layer; a second cladding layer of a second conductive type provided on the active layer; a first mesa constituted of a part of the first cladding layer, the active layer, and the second cladding layer; an auxiliary cladding layer of the second conductive type provided on the first mesa; a second mesa constituted of the auxiliary cladding layer; and the semi-insulating layer provided on the first cladding layer and on both sides of the first mesa and both sides of the second mesa, wherein a width of the second mesa is greater than a width of the first mesa. Both reduction in resistance and reduction in capacitance are achieved by setting the width of the second mesa at an appropriate width.
(2) An optical integrated semiconductor element includes: a semiconductor substrate including a first region acting as a laser element and a second region acting as a modulator, the first region and the second region being continuous along an optical axis direction of the laser element; a first cladding layer of a first conductive type provided in the first region and the second region on the semiconductor substrate; a first active layer provided on the first cladding layer and in the first region; a second active layer provided on the first cladding layer and in the second region, the first active layer and the second active layer being continuous along the optical axis direction of the laser element; a second cladding layer of a second conductive type provided on the first active layer; a third cladding layer of a second conductive type provided on the second active layer, the second cladding layer and the third cladding layer being continuous along the optical axis direction of the laser element; a first mesa that is in the first region, and is constituted of a part of the first cladding layer, the first active layer, and the second cladding layer; a second mesa that is provided in the second region such that the second mesa and the first mesa are continuous along the optical axis direction of the laser element, and is constituted of a part of the first cladding layer, the second active layer, and the third cladding layer; an auxiliary cladding layer of the second conductive type provided on the second cladding layer and the third cladding layer; a third mesa that is provided in the first region, and is constituted of the auxiliary cladding layer; and a fourth mesa that is provided in the second region such that the third mesa and the fourth mesa are continuous along the optical axis direction of the laser element, and is constituted of the auxiliary cladding layer; and a semi-insulating layer provided on the first cladding layer and on both sides of the first mesa, both sides of the second mesa, both sides of the third mesa, and both sides of the fourth mesa, wherein a width of the third mesa is greater than a width of the first mesa, and a width of the fourth mesa is greater than a width of the second mesa, and the width of the third mesa is greater than the width of the fourth mesa. Since the width of the third mesa is large, the resistance of the laser element can be reduced. Since the width of the fourth mesa is small, the capacitance of the modulator can be reduced.
(3) A method of manufacturing an optical semiconductor element, includes: a step of forming a first cladding layer of a first conductive type on a semiconductor substrate; a step of forming an active layer on the first cladding layer; a step of forming a second cladding layer of a second conductive type on the active layer; a step of forming a first mesa constituted of the first cladding layer, the active layer, and the second cladding layer by etching a part of the first cladding layer, the active layer, and the second cladding layer; a step of forming a first semi-insulating layer on the first cladding layer and on both sides of the first mesa; a step of causing an auxiliary cladding layer of the second conductive type to be grown on the first mesa and the first semi-insulating layer; a step of forming, on the first mesa, a second mesa having a larger width than the first mesa by etching a part of the first semi-insulating layer and the auxiliary cladding layer; and a step of forming a second semi-insulating layer on the first semi-insulating layer and on both sides of the second mesa, wherein a width of the second mesa is greater than a width of the first mesa. Both reduction in resistance and reduction in capacitance are achieved by setting the width of the second mesa at an appropriate width.
(4) The first semi-insulating layer may have a level difference on a surface thereof, and a bottom face of the second semi-insulating layer may be in contact with a bottom face of the level difference, and a position of the bottom face of the second semi-insulating layer may be lower than a position of an upper face of the second cladding layer, and higher than a position of a bottom face of the first active layer. Since the first cladding layer becomes wide, the resistance can be reduced. In addition, the area of the part where the first cladding layer and the auxiliary cladding layer face each other becomes small, the capacitance can be reduced.
(5) A method of manufacturing an optical integrated semiconductor element on a semiconductor substrate, the semiconductor substrate including a first region acting as a laser element and a second region acting as a modulator, the first region and the second region being continuous along an optical axis direction of the laser element, includes: a step of forming a first cladding layer of a first conductive type in the first region and the second region on the semiconductor substrate; a step of forming a first active layer on the first cladding layer; a step of forming a second cladding layer of a second conductive type on the first active layer; a step of removing the first active layer and the second cladding layer in the second region; a step of forming a second active layer on the first cladding layer in the second region such that the first active layer and the second active layer are continuous along the optical axis direction of the laser element; a step of forming a third cladding layer of the second conductive type on the second active layer in the second region such that the second cladding layer and the third cladding layer are continuous along the optical axis direction of the laser element; a step of forming, in the first region, a first mesa constituted of the first cladding layer, the first active layer, and the second cladding layer and forming, in the second region, a second mesa constituted of the first cladding layer, the second active layer, and the third cladding such that the first mesa and the second mesa are continuous along the optical axis direction of the laser element, by etching a part of the first cladding layer, the first active layer, the second cladding layer, the second active layer, and the third cladding layer; a step of forming a first semi-insulating layer on the first cladding layer and on both sides of the first mesa and both sides of the second mesa; a step of forming an auxiliary cladding layer of the second conductive type on the first semi-insulating layer and on the first mesa and the second mesa; a step of forming, on the first mesa, a third mesa that is constituted of the auxiliary cladding layer and has a larger width than the first mesa, by etching a part of the first semi-insulating layer and the auxiliary cladding layer in the first region, and forming, on the second mesa, a fourth mesa that is constituted of the auxiliary cladding layer and has a larger width than the second mesa such that the third mesa and the fourth mesa are continuous along the optical axis direction of the laser element, by etching a part of the first semi-insulating layer and the auxiliary cladding layer in the second region; and a step of forming a second semi-insulating layer on the first semi-insulating layer and on both sides of the third mesa and both sides of the fourth mesa, wherein a width of the third mesa is greater than a width of the fourth mesa. Since the width of the third mesa is large, the resistance of the laser element can be reduced. Since the width of the fourth mesa is small, the capacitance of the modulator can be reduced.
(6) The first semi-insulating layer may have a level difference on a surface thereof, and a bottom face of the second semi-insulating layer may be in contact with a bottom face of the level difference, and a position of the bottom face of the second semi-insulating layer may be lower than a position of an upper face of the second cladding layer, and higher than a position of a bottom face of the first active layer. Since the first cladding layer becomes wide, the resistance can be reduced. In addition, since the area of the part where the first cladding layer and the third cladding layer face each other becomes small, the resistance can be reduced.
[Details of Embodiments of the Present Invention]
The following describes specific examples of an optical semiconductor element and a method of manufacturing the same and an optical integrated semiconductor element and a method of manufacturing the same in accordance with embodiments of the present disclosure with reference to drawings. It should be noted that the present disclosure is not limited to these examples but is shown by the claims, and it is intended that all modifications are included in the equivalents of the claims and the scope of the claims.
(Optical Semiconductor Element)
As illustrated in
N-type block layers 20 are provided on the two semi-insulating layers 18, and a p-type cladding layer 22 (an auxiliary cladding layer) is provided on the mesa 17. The part that is in contact with the p-type cladding layer 16 of the p-type cladding layer 22 is located between the two semi-insulating layers 18 and between the two n-type block layers 20. A p-type contact layer 24 is provided on the p-type cladding layer 22, and the n-type block layer 20, the p-type cladding layer 22, and the p-type contact layer 24 form the mesa 19 (a second mesa). Semi-insulating layers 26 (a second semi-insulating layer) are provided on the semi-insulating layers 18 and on both sides of the mesa 19. A p-type electrode 27 is provided on the upper faces of the p-type contact layer 24 and the semi-insulating layers 26, and an n-type electrode 28 is provided on the bottom face of the semiconductor substrate 10.
The semiconductor substrate 10 is formed of, for example, n-type indium phosphorus (InP) with a thickness of 100 μm. The n-type cladding layer 12 is formed of, for example, n-type InP with a thickness of 2 μm. The dopants of the semiconductor substrate 10 and the n-type cladding layer 12 are, for example, silicon (Si), and the dopant concentration is, for example, 1×1018 cm3. The active layer 14 has a multi quantum well (MQW) structure in which indium gallium arsenide phosphorus (InGaAsP) layers doped with zinc (Zn) are stacked and has a thickness of 0.3 μm. In the active layer 14, diffraction gratings (not illustrated) that extend in the Y-axis direction are formed. Modulation signals and bias current are supplied to the p-type electrode 27 and the n-type electrode 28, and light is generated by recombination of carriers in the active layer 14.
The semi-insulating layers 18 and 26 are formed of, for example, InP doped with iron (Fe). The semi-insulating layer 18 has a thickness of, for example, 1.8 μm, and the semi-insulating layer 26 has a thickness of, for example, 3.5 μm. The n-type block layer 20 is formed of, for example, n-type InP doped with Si with a thickness of 0.3 μm. The p-type cladding layers 16 and 22 are formed of, for example, p-type InP doped with Zn, and the dopant concentration is, for example, 5×1017 cm−3. The p-type cladding layer 16 has a thickness of, for example, 0.1 μm, and the p-type cladding layer 22 has a thickness of, for example, 1.5 μm. The p-type contact layer 24 is formed of, for example, p-type indium gallium arsenide (InGaAs) that is doped with Zn and has a thickness of 0.1 μm. The p-type electrode 27 and the n-type electrode 28 are formed of a metal such as gold (Au).
The width W2 of the p-type cladding layer 22 is, for example, 3 μm, and the width W1 of the active layer 14 is, for example, 1.5 μm. That is, the width W2 is greater than the width W1, and in this example, the width W2 is two times the width W1.
(Manufacturing Method)
As illustrated in
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As illustrated in
As illustrated in
(Series Resistance and Capacitance)
The horizontal axis in
In the first embodiment, the width W2 of the p-type cladding layer 22 (the width of the mesa 19) is larger than the width W1 of the active layer 14 (the width of the mesa 17). By setting the width W2 at a proper width, both the reduction in resistance and the reduction in capacitance are achieved. The simulation results of
Since the series resistance of the optical semiconductor element 100 is reduced, heat generation due to laser oscillation is reduced. Thus, the optical semiconductor element 100 can be driven without a cooler, and the power consumption can be therefore reduced. In addition, since the capacitance of the optical semiconductor element 100 is reduced, high-speed operation becomes possible. Specifically, considering the characteristics of the device, it is preferable that the series resistance is approximately 6 Ω or less (W2 is 4.0 μm or greater) and the capacitance is 200 pF or less (the width W2 is 2 μm or greater and 3.0 μm or less). Furthermore, considering reduction in the size of the optical semiconductor element, it is preferable that the width W2 is approximately 10 μm or less. Here, considering multi-mode oscillation described later and the margin of the process, it is preferable that the width W1 of the active layer 14 is approximately 1.5 μm. As a result, it is preferable that the width W2 is equal to or greater than 1.5 times the width W1 and equal to or less than 7 times the width W1.
The optical semiconductor element 100 includes two semi-insulating layers 18 and 26. As illustrated in
As illustrated in
To reduce the resistance, the width W1 of the active layer 14 may be increased. However, when the width W1 is increased to, for example, 2 μm or greater, a kink occurs due to multi-mode oscillation. To inhibit the kink, it is preferable to make the width W1 small to achieve a current constriction structure.
(Optical Integrated Semiconductor Element)
A second embodiment is an exemplary optical integrated semiconductor element 200 in which a modulator and a laser element are integrated. The description of the same components as those of the first embodiment is omitted.
As illustrated in
One or some of the semiconductor layers are different between the region 31 and the region 33. The region 31 includes the active layer 34 and the p-type cladding layer 36, while the region 33 includes the active layer 38 and the p-type cladding layer 40. In the Y-axis direction, the active layer 34 is in contact with the active layer 38, and the p-type cladding layer 36 is in contact with the p-type cladding layer 40. Other semiconductor layers, the p-type electrode 52, and the n-type electrode 54 are provided in both the regions 31 and 33.
The mesas 37 and 39 have the same width W3, and the width W3 is, for example, 1.5 μm. The width W4 of the mesa 47 in the region 31 is, for example, 4 μm, and is larger than the width W3. The width W5 of the mesa 49 in the region 33 is, for example, 3 μm, and is greater than the width W3 and smaller than the width W4.
The semiconductor substrate 30, each semiconductor layer, the p-type electrode 52, and the n-type electrode 54 are formed of the same materials as the corresponding components of the first embodiment, and have the same thicknesses as the corresponding components. The active layers 34 and 38 include diffraction gratings that are not illustrated. The active layer 34 and the active layer 38 may have different compositions from each other. The p-type cladding layer 36 and the p-type cladding layer 40 may have different compositions from each other.
(Manufacturing Method)
As illustrated in
As illustrated in
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As illustrated in
As illustrated in
In the second embodiment, the width of the p-type cladding layer 46 is greater than the widths W3 of the active layers 34 and 38. The width W4 of the p-type cladding layer 46 in the region 31 (the width of the mesa 47) is greater than the width W5 in the region 33 (the width of the mesa 49). Thus, the series resistance in the region 31 decreases, and the capacitance in the region 33 decreases. The optical integrated semiconductor element 200 acts as an element in which a laser element having a low resistance and a modulator having a low capacitance are integrated. As a result, the reduction in power consumption is possible and high-speed operation is possible.
According to the simulation presented in
The optical integrated semiconductor element 200 includes the two semi-insulating layers 42 and 50. As illustrated in
As illustrated in
To reduce the resistance, the width W3 of the active layer 34 in the region 31 may be increased. However, when the width W3 is increased to, for example, 2 μm or greater, a kink is caused by multi-mode oscillation. To inhibit the kink, it is preferable to decrease the width W3 to achieve a current constriction structure.
As illustrated in
In the first and second embodiments, the conductive type (a first conductive type) of the cladding layer located lower than the active layer is an n-type, and the conductive type (a second conductive type) of the cladding layer located higher than the active layer is a p-type. However, the conductive type may be changed. In the first and second embodiments, the semiconductor substrate and the semiconductor layer may be formed of compound semiconductor other than those described above. In addition, resin such as polyimide or other semi-insulating materials may be used as the semi-insulating layer. The n-type block layer, which is a semiconductor, is grown on the lower semi-insulating layers 18 and 42. To improve the crystal quality and the insulation reliability, it is preferable that the semi-insulating layer is made of semiconductor. Ruthenium (Ru)-doped InP may be used for the semi-insulating layer instead of Fe-doped InP.
Number | Date | Country | Kind |
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2018-087422 | Apr 2018 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2019/017644 | 4/25/2019 | WO | 00 |