The present application claims the benefit under 35 U.S.C. § 119 of German Patent Application No. DE 10 2023 210 188.2 filed on Oct. 18, 2023, which is expressly incorporated herein by reference in its entirety.
The present invention relates to an optimized control circuit for a microelectromechanical sound generator and a corresponding sound generation system. The present invention relates in particular to a control of a microelectromechanical sound generator with a plurality of center connectors.
Sound generators can be used in loudspeakers, earphones or other devices to generate sound waves from an electrical signal. With increasing miniaturization, sound generation elements based on microelectromechanical systems (MEMS), too, are becoming more and more important. There are sound generators, for instance, in which a membrane can be excited by means of electrostatic forces.
European Patent Application No. EP 2 582 156 A2 describes an electrostatic loudspeaker that can be embodied as MEMS, for example. In one approach, it has been proposed that an audio signal be conducted to external capacitor plates using a differential amplifier, see
The present invention provides an optimized control circuit for a microelectromechanical sound generator and a corresponding sound generation system.
Preferred example embodiments of the present invention are disclosed herein.
According to a first aspect, the present invention relates to a control circuit for a microelectromechanical sound generator. According to an example embodiment of the present invention, the control circuit includes a first center connector, a second center connector, a first external connector and a second external connector. The control circuit includes a differential amplifier which comprises a first output connector coupled to the first external connector and a second output connector coupled to the second external connector and is configured to control the first external connector and the second external connector with a differential signal that corresponds to an input signal. The control circuit comprises a first voltage generator circuit, which is configured to provide the first center connector with a predetermined first DC voltage in relation to a common-mode voltage of the differential amplifier, and a second voltage generator circuit, which is configured to provide the second center connector with a predetermined second DC voltage in relation to the common-mode voltage of the differential amplifier.
According to one further development of the present invention, the control circuit is configured to set a supply voltage for the differential amplifier as a function of a maximum amplitude of the input signal.
According to one further development of the present invention, the control circuit comprises a level converter which is configured to adjust a common-mode signal level of the input signal, wherein the level converter is coupled to or integrated in the differential amplifier in order to provide the adjusted input signal.
According to one further development of the present invention, the control circuit is configured to receive a supply voltage for the level converter as a function of a maximum amplitude of the input signal.
According to one further development of the present invention, the control circuit is configured to receive an electrical voltage between a reference potential and a predetermined positive supply voltage as the supply voltage for the differential amplifier.
According to one further development of the present invention, the control circuit is configured to receive an electrical voltage between a predetermined negative supply voltage and a predetermined positive supply voltage as the supply voltage for the differential amplifier.
According to one further development of the present invention, the differential amplifier is embodied as a class G amplifier or a class H amplifier.
According to one further development of the present invention, the first voltage generator circuit provides the predetermined first DC voltage in relation to the common-mode voltage of the differential amplifier via a first buffer circuit. The first buffer circuit preferably uses two supply voltages, the voltage difference of which is kept constant by a first potential-free charge pump (see left part of
According to one further development of the present invention, the second voltage generator circuit provides the predetermined second DC voltage in relation to the common-mode voltage of the differential amplifier via a second buffer circuit. The second buffer circuit preferably uses two supply voltages, the voltage difference of which is kept constant by a second potential-free charge pump (see left part of
According to one further development of the present invention, the control circuit comprises a signal processing device which is configured to receive a digital audio signal, convert the digital audio signal into an analog audio signal, and provide the analog audio signal as an input signal to the level converter or the differential amplifier. The signal processing device can further be configured to ascertain the maximum amplitude of the input signal using the digital input signal.
According to one further development of the present invention, the signal processing device is configured to process the digital signal using a digital signal processor and then convert it into an analog audio signal.
According to a second aspect, the present invention relates to a microelectromechanical sound generator comprising a first center connector, a second center connector, a first external connector and a second external connector, wherein the first external connector is disposed on a first substrate of the microelectromechanical sound generator and the second external connector is disposed on the first substrate, and wherein the first center connector is disposed on a second substrate of the microelectromechanical sound generator and the second center connector is disposed on the second substrate.
According to one further development of the present invention, the first substrate is configured to reduce a parasitic capacitance between the first external connector and the first substrate and a parasitic capacitance between the second external connector and the first substrate, and/or the second substrate is configured to increase a parasitic capacitance between the first center connector and the second substrate and a parasitic capacitance between the second center connector and the second substrate.
According to one further development of the present invention, the first substrate is static and the second substrate is movable, or the first substrate is movable and the second substrate is static.
According to a third aspect, the present invention relates to a sound generation system comprising a control circuit and a microelectromechanical sound generator as described above.
The present invention is based, among other things, on the insight that the control of a sound generator based on a MEMS with an electrostatically controllable membrane typically requires electrical voltages that exceed the voltage level of conventional CMOS technology. The control of such sound generators therefore requires a suitable control circuit that can provide electrical voltages at a sufficient voltage level. The energy requirement of conventional control circuits can therefore be high. Conventional control circuits may also not be able to control a sound generator comprising a plurality of center connectors efficiently.
It is therefore an object of the present invention to create an efficient control for electrostatic sound generators comprising a plurality of center connectors which have a reduced energy requirement.
For this purpose, it is provided on the one hand to raise the electrical voltage level by means of a bias voltage through a voltage generator circuit. Moreover, in analogy to a class H amplifier, the supply voltage for a differential amplifier provided in the control circuit can be adjusted as a function of the respective current signal amplitude. This can take advantage of the fact that sound signals typically only very rarely have a high, in particular a maximum, amplitude. During long phases of low signal amplitudes, the differential amplifier can be operated with a lower supply voltage. This results in a significantly lower energy requirement. In particular in battery-operated systems, this makes it possible to increase the operating time per battery charge significantly.
In principle, any suitable differential amplifier circuit in the form of discrete components or integrated circuits that is capable of providing an amplified output signal corresponding to an input signal and can be operated with a variable supply voltage can be used as a differential amplifier. As will be explained in more detail in the following, the differential amplifier can be operated with a supply voltage between a reference potential (0 volts) and a (positive) supply voltage or, in alternative embodiments, also with a negative and a positive supply voltage.
Further features and advantages of the present invention are explained in the following with reference to the figures.
In all figures, identical or functionally identical elements and apparatuses are provided with the same reference sign.
In this sound generation system, sound can be generated by means of the microelectromechanical sound generator 1100, for instance. A membrane of the microelectromechanical sound generator 1100 can be deflected by providing sufficiently high electrical voltages. In
To control the microelectromechanical sound generator 1100, an input signal VIN can be amplified by means of a differential amplifier 1210. The two output connectors of the differential amplifier 1210 can be electrically connected to the external connectors of the microelectromechanical sound generator 1100. To provide a sufficiently high electrical voltage to deflect the membrane of the microelectromechanical sound generator 1100, an electrical voltage is provided at the center connector E0 which is increased relative to the common-mode voltage VC of the differential amplifier 1210 by a bias voltage VBIAS. For this purpose, a voltage generator circuit 1211 can be provided in the control circuit 1200 with the differential amplifier 1210. The thus increased common-mode voltage can be fed to the center connector E0 via a buffer circuit 1212 if necessary.
The control circuit 1200 has to be dimensioned such that even the maximum expected amplitudes of the input signal VIN can be amplified with sufficient quality in accordance with the requirements. To amplify signals with the maximum expected amplitude in the input signal VIN, a correspondingly high supply voltage has to be provided on the differential amplifier 1210.
In practice, the mechanical movements of the capacitor plates of the microelectromechanical sound generator 1100 shown in FIG. 1 can cause a change in capacitance over time, which can result in a current load on the center connector, because the changes in the upper and lower capacitors can have opposite signs.
In this sound generation system, sound can be generated by means of the microelectromechanical sound generator 2100, for instance. The membrane of the microelectromechanical sound generator 2100 can be deflected by providing a sufficiently high electrical voltage. In
As shown in
The other connectors of the capacitors C1 and C3 can be electrically connected to one another via a first external connector E1. The other connectors of the capacitors C2 and C4 can be electrically connected to one another via a second external connector E2.
To control the microelectromechanical sound generator 2100, an input signal VIN can be amplified by means of a differential amplifier 2210. The two output connectors of the differential amplifier 2210 can be electrically connected to the external connectors of the microelectromechanical sound generator 2100.
In
A first voltage generator circuit 2211 to increase the common-mode voltage VCM and to supply the increased voltage VCM+VDC to the first center connector E0 via an optional first buffer circuit 2212 can be provided in the control circuit 2200. A second voltage generator circuit 2213 to reduce the common-mode voltage VCM and to supply the reduced voltage VCM−VDC to the second center connector E0 via an optional second buffer circuit 2214 can be provided in the control circuit 2200 as well.
The audio input signal is usually in the low voltage range. Its common mode has to be shifted to a level that matches the common-mode voltage VCM of the differential amplifier. This function can be implemented in a circuit as shown in
High-pass and/or low-pass filtering and/or buffering of the audio signal can be implemented in a device or not implemented in the device if the respective function is implemented elsewhere in the signal path.
The (analog) input signal VIN can first be fed to a filter 3230, for example, in particular a low-pass filter, possibly with suitable buffering. This filter device 3230 can be operated with a low supply voltage VDDLV. The output signal of these filter devices 3230 can then be fed to a level converter 3220.
The level converter 3220 can raise the signal provided by the filter devices 3230 by a DC voltage component, for example, so that the output signal provided by the level converter 3220 is suitable for being amplified by the downstream differential amplifier 3210 in the corresponding voltage range. The level converter 3220 can be operated with a supply voltage VDDMV, which is usually between the supply voltage VDDLV of the filter device 3230 and the supply voltage VDDHV of the differential amplifier 3210. For example, the voltage level of the input signal VIN can be raised to such an extent that the raised signal does not contain any signal components with a negative voltage, i.e. less than 0 volts.
The signal output by the level converter 3220 can be amplified by the differential amplifier 3210 and fed to a microelectromechanical sound generator such as described with reference to
The differential amplifier 3210 and the level converter 3220 can always be configured for the maximum expected amplitude of the input signal VIN. The input voltages of the differential amplifier 3210 and the level converter 3220 can accordingly also be provided with sufficient safety reserves corresponding to the amplitude of the input signal VIN.
Since a maximum expected amplitude can rarely occur in the input signal VIN for sound signals, for signal portions with a lower amplitude it can be sufficient to operate the differential amplifier 3210 and, if applicable, the level converter 3220 with a lower supply voltage during these signal portions. According to the present invention, it can therefore be provided that the supply voltages VDDHV and VSSHV of the differential amplifier 3210 and possibly also the supply voltage VDDMV of the level converter 3220 be adjusted in accordance with the current amplitude of the input signal VIN, and, in particular in portions with low amplitude in the input signal VIN, that the supply voltages VDDHV and VSSHV and, if applicable, VDDMV be lowered.
In order to adjust the supply voltages VDDMV and VDDHV and VSSHV to the respective signal amplitude in a timely manner, the input signal VIN can be analyzed on the basis of a digital signal, for instance, before this digital signal is converted into an analog input signal VIN.
The supply voltages for the level shifting function by the level converter 3220 can expediently be at an intermediate voltage level VDDMV, for example at 5V, which is compatible with the common-mode voltage at the amplifier input. The common-mode voltage of the amplifier output VCM can have any value between ground and VDDMV, but can expediently be set at VDDMV/2. The supply voltages VDDHV and VSSHV of the differential amplifier 3210 can be set symmetrically to the common-mode voltage of the amplifier output VCM.
It is possible to use ground and VDDMV within the differential amplifier 3210 as intermediate supplies. The differential amplifier 3210 can thus be embodied as a class G amplifier. The high voltage supplies VDDHV and VSSHV can be increased or reduced depending on the input signal, however, thus realizing a class H amplifier.
If the audio signal is small, e.g. 20 dB below the maximum, it is possible to reduce VDDHV to VDDMV and VSSHV to ground, as a result of which the differential amplifier 3210 is operated in a reduced voltage range and can have a significantly lower power consumption.
One advantage of aspects of the control circuit 3200 is that the power required for buffering to keep the first center connector E0 and the second center connector E3 at a respective constant voltage is negligible in the first order. Strictly speaking, this would be true if the capacitors remained linear and unchanging over time. This hypothesis is not entirely true if there is a large amount of mechanical movement and the buffering has to be able to support some current load. However, aspects of the control circuit 3200 are capable of minimizing current loads under certain symmetry conditions in a MEMS.
As described in detail in the following, the current load for the buffering can be reduced under the condition C1=C2=C3=C4 and Cp0=Cp3, for example. If the voltage at the first external connector E1 rises and the voltage at the second external connector E2 falls, the capacitances C1 and C4 decrease while the capacitances C2 and C3 increase. There is therefore a net current flow from the first center connector E0 to the second center connector E3. The first center connector E0 tends to decrease its voltage, while the second center connector E3 tends to increase its voltage. The series of parasitic capacitors Cp0 and Cp3 supplies a charge to the first center connector E0 while the second center connector E3 is discharged. Given their beneficial effect, the capacitors Cp0 and Cp3 should be large in size, although requirements for the bandwidth of the buffering can set a limit.
According to one particular aspect, the substrate of the first center connector E0 and the second center connector E3, i.e. the common connector of Cp0 and Cp3, can be biased with a relatively high impedance, while the two capacitors still behave like two separately grounded capacitors and not as a series of the capacitors.
The capacitors Cp1 and Cp2 should be as small as possible to reduce the power consumption of the differential amplifier.
If, with reference to
In this newly assigned configuration, the parasitic capacitors Cp1 and Cp2 take on the role of Cp0 and Cp3 and have to be renamed Cp0 and Cp3. Conversely, the parasitic capacitors Cp0 and Cp3 take on the role of Cp1 and Cp2 and have to be renamed Cp1 and Cp2.
The buffering consumes a certain amount of bias current to ensure a certain bandwidth. The buffering can be powered by two voltage rails that have a voltage difference lower than VDDMV, e.g. 2 V or up to 5 V, preferably 4 V. Such a voltage difference can be created by potential-free charge pumps as shown schematically in
The buffering that controls the first center connector E0 uses VDD_HVBP as the low supply voltage and VDD_HVBP_HI as the high supply voltage. The bias current flows from the high voltage to the lower voltage, which reduces the voltage difference between the two nodes VDD_HVBP_HI and VDD_HVBP. By means of a comparator, the potential-free charge pump can detect when a difference VDD_HVBP_HI−VDD_HVBP becomes smaller than a predetermined threshold value, e.g. 2 V. If the difference falls below the threshold value, a pumping process starts in order to bring the voltage difference above the threshold value.
The buffering that controls the second center connector E3 uses VDD_HVBN as the high supply voltage and VDD_HVBN_LO as the low supply voltage. The bias current flows from the high voltage to the lower voltage, which reduces the voltage difference between the two nodes VDD_HVBN and VDD_HVBN_LO. By means of a comparator, the potential-free charge pump can detect when a difference VDD_HVBN−VDD_HVBN_LO becomes smaller than a predetermined threshold value, e.g. 2 V. If the difference falls below the threshold value, a pumping process starts in order to bring the voltage difference above the threshold value.
Based on the comparison, an ON or an OFF signal is generated for each potential-free charge pump.
A variety of solutions can be used to implement the desired functions of creating a voltage difference and comparing said difference with another voltage reference. For example, it is possible to use standard differential amplifiers and comparators, followed by dedicated analog level shifters to either shift the voltage differences to a low voltage range and carry out the comparison there, or by shifting the reference voltage Vref to a high voltage range of the potential-free comparators. However, these implementations may be less advantageous in terms of their surface area and/or power consumption.
For the intended application, a different approach for generating a supply voltage differential signal and an analog level shift is presented. The level shift can preferably be toward the low voltage range in order to control a clock control circuit, which also operates in the low voltage range, for each charge pump with the ON or OFF signals.
A comparison current, which is proportional to the voltage difference between the supply voltages of the potential-free charge pumps, and a reference current, which is proportional to a reference voltage, are generated. The comparison current generated in a high voltage range can be shifted to a low voltage range where it is compared with the reference current.
This voltage is then used in combination with a standard operational amplifier, which can only operate in the local voltage range and does not need to see high voltages, to bias PFET_high such that the same current that flows through R1_high also flows through R3_high. R1_high and R3_high thus have the same fixed resistance, while R2_high can be selected with a very high impedance in order to achieve low current consumption. In this circuit, the current i_high corresponds to the actual voltage difference between the potential-free supply voltages Vdd_high and Vss_high.
A complementary circuit in which the roles of Vdd_high and Vss_high are reversed and the PFET is replaced by an NFET could be used in the high negative voltage range. In this case, Vdd_high and Vss_high correspond to VDD_HVBN and VDD_HVBN_LO respectively.
Two separate circuits, such as those shown in
The currents that represent the differences in the supply lines can be used to carry out a comparison operation. Providing currents makes it possible to use a simple current subtractor as shown in
The reference current i_low from the low voltage range can be mirrored on the same path as the corresponding current i_high from the potential-free high voltage domain, wherein the two converge to i_diff. Assuming a constant mirror ratio of 1:1 for all circuits, the voltage at i_diff changes as a function of the resulting current difference i_low−i_high.
The voltage at i_diff has to now be converted into a logical signal that represents the desired ON and OFF functionality for the clock control and thus for the charge pump and the potential-free supply rails themselves. Three different implementations of a current comparator are shown and described in the following with reference to
A second implementation variant for a current comparator is shown in
A current comparator can also be realized using a simpler implementation as is shown in
A comparison of
Number | Date | Country | Kind |
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10 2023 210 188.2 | Oct 2023 | DE | national |