Displays, e.g. for augmented or virtual reality applications comprise arrays or miniaturized LEDs (“Light Emitting Diode”). Efforts are being taken to develop micro LEDs having a light emission with an improved directionality.
Embodiments provide an improved optoelectronic apparatus as well as an improved optoelectronic semiconductor device.
According to embodiments, the above objects are achieved by the claimed matter according to the independent claims. Further developments are defined in the dependent claims.
An optoelectronic apparatus comprises an array of optoelectronic semiconductor devices. The optoelectronic apparatus comprises a semiconductor layer stack comprising a first semiconductor layer of a first conductivity type, an active zone, and a second semiconductor layer of a second conductivity type. Adjacent optoelectronic semiconductor devices are separated by separating elements vertically extending through the semiconductor layer stack. The optoelectronic semiconductor devices are configured to emit generated electromagnetic radiation via a first main surface of the first semiconductor layer. The optoelectronic apparatus further comprises portions of a metal layer arranged on a side of the first semiconductor layer facing away from the active zone and being arranged at positions of the separating elements.
According to embodiments, the separating elements comprise a conductive body and an insulating layer insulating the conductive body from the semiconductor layer stack. A largest horizontal extension of the portion of the metal layer is larger than or equal to a smallest horizontal extension of the conductive body.
The metal layer may comprise silver or gold or another suitable reflecting metal.
According to embodiments, the horizontal extension of the portions of the metal layer increases with increasing distance from the first main surface. According to further embodiments, the horizontal extension of the portions of the metal layer decreases with increasing distance from the first main surface.
According to examples, a dielectric layer may be arranged over sidewalls of the portion of the metal layer.
For example, a thickness of the metal layer may be equal to or larger than 0.1*we, where we is a width of an emitting area. Generally, we may correspond to the largest horizontal extension of the first and the second semiconductor layers.
According to further embodiments, an optoelectronic semiconductor device comprises a semiconductor layer stack comprising a first semiconductor layer of a first conductivity type, an active zone, and a second semiconductor layer of a second conductivity type, and separating elements arranged adjacent to the semiconductor layer stack, the separating elements vertically extending along the semiconductor layer stack. The optoelectronic semiconductor device is configured to emit generated electromagnetic radiation via a first main surface of the first semiconductor layer. The optoelectronic semiconductor device further comprises portions of a metal layer arranged on a side of the first semiconductor layer facing away from the active zone and being arranged at positions of the separating elements. A void or a plurality of holes are formed in the first main surface of the first semiconductor layer, a vertical extension v of the void or the plurality of holes being larger than 0.75*t, wherein t denotes a layer thickness of the first semiconductor layer. The depth of individual holes may be different. The shape of the holes in the plan view may be circular, square, rectangular, triangular, hexagonal, etc., and may be different from each other.
According to further embodiments, an optoelectronic semiconductor device comprises a semiconductor layer stack comprising a first semiconductor layer of a first conductivity type, an active zone, and a second semiconductor layer of a second conductivity type. Separating elements are arranged adjacent to the semiconductor layer stack, the separating elements vertically extending along the semiconductor layer stack. The optoelectronic semiconductor device is configured to emit generated electromagnetic radiation via a first main surface of the first semiconductor layer. The optoelectronic semiconductor device further comprises portions of a metal layer arranged on a side of the first semiconductor layer facing away from the active zone and being arranged at positions of the separating elements. A plurality of holes is formed in the first main surface of the first semiconductor layer so that an ordered photonic structure is formed in the first main surface of the first semiconductor layer.
For example, each of the separating elements comprises a conductive body insulated from the semiconductor layer stack by a dielectric layer.
The optoelectronic semiconductor device may further comprise a dielectric filling arranged in the void or in at least one of the plurality of holes.
According to embodiments, the optoelectronic semiconductor device further comprises a transparent conductive oxide material filled in the void or in at least one of the plurality of holes.
For example, the semiconductor layer stack is patterned to form a mesa, an angle of a sidewall of the void with respect to a horizontal direction being smaller than the angle of a sidewall of the mesa with respect to the horizontal direction.
According to examples, the optoelectronic semiconductor device further comprises a reflecting material arranged in at least one of the holes.
By way of example, the reflecting material comprises a dielectric mirror layer arranged on sidewalls of at least one of the holes.
Additionally or alternatively, the reflecting material may comprise a metal.
According to embodiments, an optoelectronic semiconductor device comprises a semiconductor layer stack comprising a first semiconductor layer of a first conductivity type, an active zone, and a second semiconductor layer of a second conductivity type. The optoelectronic semiconductor device is configured to emit generated electromagnetic radiation via a first main surface of the first semiconductor layer. A lateral width z of the active zone is smaller than the smallest lateral width c of the first and the second semiconductor layers.
For example, the lateral width of the active zone is smaller than 0.3*c, wherein c denotes the smallest lateral width of the first semiconductor layer.
The optoelectronic semiconductor device may further comprise a lens arranged above the first main surface of the first semiconductor layer, a focal point of the lens being arranged at a position of the active zone.
According to embodiments, the optoelectronic semiconductor device further comprises separating elements arranged adjacent to the semiconductor layer stack, the separating elements vertically extending along the semiconductor layer stack.
The optoelectronic semiconductor device may further comprise portions of a metal layer arranged on a side of the first semiconductor layer facing away from the active zone and being arranged at positions of the separating elements.
An optoelectronic apparatus comprises an array of optoelectronic semiconductor devices as described above.
The optoelectronic apparatus may further comprise separating elements comprising an insulating material, the separating elements being disposed between the optoelectronic semiconductor devices at a position of the first main surface of the first semiconductor layer and having a vertical extension b smaller than a thickness of the semiconductor layer stack.
The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate the embodiments of the present invention and together with the description serve to explain the principles. Other embodiments of the invention and many of the intended advantages will be readily appreciated, as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numbers designate corresponding similar parts.
In the following detailed description reference is made to the accompanying drawings, which form a part hereof and in which are illustrated by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology such as “top”, “bottom”, “front”, “back”, “over”, “on”, “above”, “leading”, “trailing” etc. is used with reference to the orientation of the Figures being described. Since components of embodiments of the invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope defined by the claims.
The description of the embodiments is not limiting. In particular, elements of the embodiments described hereinafter may be combined with elements of different embodiments.
The terms “wafer” or “semiconductor substrate” used in the following description may include any semiconductor-based structure that has a semiconductor surface. Wafer and structure are to be understood to include doped and undoped semiconductors, epitaxial semiconductor layers, e.g. supported by a base semiconductor foundation, and other semiconductor structures. For example, a layer of a first semiconductor material may be grown on a growth substrate of a second semiconductor material. According to further embodiments, the growth substrate may be an insulating substrate such as a sapphire substrate. Depending on the purpose of use, the semiconductor may be based on a direct or an indirect semiconductor material. Examples of semiconductor materials particularly suitable for generation of electromagnetic radiation comprise nitride-compound semiconductors, by which e.g. ultraviolet or blue light or longer wavelength light may be generated, such as GaN, InGaN, AlN, AlGaN, AlGaInN, phosphide-compound semiconductors, by which e.g. green or longer wavelength light may be generated such as GaAsP, AlGaInP, GaP, AlGaP, as well as further semiconductor materials including AlGaAs, SiC, ZnSe, GaAs, ZnO, Ga2O3, diamond, hexagonal BN und combinations of these materials. Further examples of semiconductor materials may as well be silicon, silicon-germanium and germanium. The stoichiometric ratio of the compound semiconductor materials may vary. In the context of the present specification, the term “semiconductor” further encompasses organic semiconductor materials.
The term “vertical” as used in this specification intends to describe an orientation which is arranged perpendicular to the first surface of a substrate or semiconductor body.
The terms “lateral” and “horizontal” as used in this specification intends to describe an orientation parallel to a first surface of a substrate or semiconductor body. This can be for instance the surface of a wafer or a die.
As used herein, the terms “having”, “containing”, “including”, “comprising” and the like are open ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles “a”, “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
As employed in this specification, the terms “coupled” and/or “electrically coupled” are not meant to mean that the elements must be directly coupled together—intervening elements may be provided between the “coupled” or “electrically coupled” elements. The term “electrically connected” intends to describe a low-ohmic electric connection between the elements electrically connected together.
The term “electrically connected” further comprises tunneling contacts between connected elements.
The active zone 115 may, for example, comprise a pn junction, a double heterostructure, a single quantum well (SQW) structure or a multi quantum well (MQW) structure for generating radiation. In this context, the term “quantum well structure” has no meaning with regard to the dimensionality of the quantization. Thus, it includes, among other things, quantum wells, quantum wires and quantum dots, as well as any combination of these layers.
Adjacent optoelectronic semiconductor devices are separated by separating elements 125 that vertically extend through the semiconductor layer stack 105. The optoelectronic semiconductor devices 10 are configured to emit generated electromagnetic radiation 15 via a first main surface 111 of the first semiconductor layer 110. The optoelectronic apparatus 20 further comprises portions of a metal layer 130 arranged on a side of the first semiconductor layer 110 facing away from the active zone 115 and being arranged at positions of the separating elements 125.
The optoelectronic apparatus 20 may be arranged over a suitable carrier 100 that may be made of an insulating, conductive or semiconductor material. The separating elements 125 that are arranged between adjacent optoelectronic semiconductor devices may comprise a conductive body 126 and an insulating layer 129 insulating the conductive body 126 from the semiconductor layer stack 105. For example, the conductive body may comprise a separating metal layer 127. The separating metal layer 127 may e.g. comprise a transparent conductive oxide such as ITO (“Indium Tin Oxide”). The separating metal layer 127 may be arranged adjacent to the insulating layer 129. For example, the separating metal layer 127 may extend from a portion beneath the second semiconductor layer 120 to a region above the active zone 115. Horizontal portions of the separating metal layer may be electrically connected to the second semiconductor layer.
A second current spreading layer 140 may be arranged over the carrier 100. The second current spreading layer 140 may be electrically connected to the second semiconductor layer 120 via the separating metal layer 127. Portions of the second current spreading layer 140 may form part of the conductive body 126 of the separating elements 125.
For example, the structure shown in
A material of the first and second semiconductor layers 110, 120 may comprise InxGayAl1-x-yP, with 0≤x≤1, 0≤y≤1, or GaN and InGaN.
The first current spreading layer 135 may be arranged over the first main surface 111 of the first semiconductor layer 110. The separating elements 125 may extend to the first current spreading layer 135. A horizontal upper portion of the insulating layer 129 may be adjacent to the first current spreading layer 135. The first current spreading layer 135 may be made of a transparent material such as a transparent conductive oxide or may as well be part of the first semiconductor layer 110.
Portions of a metal layer 130 are arranged on a side of the first semiconductor layer. For example, the metal layer 130 may comprise a usually employed contact material such as AuGe, PdGe, Ag, Ag, etc. The metal layer 130 may comprise several sub-layers. For example, the metal layer 130 may further comprise a layer of transparent conducting oxide such as ITO below any of these contact materials.
Moreover, a further metal may be formed over the contact layer. The further metal may comprise silver or gold or another metal having a high reflectivity. A horizontal width s of the portion of the metal layer may be larger or smaller than or be equal to a smallest width d of the conductive body 126 of the separating element 126. According to embodiments, the horizontal width s may be larger than or equal to the smallest width d. In this case, a directionality of the emitted electromagnetic radiation may be further improved.
A height h of the portions of the metal layer may be equal to or larger than 0.1*we, where we is the width of the emitting area of the light emitting portions.
For example, a size of the single optoelectronic semiconductor devices 10 may be smaller than 10 μm. As is further illustrated in
The optoelectronic apparatus 20 of
Accordingly, the portions of the metal layer 130 implement an inverse trapezoidal metal grid. The inverse trapezoidal metal grid which is illustrated in
The optoelectronic apparatus 20 of
For example, the dielectric layer 132 may comprise a dielectric mirror. Generally, a dielectric or DBR mirror may comprise first layers of a first composition and second layers of a second composition which are alternately stacked. The first and the second layers may be dielectric layers. For example, the first layers may have a high refractive index and the second layers may have a low refractive index. In this context, the terms “high refractive index” and “low refractive index” may mean that the high refractive index is larger than a certain value that may depend on the material system. The low refractive index is smaller than the certain value.
For example, the layer thickness may be approximately λ/4 or a multiple of λ/4, wherein λ denotes the wavelength of the light to be reflected in the specific medium. The dielectric or DBR mirror may comprise more than two different layers. For example, a maximum number of layers may be 10. A typical layer thickness of the single layers may be 30 to 90 nm, e.g. approximately 50 nm.
The optoelectronic apparatus 20 of
The optoelectronic apparatus 20 of
According to embodiments, the optoelectronic apparatus illustrated in
The active zone 115 may, for example, comprise a pn junction, a double heterostructure, a single quantum well (SQW) structure or a multi quantum well (MQW) structure for generating radiation. In this context, the term “quantum well structure” has no meaning with regard to the dimensionality of the quantization. Thus, it includes, among other things, quantum wells, quantum wires and quantum dots, as well as any combination of these layers.
Adjacent optoelectronic semiconductor devices are separated by separating elements 125 that vertically extend through the semiconductor layer stack 105. The optoelectronic semiconductor devices 10 are configured to emit generated electromagnetic radiation 15 via a first main surface 111 of the first semiconductor layer 110. The optoelectronic apparatus 20 further comprises portions of a metal layer or first contact elements 136 arranged on a side of the first semiconductor layer 110 facing away from the active zone 115 and being arranged at positions of the separating elements 125.
The optoelectronic apparatus 20 may be arranged over a suitable carrier 100 that may be made of an insulating, conductive or semiconductor material. The separating elements 125 that are arranged between adjacent optoelectronic semiconductor devices may comprise a conductive body 126 and an insulating layer 129 insulating the conductive body 126 from the semiconductor layer stack 105. For example, the conductive body may comprise a separating metal layer 127. The separating metal layer 127 may e.g. comprise a transparent conductive oxide such as ITO (“Indium Tin Oxide”). The separating metal layer 127 may be arranged adjacent to the insulating layer 129. For example, the separating metal layer 127 may extend from a portion beneath the second semiconductor layer 120 to a region above the active zone 115. Horizontal portions of the separating metal layer may be electrically connected to the second semiconductor layer.
A material of the first and second semiconductor layers 110, 120 may comprise InxGayAl1-x-yP, with 0≤x≤1, 0≤y≤1, or GaN and InGaN.
A second current spreading layer 140 may be arranged over the carrier 100. The second current spreading layer 140 may be electrically connected to the second semiconductor layer 120 via the separating metal layer 127. Portions of the second current spreading layer 140 may form part of the conductive body 126 of the separating elements 125.
For example, the structure shown in
The first current spreading layer 135 may be arranged over the first main surface 111 of the first semiconductor layer 110. The separating elements 125 may extend to the first current spreading layer 135. A horizontal upper portion of the insulating layer 129 may be adjacent to the first current spreading layer 135. The first current spreading layer 135 may be made of a transparent material such as a transparent conductive oxide.
Portions of a metal layer 136 are arranged on a side of the first semiconductor layer. For example, the metal layer may comprise a usually employed contact material such as AuGe, PdGe, Ag, Ag, etc. The metal layer may comprise several sub-layers. For example, the metal layer may further comprise a layer of transparent conducting oxide such as ITO below any of these contact materials. For example, a size of the single optoelectronic semiconductor devices 10 may be smaller than 10 μm.
The portions 136 of the conductive layer may implement first contact elements for electrically connecting the first current spreading layer 135. A height h of the first contact elements 136 may be arbitrary. For example, the height h of the first contact elements 136 may be smaller than 0.1*we, where we is the width of the emitting area of a light emitting portion.
The holes 108 may be identical or mutually different. For example, they may differ in depth, shape and/or width. Moreover, various fillings of the holes 108 will be described in the following. The fillings of the holes 108 may be identical or mutually different. For example, some of the holes 108 may be filled while others are not filled. According to further embodiments, the other holes may be filled with different materials. The distance between neighboring holes 108 may be identical or mutually different.
According to further embodiments, the semiconductor body including the holes 108 as e.g. illustrated in
Generally, in the context of the present disclosure, the term “ordered photonic structure” means a structure the structural elements of which are arranged at predetermined locations. The arrangement pattern of the structural elements is subject to a specific order. The functionality of the ordered photonic structure results from the arrangement of the structural elements. The structural elements are, for example, arranged such that diffraction effects occur. The structural elements may be arranged periodically, for example, so that a photonic crystal is realized. According to further embodiments, the structural elements may be arranged such that they represent deterministic aperiodic structures, for example Vogel spirals. According to further embodiments, the structural elements may be arranged such that they realize a quasi-periodic crystal, for example an Archimedean lattice.
Components of the optoelectronic semiconductor devices 10 may be identical or similar to those as have been discussed with reference to
According to embodiments, the dielectric filling 109 may have the same or a similar refractive index as the first semiconductor layer 110. As a result, the light extraction of this optoelectronic semiconductor device 10 may be similar to the light extraction of an optoelectronic semiconductor device without a void. For example, if GaN is taken as a material of the first semiconductor layer, Ti2O3 may be used as an index matched dielectric material 109.
According to further embodiments, the dielectric filling 109 may have a refractive index which is different from the refractive index of the adjacent semiconductor material.
Moreover, as is shown in
When the dielectric filling 109 has a refractive index which is different from the refractive index of the adjacent semiconductor material, due to refraction and reduced absorption, the amount and direction of the emitted electromagnetic radiation may be changed.
According to further embodiments, the semiconductor body including the holes 108 which are employed according to embodiments shown in
According to further modifications, the angle β may be larger than 90°, as is illustrated in the middle portion of
As is illustrated in the right-hand portion of
When the plurality of holes 108 that may optionally extend to the active zone 115 are to be formed, it is possible to grow the first semiconductor layer using a SAG (“Selective Area Growth”) epitaxy method. According to further embodiments, the semiconductor layer may be grown and subsequently be etched.
The design of the holes (e.g. width, depth, sidewall slope) may be optimized for directionality and emission enhancement. The specific design may be tuned by correspondingly tuning the lithography and etching method. For example, the dry etching parameters may be appropriately selected. Further, it is possible to selectively etch the crystal facets. According to further embodiments, an epitaxial process, e.g. a SAG epitaxial process may be appropriately tuned.
According to further embodiments, a modification material 113 which may substantially change the optical properties of the first semiconductor layer 110 may be arranged in the holes 108. For example, as is illustrated in
According to further embodiments, as is shown in
Generally, the layer thickness and the material of the modification material 113 may be optimized for the desired emission angle, emission enhancement and other properties such as spreading.
Due to the implementations shown in
As is shown in
The further components of the semiconductor device illustrated in
The optoelectronic semiconductor device 10 shown in
Another method may comprise etching the micro-lenses by wet etching first using a resist mask until the InGaAlP layer has been reached. Thereafter, the etching process may be continued after removal of the photoresist mask, to produce the desired curvature of the InAlP lens and, thus, to form a microlens.
According to further embodiments, the micro-lenses may be formed of a material having a refractive index which is matched to the material of the semiconductor layer. For example, in case of using a GaN semiconductor material the lenses may be formed of TiOx.
Portions of a dielectric layer 123, e.g. SiO2 are arranged over the growth substrate so as to insulate adjacent optoelectronic semiconductor devices 10. Using this method, first the first semiconductor layer is grown, followed by the active zone 115. After patterning the active zone 115, the second semiconductor layer 120 is epitaxially grown. According to this method, no semiconductor material is grown over portions of the growth substrate that are covered by the portions of the dielectric layer 123. After forming the second current spreading layer 140 over the carrier 100 and attaching these to the semiconductor layer stack 105, the growth substrate is removed so as to expose the dielectric layer 123. Thereafter, a material for forming the micro-lenses, e.g. TiOx is formed over a resulting surface. The material layer is patterned to form a plurality of micro-lenses 122 and a first contact element 136 is formed over a resulting surface.
As has been described above, by e.g. forming portions of a metal layer over the emission surface, forming voids in the first semiconductor layer and/or forming lenses over the light emitting portions and reducing a width of the active zone 115, micro LEDs having a greatly improved directionality may be provided. For example, the material of the lenses may be or comprise a material of the semiconductor layers. According to further embodiments, the material of the lenses may be different from the material of the semiconductor layers.
An optoelectronic apparatus comprising an array of optoelectronic semiconductor devices as has been described above may e.g. be employed as a Virtual Reality display, an Augmented Reality Display or a general projection device.
For such applications, each individual micro LED in the array may be made individually addressable, by means of individual p- or n-contacts, for example.
While embodiments of the invention have been described above, it is obvious that further embodiments may be implemented. For example, further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above. Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.
Number | Date | Country | Kind |
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10 2021 123 119.1 | Sep 2021 | DE | national |
This patent application is a national phase filing under section 371 of PCT/EP2022/074101, filed Aug. 30, 2022, which claims the priority of German patent application 10 2021 123 119.1, filed Sep. 7, 2021, each of which is incorporated herein by reference in its entirety.
Filing Document | Filing Date | Country | Kind |
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PCT/EP2022/074101 | 8/30/2022 | WO |