Patent Application
20210313500
An optoelectronic semiconductor chip is disclosed, an optoelectronic component, as well as a method of manufacturing an optoelectronic component.
It is an object of the present disclosure to specify an optoelectronic semiconductor chip that can be operated particularly efficiently. Another object is to specify an optoelectronic component comprising such an optoelectronic semiconductor chip. Further, it is an object to specify a method of manufacturing such an optoelectronic component.
An optoelectronic semiconductor chip is specified. The optoelectronic semiconductor chip can, for example, be a radiation-emitting semiconductor chip, which generates electromagnetic radiation, for example light, during operation. The optoelectronic semiconductor chip can then be a light-emitting diode chip in particular. It is also possible that the optoelectronic semiconductor chip is a radiation-receiving semiconductor chip that detects electromagnetic radiation during operation. The optoelectronic semiconductor chip is then a photodiode chip, for example.
According to at least one embodiment, the optoelectronic semiconductor chip comprises a substrate that is transmissive for radiation. The substrate is the mechanically supporting component of the optoelectronic semiconductor chip, which mechanically carries and supports the other components of the optoelectronic semiconductor chip. For example, the substrate can be a growth substrate on which further layers of the optoelectronic semiconductor chip are epitaxially deposited. Furthermore, the substrate can be a carrier on which further layers of the optoelectronic semiconductor chip are applied. The substrate is transmissive for radiation. This means that the substrate is especially transmissive for electromagnetic radiation generated or to be detected in the optoelectronic semiconductor chip during operation. For example, the substrate can be transparent or diffusely scattering. For example, the substrate is formed with glass and/or sapphire or consists of one of these materials.
The substrate can be cylindrical or cuboidal, for example. The substrate has a top surface, a bottom surface and at least one side surface, which connect the top surface and the bottom surface. Subsequent layers of the optoelectronic semiconductor chip can be applied to the top surface, for example. Through the areas of the outer surface of the substrate not covered by further layers of the optoelectronic semiconductor chip, the electromagnetic radiation generated in the optoelectronic semiconductor chip can exit or the electromagnetic radiation to be detected can enter. These surfaces can be smooth or roughened in certain areas or completely. A roughening of the outer surface of the substrate intended for radiation exit or radiation entry may increase the probability of light exit or entry.
According to at least one embodiment, the optoelectronic semiconductor chip comprises a semiconductor layer sequence having a first region of a first conductivity type, a second region of a second conductivity type, and an active region between the first region and the second region. For example, the first region can be an n-doped region and the second region can be a p-doped region. During operation of the optoelectronic semiconductor chip, the electromagnetic radiation to be emitted is generated, or the electromagnetic radiation to be detected is detected, in the active region. The semiconductor layer sequence can be based, for example, on a III-V compound semiconductor material, such as a nitride compound semiconductor material.
According to at least one embodiment, the optoelectronic semiconductor chip comprises a first contact ridge for energizing the first region. The contact ridge is electrically connected to the first region. The first contact ridge can, for example, be directly connected to the first region or at least one through-connection is arranged between the first contact ridge and the first region.
According to at least one embodiment, the optoelectronic semiconductor chip comprises a second contact ridge for energizing the second region. The second contact ridge is electrically connected to the second region. For example, the second contact ridge is in direct contact with the second region or at least one further current expansion layer is arranged between the second contact ridge and the second region.
Both contact ridges are elongated. This means that the contact ridges have a main extension direction along which they are longer than they are wide or thick in a direction perpendicular to it. The width of the contact ridges is measured, for example, in a direction perpendicular to the main extension direction and perpendicular to a stacking direction in which the regions of the semiconductor layer sequence are applied on top of each other. Furthermore, the contact ridges are characterized in particular by a thickness, measured parallel to the stacking direction, which is small compared to the width and the length of the contact ridges. For example, the length of a contact ridge is larger than its width by at least a factor of 5, in particular at least a factor of 10, and the width of the contact ridge may be larger than the thickness of the contact ridge by at least a factor of 5, in particular at least a factor of 10.
The contact ridges may be metallic. In particular, the contact ridges can be formed with particularly ductile metals or metal alloys. For this purpose, the contact ridges can include metals such as nickel, copper and/or gold or consist of one of these materials.
Overall, the geometry and nature of the contact ridges with respect to the material of which they are made can make them particularly flexible, which can prevent breakage under mechanical stress and/or temperature variations.
According to at least one embodiment, the optoelectronic semiconductor chip comprises a first connection point for contacting the first contact ridge from outside the optoelectronic semiconductor chip, and a second connection point for contacting the second contact ridge from outside the optoelectronic semiconductor chip. Via the connection points, it is possible, for example, to mount the optoelectronic semiconductor chip using a surface mounting technique. In this case, the optoelectronic semiconductor chip can be surface mounted. The connection points are intended, for example, to be soldered or electrically conductively bonded to a carrier, such as a printed circuit board. The connection points can, for example, have a mounting surface with which the optoelectronic semiconductor chip rests at its destination. In particular, it is possible for the optoelectronic semiconductor chip to have exactly two connection points, a single first and a single second connection point.
According to at least one embodiment of the optoelectronic semiconductor chip, the first contact ridge and the second contact ridge each extend over at least 50% of the length of the semiconductor chip. For example, the semiconductor chip has a main extension direction which is perpendicular to the stacking direction of the semiconductor layer sequence. The semiconductor chip then has its greatest lateral extension along the main extension direction. The contact ridges can run parallel to the main extension direction and each of them can extend over a length of 50% of the length of the semiconductor chip. Contact ridges with such a large length allow the largest possible area of the semiconductor layer sequence to be energized. This makes it possible to apply current to the optoelectronic semiconductor chip via only a few contact ridges, in extreme cases exactly over one first and exactly one second contact ridge. The optoelectronic semiconductor chip can thus be produced with low manufacturing costs and is still particularly efficient to operate.
According to at least one embodiment, an optoelectronic semiconductor chip is specified, comprising
An optoelectronic semiconductor chip described here is suitable for use in an LED filament, for example. In such a filament, optoelectronic semiconductor chips are applied to a carrier along a main extension direction of the filament. An optoelectronic semiconductor chip described here can now be made particularly long, rectangular and with a large geometric aspect ratio (the ratio of length to width). In this way, a single optoelectronic semiconductor chip described here can replace several small chips. As a result, the carrier of the light thread must be equipped with fewer chips. The optoelectronic semiconductor chip described here is suitable for particularly efficient low current operation.
According to at least one embodiment of the optoelectronic semiconductor chip, the first contact ridge vertically overlaps with the second connection point and/or the second contact ridge vertically overlaps with the first connection point. In particular, it is possible that the first contact ridge also overlaps with the first connection point and the second contact ridge overlaps with the second connection point. This makes it in particular possible that both contact ridges extend so far that they overlap with both connection points. “Vertically overlap” here means that the vertically overlapping elements are arranged directly on top of each other in a vertical direction parallel to the stacking direction of the semiconductor layer sequence.
According to at least one embodiment of the optoelectronic semiconductor chip, the first contact ridge and the second contact ridge overlap vertically. This means that the two contact ridges are arranged one above the other in the semiconductor chip. This enables an optoelectronic semiconductor chip in which the contact ridges shield particularly little electromagnetic radiation. In particular, this makes it possible for the optoelectronic semiconductor chip to emit or receive electromagnetic radiation not only through the outer surfaces of the substrate, but also through the bottom surface of the semiconductor chip facing away from the substrate, where the contact ridges are also formed. In this way, the optoelectronic semiconductor chip can receive or emit electromagnetic radiation over almost its entire outer surface. This makes it possible, for example, to mount a conversion element, which can convert the primary radiation generated in the optoelectronic semiconductor chip into secondary radiation of a different wavelength, on the side of the semiconductor layer sequence facing away from the substrate, for example between the first and second connection points.
For example, the vertically overlapping contact ridges can have the same width. In this way, it is possible that they are congruently arranged one above the other at least in places.
In particular, it is possible that at least one through-connection, especially a plurality of through-connections, extends from the first contact ridge through the second contact ridge into the first region. The first contact ridge is then electrically conductively connected to the first region of the semiconductor layer sequence via the through-connection.
According to at least one embodiment of the optoelectronic semiconductor chip, the substrate has a thickness of at least 300 μm. For example, the substrate has a thickness of at least 300 and at most 700 μm. The substrate consists for example of sapphire or a glass. The use of such thick substrates is made possible, for example, by special separation techniques for separating the optoelectronic semiconductor chips. For example, the semiconductor chips are separated by laser-assisted via drilling. For a radiation-emitting optoelectronic semiconductor chip, the light extraction through the outer surface of the substrate improves with the increasing thickness of the substrate. Furthermore, the large thickness of the substrate allows to roughen the outer surface of the substrate, which is free of the semiconductor layer sequence, for example by coupled plasma etching. In this way, the probability of light exit or light entry can be further increased.
According to at least one embodiment of the optoelectronic semiconductor chip, the optoelectronic semiconductor chip comprises a mirror which is arranged between the first contact ridge and the first connection point and/or between the second contact ridge and the second connection point. The mirror can only be located vertically above the connection points. Furthermore, it is possible that the mirror extends over the entire surface on the side of the semiconductor layer sequence that is facing away from the substrate. In this case, it is not possible for light to enter and/or exit this side of the semiconductor chip. Instead, a particularly large amount of electromagnetic radiation is reflected to the uncovered outer surface of the substrate.
The mirror comprises in particular a first mirror layer which is metallic, a second mirror layer which is a Bragg mirror, and a third mirror layer which is a Bragg mirror. For example, from a connection point, the first mirror layer follows on the side of the connection point facing the semiconductor layer sequence, then the second mirror layer on the side of the first mirror layer facing away from the connection point, and then the third mirror layer on the side of the second mirror layer facing away from the connection point. The second mirror layer and the third mirror layer can each be Bragg mirrors (DBR—“Distributed Bragg Reflection” mirrors) with eight pairs of layers of TiO2 and SiO2 each, which are alternately arranged on top of each other. The first mirror layer can contain silver and/or aluminum, for example, or consist of one of these materials.
In other words, on the side of the second region of the semiconductor layer sequence that is facing away from the active region, the mirror follows. Between the mirror and the second region, which is for example p-conducting, a current expansion layer can be arranged, which is formed with a transparent conductive oxide (TCO) like ITO or ZnO. Subsequently, the two Bragg mirrors can be arranged, which can be covered by the metal mirror.
It is also possible that the mirror extends from the first connection point to the second connection point along the contact ridges. In particular, the mirror and the contact ridges can then overlap vertically. This means that the mirror can vertically overlap with each of the contact ridges. The width of the mirror can then also be equal to the width of the associated contact ridge except for a deviation of ±10% at most. In this way, light is reflected only in the area of the contact ridges, which reduces the absorption of electromagnetic radiation at the contact ridges.
According to at least one embodiment of the optoelectronic semiconductor chip, the first mirror layer extends through openings in the second mirror layer and the third mirror layer and provides an electrically conductive connection between the first contact ridge and the first connection point and/or between the second contact ridge and the second connection point. This means that the first mirror layer has a double function in this case: on the one hand, it reflects electromagnetic radiation that is generated or detected in the active region, and on the other hand, it serves as an electrically conductive connection between the connection point and the contact ridge associated with the connection point. The feed-throughs through the second and third mirror layers, i.e. the openings for connecting the contact ridges to the connection points, can be designed as elongated trenches or cylindrical.
Furthermore, an optoelectronic component is specified. According to at least one embodiment, the optoelectronic component comprises at least one optoelectronic semiconductor chip which is designed to emit electromagnetic radiation during operation. In particular, the optoelectronic semiconductor chip may be an optoelectronic semiconductor chip described here. This means that all features described for an optoelectronic semiconductor chip described here are also disclosed for the optoelectronic component and vice versa.
According to at least one embodiment of the optoelectronic component, the optoelectronic component comprises a first conversion element on a side of the semiconductor layer sequence facing away from the substrate of the optoelectronic semiconductor chip between the first connection point and the second connection point, and/or a second conversion element on a side of the substrate facing away from the semiconductor layer sequence. This means that the at least one optoelectronic semiconductor chip of the optoelectronic component comprises at least one conversion element which follows the semiconductor layer sequence on its side facing away from the substrate or which is applied to an outer side of the substrate. In particular, it is also possible that the optoelectronic semiconductor chip has both of these conversion elements. In the case that the optoelectronic component has two or more optoelectronic semiconductor chips, at least some of them may have a first and/or a second conversion element arranged downstream in the manner described.
“At least some” means here and in the following that the method step can be performed for at least one, more than one or all of the components.
The use of a first conversion element on a side of the semiconductor layer sequence facing away from the substrate between the first connection point and the second connection point is possible in a particularly advantageous manner if the contact ridges of the semiconductor chip are arranged vertically overlapping. In this case, the contact ridges shield particularly little electromagnetic radiation, and particularly much electromagnetic radiation reaches the underside of the semiconductor layer sequence facing away from the substrate and can exit the optoelectronic semiconductor chip there.
The conversion elements are each designed to convert primary radiation generated by the optoelectronic semiconductor chip during operation into secondary radiation from a wider wavelength range than the primary radiation. In particular, the first and second conversion elements can contain different phosphors, so that they emit secondary radiation in different wavelength ranges. For example, the first conversion element is designed to at least partially convert primary radiation from the wavelength range of blue or ultraviolet light into secondary radiation in the wavelength range of red light. The second conversion element can be designed to convert at least partially the primary radiation into secondary radiation in the wavelength range of yellow and/or green light. Alternatively, it is possible that the second conversion element emits secondary radiation from the wavelength range of red light and the first conversion element emits secondary radiation from the wavelength range of yellow and/or green light.
According to at least one embodiment of the optoelectronic component, the optoelectronic component comprises a carrier on which a plurality of the optoelectronic semiconductor chips is arranged. The semiconductor chips can be arranged one behind the other, in particular along a main extension direction of the carrier. It is especially advantageous if the main extension direction of the semiconductor chips is parallel to the main extension direction of the carrier within the manufacturing tolerance. In this way, especially few optoelectronic semiconductor chips are required for the assembly of an elongated carrier, for example for forming a light thread.
In particular, the carrier can be designed to be transmissive for radiation in places, for example transparent or diffusely scattering. For this purpose, the carrier can be formed with a glass, a plastic or sapphire, for example. Furthermore, the carrier includes contacts and, if necessary, through-connections or conductor paths for the electrical connection of the optoelectronic semiconductor chips.
The substrate can be formed with sapphire or consist of sapphire, for example. It is also possible that the substrate is formed with glass or consists of glass.
Furthermore, a method of manufacturing an optoelectronic component is specified. In particular, an optoelectronic component described here can be manufactured by this method. This means that all features disclosed for the optoelectronic component described here are also disclosed for the method and vice versa.
The method comprises a method step in which a carrier with contacts is provided. The carrier may, for example, have a radiation-transmissive base material to which the contacts are applied. For example, the carrier can be formed with glass.
In a subsequent method step, first conversion elements are applied to the carrier between at least some of the contacts. The application of the conversion elements can be done by a printing process, for example. For this purpose, the conversion elements can, for example, contain a printable matrix material such as silicone or a sol-gel material into which particles of a phosphor are incorporated. In particular, it is also possible to apply conversion elements containing different phosphors to different parts of the substrate.
In a next method step, at least some of the contacts are connected to connection points of an optoelectronic semiconductor chip, so that in at least some of the optoelectronic semiconductor chips a first conversion element is arranged on a side of the semiconductor layer sequence facing away from the substrate between the first connection point and the second connection point of the optoelectronic semiconductor chip. It is possible that the semiconductor chip and the associated first conversion element are spaced from each other in the sense that there is a gap between the first conversion element and the optoelectronic semiconductor chip arranged above it. It is also possible that the conversion element is so thick that a direct contact is created between the semiconductor chip and the associated first conversion element.
As an optoelectronic semiconductor chip, an optoelectronic semiconductor chip described here is particularly suitable, so that all features disclosed for the optoelectronic semiconductor chip are also disclosed for the method and vice versa.
According to at least one embodiment of the method, a second conversion element is applied to at least some of the optoelectronic semiconductor chips on a side facing away from the carrier.
The method described here can be performed in particular in the order described here. In particular, the method step of applying the first conversion element to the carrier is carried out, according to an embodiment of the method, before connecting the optoelectronic semiconductor chips to at least some of the contacts of the carrier. In other words, the conversion elements are then attached to the carrier before the semiconductor chips. The second conversion elements can be attached to the semiconductor chips before or after the carrier is assembled. The method is based inter alia on the idea that a few, particularly long optoelectronic semiconductor chips require fewer assembly steps in the production of, for example, light filaments than would be the case for many, short optoelectronic semiconductor chips. The series connection of such long optoelectronic semiconductor chips requires low operating voltages. The optoelectronic component can therefore be an LED filament with a particular advantage.
In the following, the optoelectronic semiconductor chips described here, the optoelectronic components described here and the methods described here are explained in more detail by means of non-limiting embodiments and the corresponding figures.
The schematic illustrations of
The schematic illustrations in
Identical, similar or equivalent elements are provided with the same reference signs in the figures. The figures and the proportions of the elements represented in the figures among each other are not to be considered as true to scale. Rather, individual elements may be oversized for better representability and/or for better comprehensibility.
The optoelectronic semiconductor chip 10 comprises a substrate 11, which for example consists of sapphire, and a thickness d in a vertical direction v, which is parallel to the stacking direction of a semiconductor layer sequence 12. The thickness is at least 300 μm, for example. Furthermore, the thickness can be at most 700 μm, for example.
The semiconductor layer sequence 12, which is based on a III-V compound semiconductor material, for example, is applied to an underside of the substrate 11. The semiconductor layer sequence 12 comprises a first region 12a, which for example is n-conducting, a second region 12b, which for example is p-conducting, and an active region 12c.
The second contact ridge 14b can be electrically connected to the second region 12b of the semiconductor layer sequence 12 via a current expansion layer 13, which is formed, for example, with a TCO (transparent conductive oxide) material such as ITO.
The depicted optoelectronic semiconductor chip 10 is designed for surface mounting via the first connection point 17a, which is provided for contacting the first region 12a, for example, and the second connection point 17b, which is provided for contacting the second region 12b, for example.
The schematic illustration of
The first and second contact points 16a, 16b form contact pins, which can be particularly high. In particular, the height of the contact points 16a, 16b in vertical direction v can be large against their diameter. For example, the contact points 16a, 16b are cylindrical. The contact points 16a, 16b can be formed with a ductile metal, which can include nickel and/or copper and/or gold, for example. The associated contact ridges 14a, 14b can be formed with the same material. The contact points 16a, 16b and/or the contact ridges 14a, 14b can thus easily transfer mechanical forces acting on the semiconductor chip 10 to a carrier to which the semiconductor chips 10 are attached and do not break when the temperature of the semiconductor chip 10 changes.
At the upper side of the second contact ridges 14b and the second contact points 16b facing the semiconductor layer sequence 12, there is a blocking layer 15 for current, which prevents the generation of electromagnetic radiation directly above the second contact points 16b and the second contact ridges 14b.
The blocking layer 15 can be formed with SiO2, for example, wherein the blocking layer 15 can be structured by etching.
In connection with the schematic illustrations of
At least in some areas, the optoelectronic semiconductor chip may have a mirror 19 on its underside facing away from the substrate 11, which is intended to reflect electromagnetic radiation generated or to be detected in the semiconductor chip. The mirror 19 can be formed over a large area on the underside of the semiconductor chip between the connection points 17a and 17b and cover these completely, or the mirror 19 is only arranged in the area of the contact ridges 14a, 14b and overlaps these vertically.
As can be seen, for example, in the schematic sectional view of
In connection with the schematic illustrations of
On the underside of the semiconductor layer sequence 12 facing away from the substrate 11, a first conversion element 1 is arranged in direct contact with the semiconductor chip between the two connection points 17a and 17b. The two conversion elements 21, 22 may differ from each other with respect to the phosphors used. In particular, the first conversion element 21 can contain a material that is a particularly good thermal conductor and thus contribute to heat dissipation from the optoelectronic semiconductor chip 10.
The first conversion element 21, for example, is configured to emit green secondary radiation, the second conversion element 22 is then configured to emit red secondary radiation. For example, blue light is generated in the active region 12c of the optoelectronic semiconductor chip 10. Because the entire outer surface of the optoelectronic semiconductor chip 10 in the exemplary embodiment of
In contrast to the exemplary embodiment of
It has been found that the spatial separation of different conversion elements, i.e. in this case the first conversion element 21 and the second conversion element 22, increases the efficiency of light generation. Due to this spatial separation, already converted light has a lower probability to lose energy at another conversion element in a further inelastic scattering process. The heat dissipation of the conversion elements is also optimized by the large-area contact at the optoelectronic semiconductor chip 1.
In connection with the schematic sectional views of
In the method, a substrate 11 is first provided, which can be a growth substrate formed with sapphire. The semiconductor layer sequence 12 comprising the first region 12a, the second region 12b and between them the active region 12c is epitaxially deposited on the substrate 11.
A blocking layer 15 is applied to the top side of the semiconductor layer sequence 12 facing away from the substrate 11.
In the next method step,
In the method step described in connection with
In the next method step,
Using the schematic sectional view of
For example, the first mirror layer 19a is formed with aluminum. The first mirror layer 19a can metallize a large area of one or both of the connection points,
The second mirror layer and the third mirror layer are, for example, each formed by Bragg mirrors with eight pairs of TiO2/SiO2 each. In such a mirror 19, the first mirror layer 19a is used for cooling the chip, for the electrical connection between the contact ridge and the connection point, and for reflecting electromagnetic radiation.
In connection with the schematic illustration in
In contrast to the exemplary embodiment of
In contrast to the exemplary embodiment of
In the exemplary embodiment of
In connection with the schematic illustrations of
In a previous or subsequent method step, second conversion elements 22 can be applied to the semiconductor chips 10, resulting in an optoelectronic component 1 as shown in connection with
In connection with
The features and exemplary embodiments described in connection with the figures can be combined with each other according to further exemplary embodiments, even if not all combinations are explicitly described. Furthermore, the exemplary embodiments described in connection with the figures may alternatively or additionally have further features as described in the general part.
This patent application claims the priority of German patent application 102018119438.2, the disclosure content of which is hereby incorporated by reference.
The invention is not limited to the exemplary embodiments by the description based on the same. Rather, the invention comprises any new feature as well as any combination of features, which in particular includes any combination of features in the claims, even if this feature or this combination itself is not explicitly stated in the claims or exemplary embodiments.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10 2018 119 438.2 | Aug 2018 | DE | national |
The present application is a national stage entry according to 35 U.S.C. § 371 of PCT application No.: PCT/EP2019/069809 filed on Jul. 23, 2019; which claims priority to German Patent Application Serial No.: 10 2018 119 438.2 filed on Aug. 9, 2018; all of which are incorporated herein by reference in their entirety and for all purposes.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2019/069809 | 7/23/2019 | WO | 00 |
