Patent Application
20230369827
An optoelectronic semiconductor component and a method for producing the same are specified. In particular, the optoelectronic semiconductor component is an edge-emitting laser component.
In the case of edge-emitting laser diodes, it is a known problem that strong heating and degradation can occur at a mirror facet intended for radiation outcoupling due to very high optical power densities. Above a certain power threshold, COMD (Catastrophic Optical Mirror Damage) occurs, leading to a sudden failure of the component. This problem can be countered by reducing the current flow to the mirror facet. However, previous approaches are limited in that the current flow to the mirror facet can only be reduced on a side of an active zone of the laser diode facing away from the substrate. For example, a current can be laterally constricted by retracting a contact layer facing away from the substrate from the mirror facet.
It is an object of the present disclosure to specify a robust optoelectronic semiconductor component that is relatively easy to manufacture. Another object to be achieved is to specify a relatively simple method for producing a robust optoelectronic semiconductor component.
These objects are achieved, inter alia, by an optoelectronic semiconductor component and a method for producing an optoelectronic semiconductor component having the features of the independent claims.
According to at least one embodiment of an optoelectronic semiconductor component, the optoelectronic semiconductor component comprises at least one layer stack comprising an active zone for generating electromagnetic radiation and at least one aluminum-containing current constriction layer comprising a first region and a second region, the second region having a lower electrical conductivity than the first region. Further, the layer stack has a side surface which laterally delimits the layer stack and at which the second region is arranged, the second region being an oxidized region. By means of the current constriction layer, the current flow to the side surface can be reduced and the current can be laterally constricted. Advantageously, the second region reduces the current flow in the region of the side surface, thereby increasing the stress limit of the semiconductor component.
In the present disclosure, the term “oxidized region” refers in particular to a region of an originally non-oxidized aluminum-containing current constriction layer or starting layer produced by oxidation. Oxidation can still take place after the layer stack has been produced.
Preferably, the starting layer is a high-aluminum AlGaInAsP layer with an aluminum content of at least 90%. Preferred values are 90%, 95%, 98%, 99% and 100%. In other words, the starting layer is formed of AlxGayIn1-x-yAsP, where 0.9 ≤ x ≤ 1 and x + y ≤ 1. Here, the indium and/or phosphorus content in the layer can vary, for example, to optimize band progressions and strains. Furthermore, the aluminum content can vary within the specified value range in the layer, for example by alloy ramps or a stack with different compositions. This allows, for example, an electrical series resistance and optical mode guiding to be optimized.
Further preferably, the first region is a non-oxidized region of the starting layer, so that its material composition corresponds in particular to that of the starting layer. Accordingly, the first region preferably contains or consists of AlxGayIn1-x-yAsP, where 0.9 ≤ x ≤ 1 and x + y ≤ 1. Furthermore, the second region in particular has a higher oxygen content than the first region.
In the present disclosure, “lateral” refers in particular to a direction running parallel to a main extension plane of the layer stack. In particular, the current constriction layer is arranged substantially parallel to the main extension plane. Furthermore, the first and second regions are preferably arranged side by side, that is, laterally non-overlapping for the most part, the first region being arranged on a side of the second region facing away from the side surface.
According to at least one embodiment, the second region has a lateral extent between 0.1 µm and 100 µm inclusive. Preferred values are 0.1 µm, 1 µm, 5 µm, 10 µm, 15 µm, 20 µm, 25 µm, 50 µm and 100 µm.
According to at least one embodiment, the layer stack comprises at least one n-type semiconductor layer and at least one p-type semiconductor layer, the active zone being arranged between the at least one n-type semiconductor layer and the at least one p-type semiconductor layer. The direction in which the n-type semiconductor layer, the active zone and the p-type semiconductor layer succeed each other is hereinafter referred to as the “vertical direction,” which is perpendicular to the lateral direction.
The at least one n-type semiconductor layer, the active zone and the at least one p-type semiconductor layer are, in particular, epitaxially grown layers on a substrate, wherein the substrate can remain in the finished semiconductor component or be removed and replaced by another carrier. Preferably, the current constriction layer is also an epitaxially grown layer. Advantageously, the current constriction layer can be integrated into the layer stack on a side of the active zone facing the substrate and/or facing away from the substrate. Thus, the current constriction layer may be located at different vertical positions in the layer stack. For example, the side of the active zone of the layer stack facing the substrate is the n-side, and the side of the active zone of the layer stack facing away from the substrate is the p-side of the layer stack. Alternatively, the side of the active zone facing the substrate may be the p-side, and the side of the active zone facing away from the substrate may be the n-side of the layer stack.
The active zone contains, for example, a sequence of individual layers by means of which a quantum well structure, in particular a single quantum well structure (SQW) or multiple quantum well structure (MQW), is formed.
Materials based on phosphide and/or arsenide compound semiconductors are preferably considered for the semiconductor layers of the layer stack. “Based on phosphide or arsenide compound semiconductors” means in the present context that the semiconductor layers contain AlnGamIn1-n-mP or AlnGamIn1-n-mAs, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1 and n+m ≤ 1. This material does not necessarily have to have a mathematically exact composition according to the above formula. Rather, it may include one or more dopants as well as additional constituents that do not substantially change the characteristic physical properties of the AlnGamIn1-n-mP or AlnGamIn1-n-mAs material. However, for the sake of simplicity, the above formula includes only the essential constituents of the crystal lattice (Al, Ga, In, P, and As, respectively), even though these may be partially replaced by small amounts of additional substances.
Depending on the position of the current constriction layer, i.e. whether it is located in the n-type region or p-type region of the layer stack, it can be n-doped or p-doped. Suitable dopants include Te, Si, Ge, S, C, Be, Mg, Zn and Se.
According to at least one embodiment, the optoelectronic semiconductor component is an edge-emitting laser component, and the side surface is provided for coupling out the electromagnetic radiation.
The electromagnetic radiation has a coherent portion. For example, the semiconductor component, preferably the layer stack, contains a resonator for this purpose, with the side surface or laser facet forming part of the resonator. In particular, the coherent portion of the electromagnetic radiation is laser radiation, for example infrared or visible laser radiation. The coherent portion may be, for example, laser radiation in the fundamental mode of the resonator.
According to at least one embodiment, the at least one layer stack has a first main surface and a second main surface, which are each arranged transversely to the side surface and, in particular, parallel to the main extension plane and vertically delimit the layer stack, the current constriction layer being arranged closer to the active zone than to the first and/or second main surface. In particular, the current constriction layer is arranged so close to the active zone that hardly any expansion of the laterally constricted current can take place in an intermediate region between the current constriction layer and the active zone. In addition, the current constriction layer is advantageously arranged at a distance from the active zone so that as little additional strains as possible are caused in the active zone by the current constriction layer.
The current constriction layer can have a vertical extent between 2 nm and 200 nm inclusive. Preferred values are 2 nm, 5 nm, 10 nm, 20 nm, 35 nm, 50 nm, 100 nm, 200 nm.
According to at least one embodiment, the layer stack comprises at least two aluminum-containing current constriction layers that differ from each other in their material composition and/or vertical extent and/or lateral extent of the second regions. For example, the different material compositions of the current constriction layers may be selected such that faster and thus laterally deeper penetrating oxidation occurs in the starting layer of one current constriction layer than in the starting layer of the other current constriction layer. In particular, the aluminum content of the current constriction layers with different material compositions differs. Further, it is possible that the different vertical extents or thicknesses of the starting layers are selected such that faster and thus laterally deeper penetrating oxidation occurs in one starting layer than in the other starting layer. In particular, the thicker current constriction layer has a greater lateral extent of the second region than the thinner current constriction layer.
Furthermore, the current constriction layers are preferably arranged at different vertical positions of the layer stack. For example, the current constriction layers may be arranged on different sides of the active zone. Furthermore, it is possible that at least two current constriction layers with different lateral extents of the second regions are directly adjacent to each other, whereby a desired current profile can be adjusted.
According to at least one embodiment, the optoelectronic semiconductor component comprises at least two layer stacks of the type mentioned above, which are arranged one above the other, with a tunnel junction being arranged between the layer stacks. The tunnel junction comprises, in particular, two highly doped layers of different conductivity types (n-type and p-type, respectively) and serves to electrically connect the layer stacks. In particular, the layer stacks are electrically connected in series by the tunnel junction. The tunnel junction forms particularly low potential barriers, which facilitates the tunneling of charge carriers between the active zones arranged one above the other. The tunneling generates charge carrier pairs necessary for the current flow between the two layer stacks.
Furthermore, the active zones of the layer stacks emit radiation in the same wavelength range in particular, so that the optical output power of the semiconductor component can be increased by the plurality of layer stacks.
According to at least one embodiment, the current constriction layer or several current constriction layers are arranged in the region of at least one of the following elements of the optoelectronic semiconductor component: p-contact layer, p-cladding layer, p-waveguide, active zone, n-contact layer, n-cladding layer, n-waveguide, buffer layer, nucleation layer, tunnel junction. As already mentioned above, the current constriction layer is advantageously arranged, on the one hand, so close to the active zone that hardly any expansion of the laterally constricted current can occur in an intermediate region between the current constriction layer and the active zone, and, on the other hand, so far away from the active zone that as little additional strains as possible caused by the current constriction layer occur there.
The method described below is suitable for producing an optoelectronic semiconductor component or a plurality of optoelectronic semiconductor components of the type mentioned above. Features described in connection with the semiconductor component can therefore also be used for the method and vice versa.
According to at least one embodiment of a method for producing an optoelectronic semiconductor component of the type mentioned above, the method comprises the following steps carried out in succession:
Preferably, the oxidation process already takes place at wafer level after the side surfaces of the layer stacks have been exposed or after facet breaking, the wafer comprising a large number of layer stacks which are arranged in a composite.
According to a preferred embodiment of the method, the second region is generated by means of lateral oxidation of the starting layer starting from the side surface. The lateral penetration depth or lateral extent of the second region is between 0.1 µm and 100 µm inclusive.
There are various ways of regulating the penetration depth of the oxidation. For example, the penetration depth can be regulated by the vertical extent of the current constriction layer. In particular, a thicker starting layer exhibits faster, deeper oxidation than a thinner starting layer.
Furthermore, the penetration depth of the oxidation can be regulated by the aluminum content of the starting layer. In particular, a higher aluminum content leads to faster, deeper oxidation.
Also, the penetration depth of the oxidation can be regulated by a duration of the oxidation process. In particular, a longer oxidation process leads to deeper oxidation.
The optoelectronic semiconductor component is particularly suitable for semiconductor laser applications in the automotive and multimedia sectors.
Further advantages, advantageous embodiments and further developments will become apparent from the exemplary embodiments described below in connection with the figures.
In the figures:
In the exemplary embodiments and figures, identical elements, elements of the same kind or elements having the same effect may each be provided with the same reference signs. The elements shown and their proportions to one another are not necessarily to be regarded as true to scale; rather, individual elements may be shown exaggeratedly large for better representability and/or better understanding.
The optoelectronic semiconductor component 1 includes the layer stack 2 and a substrate 3 on which the layer stack 2 is arranged. The substrate 3 may be a growth substrate on which the layer stack 2 is epitaxially grown or a replacement substrate which replaces the original growth substrate.
The layer stack 2 comprises a plurality of n-side, at least partially n-conductive layers 13, 11, 12 and a plurality of p-side, at least partially p-conductive layers 9, 8, 7, which follow each other in the vertical direction V. Furthermore, the layer stack 2 has an active zone 4 arranged between the n-side layers 11, 12, 13 and the p-side layers 7, 8, 9. In particular, layer 7 is a p-contact layer, layer 8 is a p-cladding layer, layer 9 is a p-waveguide, layer 12 is an n-waveguide, layer 11 is an n-cladding layer, and layer 13 is a buffer layer. The layer stack 2 may have further layers (not shown) between the aforementioned layers 7, 8, 9, 11, 12, 13.
Furthermore, the active zone 4 can contain a sequence of individual layers by means of which a quantum well structure, in particular a single quantum well (SQW) or multiple quantum well (MQW) structure, is formed.
Furthermore, both the p-waveguide 9 and the n-waveguide 12 may each have a sequence of individual layers preferably with alternating refractive indices.
For the layer stack 2 or the semiconductor layers 4, 7, 8, 9, 11, 12, 13 contained therein, materials based on phosphide and/or arsenide compound semiconductors, which have been described in more detail above, are preferably considered.
Further, the layer stack 2 comprises an aluminum-containing current constriction layer 5 comprising a first region 5A and a second region 5B, wherein the second region 5B has a lower electrical conductivity than the first region 5A and is an oxidized region.
The oxidized region 5B is generated by oxidation O of an originally non-oxidized aluminum-containing current constriction layer or starting layer 50 (cf.
The starting layer 50 is advantageously a high-aluminum AlGaInAsP layer with an aluminum content of at least 90%. Preferred values are 90%, 95%, 98%, 99% and 100%. In other words, the starting layer is formed of AlxGayIn1-x-yAsP, where 0.9 ≤ x ≤ 1 and x + y ≤ 1. Furthermore, the first region 5A is a non-oxidized region of the starting layer 50, so that its material composition corresponds in particular to that of the starting layer. Accordingly, the first region 5A preferably contains or consists of AlxGayIn1-x-yAsP, where 0.9 ≤ x ≤ 1 and x + y ≤ 1.
The second, oxidized region 5B is arranged at the side surface 2A and can thus reduce a current flow directed toward the side surface 2A. This protects the side surface 2A, which is in particular a mirror facet, from excessive heating and degradation and enables an increase of the optical output power, since this is often limited by the degradation of the mirror facet.
In the first exemplary embodiment, the current constriction layer 5 is arranged in the p-waveguide 9. The current constriction layer 5 is thus arranged so close to the active zone 4 that hardly any expansion of the laterally constricted current can occur in an intermediate region between the current constriction layer 5 and the active zone 4.
The second region 5B has a lateral extent b between 0.1 µm and 100 µm inclusive, with preferred values being 0.1 µm, 1 µm, 5 µm, 10 µm, 15 µm, 20 µm, 25 µm, 50 µm, and 100 µm.
Furthermore, the current constriction layer 5 may have a vertical extent d between 2 nm and 200 nm inclusive, with preferred values being 2 nm, 5 nm, 10 nm, 20 nm, 35 nm, 50 nm, 100 nm, 200 nm.
Referring to
In particular, the oxidized region 5B is generated by means of lateral oxidation O of the starting layer 50 starting from the side surface 2A.
In the exemplary embodiments shown in
For example, in the ninth exemplary embodiment shown in
Furthermore, in the tenth exemplary embodiment shown in
In the eleventh exemplary embodiment shown in
Furthermore, in the twelfth exemplary embodiment shown in
While the current constriction layers 5 in the exemplary embodiments shown in
In the fourteenth exemplary embodiment shown in
In particular, the semiconductor components 1 described in connection with
The invention is not limited by the description based on the exemplary embodiments. Rather, the invention encompasses any new feature as well as any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or combination itself is not explicitly stated in the patent claims or embodiments.
| Number | Date | Country | Kind |
|---|---|---|---|
| 102020123854.1 | Sep 2020 | DE | national |
The present application is a national stage entry from International Application No. PCT/EP2021/074389, filed on Sep. 3, 2021, published as International Publication No. WO 2022/053406 A1 on Mar. 17, 2022, and claims priority to German Application 10 2020 123 854.1 filed Sep. 14, 2020, the disclosures of all of which are hereby incorporated by reference herein in their entireties.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/EP2021/074389 | 9/3/2021 | WO |
