This application claims priority to Taiwanese Application Serial Number 102120749, filed Jun. 11, 2013, which is herein incorporated by reference.
1. Field of Invention
The present invention relates to a driving circuit and, more particularly, to a driving circuit of a organic light emitting diode.
2. Description of Related Art
Display panels utilizing current coded mode comprise at least two driving periods. One is a data writing (current programming) period. In this period, a capacitor of a driving circuit is charged by a data current, that is to say, a data voltage is written into the capacitor. The other is a light emitting period. In this period, the display panel controls the displaying brightness thereof according to the data voltage written into the capacitor.
In the foregoing data writing period, the data current can be written into the capacitor in a short time when the data current is large. Consequently, conditions associated with the data writing period are not affected. However, the data current is relatively small when the display panel needs to display a low gray level such that the time in which the data current is written into the capacitor increases substantially. As a result, the duration of the data writing period is increased substantially, and furthermore, the operation of writing data may fail.
One objective of the present invention is to provide a driving circuit. Through use of configurations and operations of the driving circuit, the problem of the time in which data current is written into a capacitor increasing substantially due to the data current being small when the display panel needs to display a low gray level is addressed. Furthermore, the duration of the data writing period can be controlled to within a time limitation to avoid data writing failure.
For achieving said purpose, one aspect of the present invention is related to a driving circuit for driving an organic light emitting diode in a display panel. The display panel comprises a plurality of scan lines. The driving circuit comprises a first transistor, a capacitor, a second transistor, and a charging circuit. The first transistor comprises an input terminal, a control terminal, and an output terminal. The capacitor comprises a first terminal and a second terminal. The second transistor comprises an input terminal, a control terminal, and an output terminal. With respect to structure, the input terminal of the first transistor is electrically coupled to a voltage source, and the output terminal of the first transistor is electrically coupled to the organic light emitting diode. The first terminal of the capacitor is electrically coupled to the control terminal of the first transistor. The input terminal of the second transistor is electrically coupled to the second terminal of the capacitor, the control terminal of the second transistor is electrically coupled to one of the scan lines, and the output terminal of the second transistor is electrically coupled to the output terminal of the first transistor. The charging circuit is electrically coupled to the first terminal and the second terminal of the capacitor, one of the scan lines, and a current source.
In one embodiment of the present invention, the second transistor is turned off according to a first scanning signal provided by one of the scan lines during a data writing period, and the charging circuit is turned on according to the first scanning signal transmitted by one of the scan lines to charge the capacitor during the data writing period.
In another embodiment of the present invention, the first scanning signal is a low level signal.
In yet another embodiment of the present invention, the charging circuit charges the capacitor according to a first current provided by the current source during the data writing period.
In still another embodiment of the present invention, the second transistor is turned on according to a second scanning signal provided by one of the scan lines during a light emitting period such that the capacitor provides a charge voltage to the control terminal and the output terminal of the first transistor.
In yet another embodiment of the present invention, the second scanning signal is a high level signal.
In still another embodiment of the present invention, the first transistor drives the organic light emitting diode according to the charge voltage during the light emitting period.
In yet another embodiment of the present invention, the charging circuit comprises a third transistor and a fourth transistor. The third transistor comprises an input terminal, a control terminal, and an output terminal. The fourth transistor comprises an input terminal, a control terminal, and an output terminal. With respect to structure, the control terminal of the third transistor is electrically coupled to one of the scan lines, and the output terminal of the third transistor is electrically coupled to the current source. The input terminal of the fourth transistor is electrically coupled to the voltage source, the control terminal of the fourth transistor is electrically coupled to the second terminal of the capacitor, and the output terminal of the fourth transistor is electrically coupled to the input terminal of the third transistor.
In still another embodiment of the present invention, the voltage source provides a second current to the organic light emitting diode during the light emitting period, wherein a relation between the second current and the first current provided by the current source is as follows:
where IOLED is the second current, Kn is a conduction parameter of the first transistor, Kp is a conduction parameter of the fourth transistor, and Idata is the first current.
In yet another embodiment of the present invention, the charging circuit further comprises a fifth transistor. The fifth transistor comprises an input terminal, a control terminal, and an output terminal. With respect to structure, the input terminal of the fifth transistor is electrically coupled to the input terminal of the fourth transistor and the voltage source, the control terminal of the fifth transistor is electrically coupled to one of the scan lines, and the output terminal of the fifth transistor is electrically coupled to the first terminal of the capacitor.
For solving problems existing in the prior art, the present invention provides an innovative driving circuit, and the driving circuit is shown in
With respect to structure, the input terminal of the first transistor M1 is electrically coupled to the voltage source VDD, and the output terminal of the first transistor M1 is electrically coupled to an organic light emitting diode OLEO. The first terminal of the capacitor Cs is electrically coupled to the control terminal of the first transistor M1. The input terminal of the second transistor M2 is electrically coupled to the second terminal of the capacitor Cs, the control terminal of the second transistor M2 is electrically coupled to a scan line 500, and the output terminal of the second transistor M2 is electrically coupled to the output terminal of the first transistor M1. The charging circuit 110 is electrically coupled to the first terminal of the capacitor Cs, the second terminal of the capacitor Cs, the scan line 500, and a current source Idata.
When implementing the present invention, each of the foregoing transistors can be a Bipolar Junction Transistor (BJT), a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), and so on, but the present invention is not limited. In
By the use of the structure of the driving circuit 100, the driving circuit 100 addresses the problem of the time in which the data current being written into the capacitor increasing substantially due to the data current being small when the display panel utilizing current coded mode needs to display a low gray level.
For further introducing an operation mode of the driving circuit provided by the present invention, reference is now made to
Specifically, in the data writing period T1, the charging circuit 110 charges the capacitor Cs according to a current provided by the current source Idata. With continued reference to
In addition, referring to
In this embodiment, the charging circuit 100 further comprises a fifth transistor M5. The fifth transistor M5 comprises an input terminal, a control terminal, and an output terminal. With respect to structure, the input terminal of the fifth transistor M5 is electrically coupled to the input terminal of the fourth transistor M4 and a voltage source VDD, the control terminal of the fifth transistor M5 is electrically coupled to the scan line 500, and the output terminal of the fifth transistor M5 is electrically coupled to the first terminal of the capacitor Cs. As in the case of the other transistors discussed previously, in
For further introducing effects achieved by the structure and operation of the driving circuit 100 of the present invention, reference is now made to the following description. In the data writing period T1, the fourth transistor M4 of the charging circuit 110 charges the capacitor Cs according to a current provided by the current source Idata. A charge formula of the capacitor Cs is follows:
where Kp is a conduction parameter of the fourth transistor M4, and VTH_M4 is a threshold voltage of the fourth transistor M4.
With continued reference to
IOLED=Kn(VGS−VTH_M1)2 formula 2
where Kn is a conduction parameter of the first transistor M1, VGS is a voltage between the gate and the source of the first transistor M1, and VTH_M1 is a threshold voltage of the first transistor M1.
Subsequently, in the foregoing light emitting period T2, because VGS of the first transistor M1 is equal to the charge voltage VCS provided by the capacitor Cs, the charge voltage VCS in formula 1 is substituted into an item of VGS of the first transistor M1 in formula 2, and the following formula is therefore obtained:
It is noted that a mismatch condition between the threshold voltage VTTH_M4 in the charging circuit 100 and the threshold voltage VTH_M1 in first transistor M1 only minimally affects IOLED, and so the mismatch can be ignored. To prove that the mismatch between the threshold voltage of said circuits really minimally affects IOLED, Smart-SPICE with Device Model (n/pmos level=36) therein is introduced to test the driving circuit 100, in which the following parameters are used: W/L_M3,5=8 μm/3.84 um (n-type), W/L_M2,4=8 μm/3.84 um (p-type), W/L_M1=50/3.84 um (n-type), Cs=0.6 pF, VTH=1 or −1V, Idata=10 uA, Vscan_low=−10V, Vscan_high=28V, VDD=10V, and VSS=ground. The test results are as shown in
As shown in
and so the mismatch can be ignored. With this in mind, formula 3 can be arranged as follows to obtain formula 4:
As is evident from formula 4, the driving circuit 100 of embodiments of the present invention can adjust the ratio between IOLED and Idata by regulating Kn and Kp. Hence, the driving circuit addresses the problem of the time in which the data current is written into the capacitor increasing substantially due to the data current being small when the display panel utilizing current coded mode needs to display a low gray level. Furthermore, the duration of the data writing period can be controlled to within a time limitation to avoid data writing failure. Moreover, when elements of the driving circuit 100 or the organic light emitting diode OLEO degrade, the degradation can be compensated by regulating Kn and Kp.
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