Oscillation circuit

Information

  • Patent Application
  • 20070182499
  • Publication Number
    20070182499
  • Date Filed
    February 08, 2007
    17 years ago
  • Date Published
    August 09, 2007
    17 years ago
Abstract
A first comparator outputs a first signal indicative that a voltage determined according to the amount of charge stored in a first capacitor has reached a first reference voltage. A second comparator outputs a second signal indicative that a voltage determined according to the amount of charge stored in a second capacitor has reached a second reference voltage. An RS flip flop circuit is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal. When the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and the second capacitor is in a discharge state. When the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state, and the second capacitor is in a charge state.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a block diagram showing the structure of an oscillation circuit according to embodiment 1.



FIG. 2 is a block diagram showing the structure of a first charge/discharge control circuit 109 and a second charge/discharge control circuit 110 according to embodiment 1.



FIG. 3 is a timing chart illustrating the operation of the oscillation circuit of embodiment 1.



FIG. 4 is a block diagram showing the structure of an oscillation circuit according to embodiment 2.



FIG. 5 is a block diagram showing the structure of one-shot circuits 204 and 205 according to embodiment 2.



FIG. 6 is a timing chart illustrating the operation of the oscillation circuit of embodiment 2.



FIG. 7 is a block diagram showing the structure of an oscillation circuit according to embodiment 3.



FIG. 8 is a timing chart illustrating the operation of the oscillation circuit of embodiment 3.



FIG. 9 is a timing chart illustrating the operation of a conventional oscillation circuit.


Claims
  • 1. An oscillation circuit, comprising: first and second capacitors which are charged or discharged by a current generated by a constant current source;a first comparator for comparing a first voltage which is determined according to the amount of charge stored in the first capacitor with a first reference voltage to output a first signal indicative that the first voltage has reached the first reference voltage;a second comparator for comparing a second voltage which is determined according to the amount of charge stored in the second capacitor with a second reference voltage to output a second signal indicative that the second voltage has reached the second reference voltage;an RS flip flop circuit which is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal;a first charge/discharge control circuit for controlling the first capacitor such that, when the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and when the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state; anda second charge/discharge control circuit for controlling the second capacitor such that, when the RS flip flop circuit is in the reset state, the second capacitor is in a charge state, and when the RS flip flop circuit is in the set state, the second capacitor is in a discharge state.
  • 2. An oscillation circuit, comprising: first and second capacitors which are charged or discharged by a current generated by a constant current source;a first comparator for comparing a first voltage which is determined according to the amount of charge stored in the first capacitor with a first reference voltage to output a first signal indicative that the first voltage has reached the first reference voltage;a second comparator for comparing a second voltage which is determined according to the amount of charge stored in the second capacitor with a second reference voltage to output a second signal indicative that the second voltage has reached the second reference voltage;a first RS flip flop circuit which is shifted to the set state when the first signal is output by the first comparator and which is shifted to the reset state when the second signal is output by the second comparator while the first RS flip flop circuit is in the set state;a second RS flip flop circuit which is shifted to the set state when the second signal is output by the second comparator and which is shifted to the reset state when the first signal is output by the first comparator while the second RS flip flop circuit is in the set state;a toggle flip flop circuit whose output is inverted when the first RS flip flop circuit shifts from the reset state to the set state and when the second RS flip flop circuit shifts from the reset state to the set state; anda charge/discharge control circuit which selectively switches according to an output of the toggle flip flop circuit between a mode where the first capacitor is charged and the second capacitor is discharged and a mode where the first capacitor is discharged and the second capacitor is charged.
  • 3. The oscillation circuit of claim 2, wherein: the set state is a state where an output is high level;the reset state is a state where an output is low level;the oscillation circuit further comprises a first one-shot circuit which outputs a first pulse signal of high level when an output of the first RS flip flop circuit rises,a second one-shot circuit which outputs a second pulse signal of high level when an output of the second RS flip flop circuit rises, anda logical sum circuit which outputs a logical sum of the first pulse signal and the second pulse signal; andthe output of the toggle flip flop circuit is inverted at a rising or falling edge of the output of the logical sum circuit.
  • 4. An oscillation circuit, comprising: any one of a charge-based first capacitor/comparator set and a discharge-based first capacitor/comparator set; andany one of a charge-based second capacitor/comparator set and a discharge-based second capacitor/comparator set, whereinthe charge-based first capacitor/comparator set includes a first capacitor which is charged by a current generated by a constant current source, anda first comparator which outputs a first signal during a period extending from a time when a voltage determined according to the amount of charge stored in the first capacitor is increased to a first reference voltage by the charging of the first capacitor to a time when the voltage decreases to a second reference voltage which is lower than the first reference voltage,the discharge-based first capacitor/comparator set includes a first capacitor which is discharged by a current generated by a constant current source, anda first comparator which outputs a first signal during a period extending from a time when a voltage determined according to the amount of charge stored in the first capacitor is decreased to a first reference voltage by the discharging of the first capacitor to a time when the voltage increases to a second reference voltage which is higher than the first reference voltage,the charge-based second capacitor/comparator set includes a second capacitor which is charged by a current generated by a constant current source, anda second comparator which outputs a second signal during a period extending from a time when a voltage determined according to the amount of charge stored in the second capacitor is increased to a third reference voltage by the charging of the second capacitor to a time when the voltage decreases to a fourth reference voltage which is lower than the third reference voltage,the discharge-based second capacitor/comparator set includes a second capacitor which is discharged by a current generated by a constant current source, anda second comparator which outputs a second signal during a period extending from a time when a voltage determined according to the amount of charge stored in the second capacitor is decreased to a third reference voltage by the discharging of the second capacitor to a time when the voltage increases to a fourth reference voltage which is higher than the third reference voltage, andthe oscillation circuit further comprises a toggle flip flop circuit whose output is inverted every time any of the first signal and the second signal is output, anda charge/discharge control circuit which selectively switches according to an output of the toggle flip flop circuit between a mode where the first capacitor is charged and the second capacitor is discharged and a mode where the first capacitor is discharged and the second capacitor is charged.
  • 5. The oscillation circuit of claim 1, wherein the first and second capacitors are charged or discharged by a current generated by a common constant current source.
  • 6. The oscillation circuit of claim 2, wherein the first and second capacitors are charged or discharged by a current generated by a common constant current source.
  • 7. The oscillation circuit of claim 4, wherein the first and second capacitors are charged or discharged by a current generated by a common constant current source.
  • 8. The oscillation circuit of claim 1, wherein: when charging the first capacitor, the first charge/discharge control circuit couples an end of the first capacitor with a constant current source, and when charging the second capacitor, the second charge/discharge control circuit couples an end of the second capacitor with a constant current source; andwhen discharging the first capacitor, the first charge/discharge control circuit causes a short-circuit between both ends of the first capacitor, and when discharging the second capacitor, the second charge/discharge control circuit causes a short-circuit between both ends of the second capacitor.
  • 9. The oscillation circuit of claim 2, wherein: the charge/discharge control circuit charges each of the first and second capacitors by coupling an end of the capacitor with a constant current source; andthe charge/discharge control circuit discharges each of the first and second capacitors by causing a short-circuit between both ends of the capacitor.
  • 10. The oscillation circuit of claim 4, wherein: the charge/discharge control circuit charges each of the first and second capacitors by coupling an end of the capacitor with a constant current source; andthe charge/discharge control circuit discharges each of the first and second capacitors by causing a short-circuit between both ends of the capacitor.
Priority Claims (2)
Number Date Country Kind
2006-032251 Feb 2006 JP national
2006-350262 Dec 2006 JP national