OTA-BASED CURRENT-MODE FILTER AND OSCILLATOR

Abstract
Techniques are generally described herein related to filters including first operational transconductance amplifier (first OTA) and a second operational transconductance amplifier (second OTA). In some examples described herein, the first OTA and second OTA have substantially the same transconductance. The first and second OTAs can be configured to realize filters such as first-order all-pass filters, second-order all-pass filters, higher-order all-pass filters, and quadrature oscillators.
Description
TECHNICAL FIELD

The present disclosure relates generally to a filter and more specifically to an operational transconductance amplifier (OTA) based current-mode filter and oscillator.


BACKGROUND

Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.


All-pass filters are widely used in the analog signal processing as group-delay equalizers in video, communication, and instrumentation applications. First-order all-pass filters can also be used as a building block to realize different types of second-order filters and quadrature oscillators. Some popular approaches in the continuous-time integrated filter design involve at least an operational transconductance amplifier and capacitor (OTA-C) due to its certain desired bandwidth and dynamic range.


SUMMARY

Some embodiments of the present disclosure may generally relate to a filter. An example filter may include a first circuit having a first node and a second node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node. The example filter may also include a first operational transconductance amplifier (OTA), which includes an inverting input configured to receive a first input current signal, a non-inverting input, coupled to the second node, an inverting output, coupled to the second node, and configured to provide a first output current signal, and a non-inverting output configured to provide a second output current signal. The example filter may further include a second OTA, which includes a non-inverting input, coupled to the first node, an inverting input coupled to the inverting input of the first OTA, a non-inverting output, coupled to the inverting input of the first OTA, and configured to provide a third output current signal, and an inverting output, coupled to the second node, configured to provide a fourth output current signal. The first OTA and the second OTA have substantially the same transconductance. The example filter may be configured such that the first and the second output current signals are proportional to the transconductance of the first OTA and a voltage difference between the non-inverting input and the inverting input of the first OTA, and the third and the fourth output current signals are proportional to the transconductance of the second OTA and a voltage difference between the non-inverting input and the inverting input of the second OTA.


The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.





BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:



FIG. 1 shows a simplified block diagram of an example OTA-based non-inverting (+) type filter;



FIG. 2 shows a simplified block diagram of an example OTA-based inverting (−) type filter;



FIG. 3 shows a simplified block diagram of an example single input OTA-based non-inverting (+) type filter;



FIG. 4 shows a simplified block diagram of an example single input OTA-based inverting (−) type filter;



FIG. 5 shows a simplified block diagram of an example quadrature oscillator with the OTA-based non-inverting (+) type filters;



FIG. 6 shows a simplified block diagram of an example quadrature oscillator with the OTA-based inverting (−) type filters;



FIG. 7 shows a simplified block diagram of an example quadrature oscillator with the single input OTA-based non-inverting (+) type filters;



FIG. 8 shows a simplified block diagram of an example quadrature oscillator with the single input OTA-based inverting (−) type filters;



FIG. 9 shows several example circuit elements for the OTA-base filter design;



FIG. 10 shows a simplified block diagram of an example OTA-C simulated inductor; and



FIG. 11 shows a simplified block diagram of another example OTA-C simulated inductor, all arranged in accordance with at least some embodiments of the present disclosure described herein.





DETAILED DESCRIPTION

In the following detailed description, reference is made to the accompanying drawings, which form a part hereof. In the drawings, similar symbols typically identify similar components, unless context dictates otherwise. The illustrative embodiments described in the detailed description, drawings, and claims are not meant to be limiting. Other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the subject matter presented herein. It will be readily understood that the aspects of the present disclosure, as generally described herein, and illustrated in the Figures, can be arranged, substituted, combined, separated, and designed in a wide variety of different configurations, all of which are explicitly contemplated herein.


This disclosure is drawn, inter alia, to systems, devices and methods related to current-mode operational transconductance amplifier (OTA) based filters.


Briefly stated, techniques are generally described herein related to filters including a first operational transconductance amplifier (first OTA) and a second operational transconductance amplifier (second OTA). In some examples described herein, the first OTA and second OTA have substantially the same transconductance. The first and second OTAs can be configured to realize filters such as first-order all-pass filters, second-order all-pass filters, higher-order all-pass filters, and quadrature oscillators.



FIG. 1 illustrates a simplified block diagram of an example current-mode OTA-based filter 100, arranged in accordance with at least some embodiments of the present disclosure. The filter 100 includes a dual-output-OTA (DO-OTA) 110 with a non-inverting (+) input 112, an inverting (−) input 114, an inverting (−) output 116, and a non-inverting (+) output 118. The filter 100 also includes a single-output-OTA (SO-OTA) 130 with an inverting (−) input 132, a non-inverting (+) input 134, and a non-inverting (+) output 136. The filter 100 further includes a circuit 150 with a first terminal 152 and a second terminal 154. The DO-OTA 110 has a characteristic transconductance gm1. The SO-OTA 130 has a characteristic transconductance gm2. The DO-OTA 110 and the SO-OTA 130 may have substantially the same transconductance gm. The circuit 150 has a characteristic admittance Y(s).


As shown in FIG. 1, the non-inverting (+) input 112 of the DO-OTA 110 is coupled to the second terminal 154 of the circuit 150 and the inverting (−) output 116 of the DO-OTA 110. The inverting (−) input 114 of the DO-OTA 110 is coupled to the inverting (−) input 132 and the non-inverting (+) output 136 of the SO-OTA 130. The first terminal 152 of the circuit 150 and the non-inverting (+) input 134 of the SO-OTA 130 are coupled to a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., VX, VDD, VSS, VGND, etc.). Current inputs, Ii1 and Ii2, are fed to the non-inverting (+) input 112 and the inverting (−) input 114 of the DO-OTA 110, respectively. The non-inverting (+) output 118 of the DO-OTA 110 provides a first current output, IO1+, and the inverting (−) output 116 of the DO-OTA 110 provides a second current output, IO1, where IO1+=−IO1. The prefixed minus sign of “−IO1” indicates that the first current output, IO1+ and the second current output, are in the opposite direction. For example, the second current output, IO1 flows into the inverting (−) output 116 of the DO-OTA 110, and the first current output, IO1+, flows out of the non-inverting (+) output 118. The non-inverting (+) output 136 of the SO-OTA 130 provides a current output, IO2+. The current outputs (IO1+, IO1) of the DO-OTA 110 are determined by the voltage (Vi1+, Vi1) applied across inputs 112 and 114, i.e., IO1+=−IO1=gm1·(Vi1+−Vi1). The current output of the SO-OTA 130 (IO2) is determined by the voltage applied across inputs 134 and 132 (Vi2+, Vi2), i.e., IO2=gm2·(Vi2+−Vi2). The illustrated SO-OTA 130 behaves like a resistor of value 1/gm2.


The input-output relation of the filter 100 is shown in Eq. (1) below.










I

o






1
+



=


-

I

o






1
-




=



g

m





1




(



g

m





2


·

I

i





1



-


Y


(
s
)


·

I

i





2




)




g

m





2




(


g

m





1


+

Y


(
s
)



)








Eq
.





(
1
)








By configuring Ii1=Ii2=Iim and gm1=gm2=gm, and substituting these parameters into Eq. (1), the transfer function of the filter 100 is shown in Eq. (2) below. In this case, the filter 100 realizes the following transfer function:










H


(
s
)


=



I
o


I
in


=

-


(


Y


(
s
)


-

g
m


)


(


Y


(
s
)


+

g
m


)








Eq
.





(
2
)








By configuring Ii1=0, Ii2=Iin, and gm1=gm2=gm, and substituting these parameters into Eq. (1), the transfer function of the filter 100 is shown in Eq. (3) below. In this case, the filter 100 realizes the following transfer function:










H


(
s
)


=



I
o


I
in


=

-


Y


(
s
)



(


Y


(
s
)


+

g
m


)








Eq
.





(
3
)








By configuring Ii1=Iin and Ii2=0, the SO-OTA 130 is therefore not needed and the inverting input of the DO-OTA 110 is coupled to the power supply terminal with a predetermined voltage level (e.g., ground). By configuring gm1=gm and substituting these parameters into Eq. (1), the transfer function of the filter 100 is shown in Eq. (4) below. In this case, the filter 100 realizes the following transfer function:










H


(
s
)


=



I
o


I
in


=


g
m


(


Y


(
s
)


+

g
m


)







Eq
.





(
4
)








The circuit 150 can be implemented with the circuit shown in FIG. 9(a). A capacitor 910 with a capacitance value of C1 is coupled between the second terminal 154 of the circuit 150 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(a)). The admittance of the circuit 150 is Y(s)=sC1. By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (1) or Eq. (2), the transfer function of the filter 100 is shown in Eq. (5) below. The filter 100 acts as a first-order non-inverting type all-pass filter.










H


(
s
)


=



I
o


I
in


=

-


(

s
-


g
m


C
1



)


(

s
+


g
m


C
1



)








Eq
.





(
5
)








By configuring Ii1=0, Ii2=Iin, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (1) or Eq. (3), the transfer function of the filter 100 is shown in Eq. (6) below. The filter 100 acts as a first-order high-pass filter.










H


(
s
)


=



I
o


I
in


=

-

s

(

s
+


g
m


C
1



)








Eq
.





(
6
)








Similarly, by configuring Ii1=Iin and Ii2=0, the SO-OTA 130 is not needed and the inverting input of the DO-OTA 110 is coupled to the power supply terminal with a predetermined voltage level (e.g., ground). By configuring gm1=gm and Y(s)=sC1, and substituting these parameters into Eq. (1) or Eq. (4), the transfer function of the filter 100 is shown in Eq. (7) below. The filter 100 acts as a first-order low-pass filter.










H


(
s
)


=



I
o


I
in


=



g
m


C
1



(

s
+


g
m


C
1



)







Eq
.





(
7
)








A second-order all-pass filter can be realized by implementing the circuit 150 with the circuit shown in FIG. 9(b). A capacitor 920 with a capacitance value of C1 in parallel with an inductor 930 with an inductance value of I1 are coupled between to the second terminal 154 of the circuit 150 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(b)). In this example, the admittance of the circuit 150 is Y(s)=(sC1+1/(sL1)). By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)), and substituting these parameters into Eq. (1) or Eq. (2), the transfer function of the second-order all-pass filter is shown in Eq. (8) below.










H


(
s
)


=



I
o


I
in


=

-


(



s
2

·

L
1

·

C
1


-

s
·

L
1

·

g
m


+
1

)


(



s
2

·

L
1

·

C
1


+

s
·

L
1

·

g
m


+
1

)








Eq
.





(
8
)








When the circuit 150 is implemented with the circuit shown in FIG. 9(b), a second-order band-stop transfer function can also be realized by configuring Ii1=0, Ii2=Iin, gm1=gm2=gm. The transfer function of the second-order band-stop filter can be obtained by substituting Ii1=0, Ii2=gin, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)) into Eq. (1) or Eq. (3) as follows:







H


(
s
)


=



I
o


I
in


=

-



(



s
2

·

L
1

·

C
1


+
1

)


(



s
2

·

L
1

·

C
1


+

s
·

L
1

·

g
m


+
1

)


.







Similarly, when the circuit 150 is implemented with the circuit shown in FIG. 9(b), a second-order band-pass can also be realized by configuring Ii1=Iin, Ii2=0, gm1=gm. In this case, SO-OTA 130 is not needed and the inverting input of DO-OTA 110 is coupled to a power supply terminal with a predetermined voltage reference level (e.g., ground). The transfer function of the second-order band-pass filter can be obtained by substituting Ii1=Iin, Ii2=0, gm1=gm, and Y(s)=(sC1+1/(sL1)) into Eq. (1) or Eq. (4) as follows:







H


(
s
)


=



I
o


I
in


=


s
·

L
1

·

g
m



(



s
2

·

L
1

·

C
1


+

s
·

L
1

·

g
m


+
1

)







In another example, the inductor 930 can be substituted with an operational transconductance and capacitance (OTA-C) simulated inductor 1000 as shown in FIG. 10. The OTA-C simulated inductor 1000 includes a capacitor 1030 with a capacitance value of C2 and two SO-OTAs 1010 and 1020 respectively with characteristic transconductances gm1010 and gm1020. Each of the SO-OTAs 1010 and 1020 has a non-inverting (+) input, an inverting (−) input, and a non-inverting (+) output. The non-inverting (+) input 1012 of the OTA 1010 is coupled to the non-inverting (+) output 1026 of the OTA 1020. The non-inverting (+) output 1016 of the OTA 1010 and the inverting (−) input 1022 of the OTA 1020 are coupled to one end of the capacitor 1030. The other end of the capacitor 1030, the inverting (−) input 1014 of the OTA 1010, and the non-inverting (+) input 1024 of the OTA 1020 are coupled to a voltage reference level (e.g., ground as shown in FIG. 10). The inductance of the OTA-C simulated conductor 1000 is given by Eq. (9a) below.










L

OTA
-
C


=


C
2



g

m





1010




g

m





1020








Eq
.





(

9

a

)








Consequently, the transfer function of the second-order all-pass, band-stop, and band-pass filters with the OTA-C simulated inductor 1000 can be deduced by substituting the inductance I1 in the above equations with the inductance IOTA-C in Eq. (9a).


Another second-order all-pass filter can be realized by implementing the circuit 150 with the circuit shown in FIG. 9(c1) or FIG. 9(c2). An impedance containing an inductor 940A with an inductance value of I1 in series with a capacitor 950A with a capacitance value C1 is coupled between the second terminal 154 of the circuit 150 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c1)). Alternately, an impedance containing a capacitor 950B with a capacitance value C1 in series with an inductor 940B with an inductance value of I1 is coupled between the second-terminal 154 of the circuit 150 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c2)). The admittance of the circuit 150 is Y(s)=1/(sL1+1/(sC1)). By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)), and substituting these parameters into Eq. (1) or Eq. (2), the transfer function of the second-order all-pass filter can be obtained as follows:







H


(
s
)


=



I
o


I
in


=


(



s
2

·

g
m

·

L
1

·

C
1


-

s
·

C
1


+

g
m


)


(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







A second-order band-pass filter can be realized by configuring Ii1=0, Ii2=Iin and gm1=gm2=gm. The transfer function of the band-pass filter can be obtained by substituting Ii1=0, Ii2=Iin, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)) into Eq. (1) or Eq. (3).







H


(
s
)


=



I
o


I
in


=



-
s

·

C
1



(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







A second-order band-stop can also be realized by configuring Ii1=Iin, Ii2=0, gm1=gm. In this case, SO-OTA 130 is not needed and the inverting input of DO-OTA 110 is coupled to a power supply terminal with a predetermined voltage level (e.g., ground). The transfer function of the band-stop filter can be obtained by substituting Ii1=Iin, Ii2=0, gm1=gm, and Y(s)=1/(sL1+1/(sC1)) into Eq. (1) or Eq. (4).







H


(
s
)


=



I
o


I

i





n



=




s
2

·

g
m

·

L
1

·

C
1


+

g
m



(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







The inductor 940A in FIG. 9(c1) may be substituted with another OTA-C simulated inductor 1000 as shown in FIG. 10. Alternately, the inductor 940B in FIG. 9(c2) may be substituted with another OTA-C simulated inductor 1100 as shown in FIG. 11. The OTA-C simulated inductor 1100 includes a capacitor 1140 with a capacitance value of C3 and three SO-OTAs 1110, 1120, and 1130 respectively with characteristic transconductances gm1110, gm1120, and gm1130. Each of the SO-OTAs 1110, 1120, and 1130 has a non-inverting (+) input, an inverting (−) input, and a non-inverting (+) output. The non-inverting (+) input 1112 of the OTA 1110 is coupled to the non-inverting (+) output 1126 of the OTA 1120. The inverting (−) input 1114 of the OTA 1110 is coupled to the non-inverting (+) output 1136 of the OTA 1130. The non-inverting (+) output 1116 of the OTA 1110, the inverting (−) input 1124 of the OTA 1120, the non-inverting (+) input 1132 of the OTA 1130 are coupled to one end of the capacitor 1140. The other end of the capacitor 1140, the non-inverting (+) input 1122 of the OTA 1120, and the inverting (−) input 1134 of the OTA 1130 are coupled to a voltage reference level (e.g., ground as shown in FIG. 11). By configuring gm1110=gm3 and gm1120=gm1130=gm4, the inductance of the OTA-C simulated conductor 1100 is given by Eq. (9b) below. Consequently, the transfer function of the second-order all-pass, band-pass, and band-reject filters with the OTA-C simulated inductor 1100 can be obtained by substituting the inductance I1 in the above equations with the inductance LOTA-C in Eq. (9b).










L

OTA


-


C


=


C
3



g

m





3




g

m





4








Eq
.





(

9

b

)








In some embodiments, the circuit arrangement using the inductor 940A of FIG. 9(c1) may involve two OTAs but may be affected by the parasitic capacitance of both the terminals of the floating capacitor. On the other hand, the circuit arrangement using the inductor 940B of FIG. 9(c2) may involve three OTAs but may not be affected by the parasitic capacitance of the capacitor bottom plate as it uses grounded capacitors throughout.


A generalized N-th order all-pass filter can be realized by implementing the circuit 150 with a LC ladder network 960 as shown in FIG. 9(d) or a LC ladder network 970 as shown in FIG. 9(e). In FIG. 9(d), the LC ladder network 960 includes (N+1)/2 inductor(s) that are coupled in a series configuration from the input of the LC network to a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(d)). The LC ladder network 960 also includes (N−1)/2 capacitor(s), each coupled from a respective tap point between the inductors to a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(d)).


In FIG. 9(e), the LC ladder network 970 includes N/2 inductor(s) that are coupled together in a series configuration from the input of the LC network to a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(e)). LC ladder network 970 also includes N/2 capacitor(s), each of the capacitor(s) being coupled between one of the inductor(s) and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(e)).


The N-th order all-pass filter can be realized by configuring Ii1=Ii2=Iin and gm1=gm2=gm. The transfer function of the N-th order all-pass filters can be obtained by substituting for Y(s) the admittance of the LC ladder networks 960 or 970 into Eq. (2) above. In some examples, the inductor(s) in FIG. 9(d) and FIG. 9(e) can be implemented with the OTA-C simulated inductor 1000 or 1100, respectively shown in FIGS. 10 and 11.



FIG. 2 illustrates a simplified block diagram of an example current-mode OTA-based filter 200, arranged in accordance with at least some embodiments of the present disclosure. The filter 200 includes a DO-OTA 210 with a non-inverting (+) input 212, an inverting (−) input 214, and two non-inverting (+) outputs 216 and 218. The filter 200 also includes a SO-OTA 230 with a non-inverting (+) input 232, an inverting (−) input 234, and a non-inverting (+) output 236. The filter 200 further includes a circuit 250 with a first terminal 252 and a second terminal 254. The DO-OTA 210 has a characteristic transconductance gm1. The SO-OTA 230 has a characteristic transconductance gm2. The DO-OTA 210 and the SO-OTA 230 may have substantially the same characteristic transconductance gm. The circuit 250 has a characteristic admittance Y(s). The illustrated OTA 230 behaves like a resistor of value 1/gm2.


The inverting (−) input 214 of the DO-OTA 210 is coupled to the second terminal 254 of the circuit 250 and the non-inverting (+) output 218 of the DO-OTA 210. The non-inverting (+) input 212 of the DO-OTA 210 is coupled to the inverting (−) input 234 and also the non-inverting (+) output 236 of the SO-OTA 230. The first terminal 252 of the circuit 250 and the non-inverting (+) input 232 of the SO-OTA 230 are coupled to a power supply terminal with a predetermined voltage reference level (e.g., ground). Current inputs, Ii1 and Ii2, are fed to the non-inverting (+) input 212 and the inverting (−) input 214 of the DO-OTA 210, respectively. The non-inverting (+) outputs 216 and 218 of the DO-OTA 210 provide current outputs, IO1 and IO2, respectively. The non-inverting (+) output 236 of the SO-OTA 230 provides a current output, IO3. The current outputs (IO1, IO2) of the DO-OTA are determined by the voltage (Vi1+, Vi1) applied across inputs 212 and 214, i.e., IO1=IO2=gm1·(Vi1+−Vi1). The current output of the SO-OTA (IO3) is determined by the voltage applied across inputs 232 and 234 (Vi2+, Vi2), i.e., IO3=gm2·(Vi2+−Vi2).


The input-output relation of the filter 200 is shown in Eq. (10) below.










I

o





1


=



g

m





1




(



Y


(
s
)


·

I

i





1



-


g

m





2


·

I

i





2




)




g

m





2




(


g

m





1


+

Y


(
s
)



)







Eq
.





(
10
)








By configuring Ii1=Ii2=Iin and gm1=gm2=gm, and substituting these parameters into Eq. (10), the transfer function of the filter 200 is shown in Eq. (11) below. In this case, the filter 200 realizes the following transfer function:










H


(
s
)


=



I
o


I

i





n



=


(


Y


(
s
)


-

g
m


)


(


Y


(
s
)


-

g
m


)







Eq
.





(
11
)








By configuring Ii1=0, Ii2=Iin, and gm1=gm (OTA 230 is not needed and the non-inverting input of DO-OTA 210 is coupled to a power supply terminal with a predetermined voltage level (e.g., ground)), and substituting these parameters into Eq. (10), the transfer function of the filter 200 is shown in Eq. (12) below. In this case, the filter 200 acts as a low-pass filter.










H


(
s
)


=



I
o


I

i





n



=


-

g
m



(


Y


(
s
)


+

g
m


)







Eq
.





(
12
)








By configuring Ii1=Iin, Ii2=0, and gm1=gm2=gm, and substituting these parameters into Eq. (10), the transfer function of the filter 200 is shown in Eq. (13) below.










H


(
s
)


=



I
o


I

i





n



=


Y


(
s
)



(


Y


(
s
)


+

g
m


)







Eq
.





(
13
)








The circuit 250 can be implemented with the circuit shown in FIG. 9(a). A capacitor 910 with a capacitance value of C1 is coupled between the second terminal 254 of the circuit 250 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(a)). The admittance of the circuit 250 is Y(s)=sC1. By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (10) or Eq. (11), the transfer function of the filter 200 is shown in Eq. (14) below. The filter 200 acts as a first-order inverting type all-pass filter.










H


(
s
)


=



I
o


I

i





n



=


(

s
-


g
m


C
1



)


(

s
+


g
m


C
1



)







Eq
.





(
14
)








By configuring Ii1=0, Ii2=Iin, gm1=gm, and Y(s)=sC1. SO-OTA 230 is not needed and the non-inverting input of DO-OTA 210 is coupled to a power supply terminal with a predetermined voltage level (e.g., ground). After substituting these parameters into Eq. (10) or Eq. (12), the transfer function of the filter 200 is shown in Eq. (15) below. The filter 200 acts as a first-order low-pass filter.










H


(
s
)


=



I
o


I

i





n



=



g
m


C
1



(

s
+


g
m


C
1



)







Eq
.





(
15
)








Similarly, by configuring Ii1=Iin, Ii2=0, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (10) or Eq. (13), the transfer function of the filter 200 is shown in Eq. (16) below. The filter 200 acts as a first-order high-pass filter.










H


(
s
)


=



I
o


I

i





n



=

s

(

s
+


g
m


C
1



)







Eq
.





(
16
)








A second-order all-pass filter can be realized by implementing the circuit 250 with the circuit shown in FIG. 9(b). A capacitor 920 with a capacitance value of C1 in parallel with an inductor 930 with an inductance value of I1 are coupled between the second terminal 254 of the circuit 250 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(b)). In this example, the admittance of the circuit 250 is Y(s)=(sC1+1/(sL1)). By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)), and substituting these parameters into Eq. (10) or Eq. (11), the transfer function of the second-order all-pass filter is shown in Eq. (17) below.










H


(
s
)


=



I
o


I

i





n



=


(



s
2

·

L
1

·

C
1


-

s
·

L
1

·

g
m


+
1

)


(



s
2

·

L
1

·

C
1


+

s
·

L
1

·

g
m


+
1

)







Eq
.





(
17
)








When the circuit 250 is implemented with the circuit shown in FIG. 9(b), a second-order band-pass can also be realized by configuring Ii1=0, Ii2=Iin, gm1=gm. In this case, SO-OTA 230 is not needed and the non-inverting input of DO-OTA 210 is coupled to a power supply terminal with a predetermined voltage reference level (e.g., ground). The transfer function of the second-order band-pass filter can be obtained by substituting Ii1=0, Ii2=Iin, gm1=gm, and Y(s)=(sC1+1/(sL1)) into Eq. (10) or Eq. (12) as follows:







H


(
s
)


=



I
o


I

i





n



=



-
s

·

g
m

·

L
1



(



s
2

·

L
1

·

C
1


+

s
·

g
m

·

L
1


+
1

)







Similarly, when the circuit 250 is implemented with the circuit shown in FIG. 9(b), a second-order band-stop can also be realized by configuring Ii1=Iin, Ii2=0, gm1=gm2=gm. The transfer function of the second-order band-stop filter can be obtained by substituting Ii1=Iin, Ii2=0, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)) into Eq. (10) or Eq. (13) as follows:







H


(
s
)


=



I
o


I

i





n



=




s
2

·

L
1

·

C
1


+
1


(



s
2

·

L
1

·

C
1


+

s
·

g
m

·

L
1


+
1

)







In another example, the inductor 930 can be substituted with an OTA-C simulated inductor 1000 as shown in FIG. 10. As mentioned above, the inductance of the OTA-C simulated conductor 1000 is given by Eq. (9a). Consequently, the transfer function of the second-order all-pass, band-stop, and band-pass filters with the OTA-C simulated inductor 1000 can be deduced by substituting the inductance I1 in the above equation with the inductance IOTA-C in Eq. (9a).


Another second-order all-pass filter can be realized by implementing the circuit 250 with the circuit shown in FIG. 9(c1) or FIG. 9(c2). An impedance containing the inductor 940A with an inductance value of L1 in series with the capacitor 950A with a capacitance value C1 is coupled between the second terminal 254 of the circuit 250 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c1)). Alternately, an impedance containing the capacitor 950B with a capacitance value C1 in series with the inductor 940B with an inductance value L1 is coupled between the second-terminal 254 of the circuit 250 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c2)). The admittance of the circuit 250 is Y(s)=1/(sL1+1/(sC1)). By configuring Ii1=Ii2=Iin, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)), and substituting these parameters into Eq. (10) or Eq. (11), the transfer function of the second-order all-pass filter can be obtained as follows:







H


(
s
)


=



I
o


I

i





n



=


(



s
2

·

g
m

·

L
1

·

C
1


-

s
·

C
1


+

g
m


)


(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







A second-order band-stop filter can be realized by configuring Ii1=0, Ii2=Iin and gm1=gm. In this case, SO-OTA 230 is not needed and the non-inverting input of DO-OTA 210 is coupled to a power supply terminal with a predetermined voltage reference level (e.g., ground). The transfer function of the second-order band-stop filter can be obtained by substituting Ii1=0, Ii2=Iin, gm1=gm, and Y(s)=1/(sL1+1/(sC1)) into Eq. (10) or Eq. (12) as follows:







H


(
s
)


=



I
o


I

i





n



=




s
2

·

g
m

·

L
1

·

C
1


+

g
m



(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







A second-order band-pass can also be realized by configuring Ii1=Iin, Ii2=0, gm1=gm2=gm. The transfer function of the second-order band-pass filter can be obtained by substituting Ii1=Iin, Ii2=0, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)) into Eq. (10) or Eq. (13) as follows:







H


(
s
)


=



I
o


I

i





n



=


s
·

C
1



(



s
2

·

g
m

·

L
1

·

C
1


+

s
·

C
1


+

g
m


)







The inductor 940A in FIG. 9(c1) may be substituted with another OTA-C simulated inductor 1000 as shown in FIG. 10. The inductance of the OTA-C simulated inductor 1000 is given by Eq. (9a). Consequently, the transfer function of the second-order all-pass, band-pass, and band-stop filters with the OTA-C simulated inductor 1000 can be deduced by substituting the inductance I1 in the above equation with the inductance LOTA-C in Eq. (9a). Alternatively, the inductor 940B in FIG. 9(c2) may be substituted with another OTA-C simulated inductor 1100 as shown in FIG. 11. The inductance of the OTA-C simulated inductor 1100 is given by Eq. (9b). Consequently, the transfer function of the second-order all-pass, band-pass, and band-stop filters with the OTA-C simulated inductor 1100 can be deduced by substituting the inductance I1 in the above equation with the inductance IOTA-C in Eq. (9b).


In some embodiments, the circuit arrangement using the inductor 940A of FIG. 9(c1) may involve two OTAs but may be affected by the parasitic capacitance of both the terminals of the floating capacitor. On the other hand, the circuit arrangement using the inductor 940B of FIG. 9(c2) may involve three OTAs but may not be affected by the parasitic capacitance of the capacitor bottom plate as it uses grounded capacitors throughout.


A generalized N-th order all-pass filter can be realized by implementing the circuit 250 with a LC ladder network 960 as shown in FIG. 9(d) or a LC ladder network 970 as shown in FIG. 9(e). In FIG. 9(d), the LC ladder network 960 includes (N+1)/2 inductor(s) that are coupled in a series configuration from the input of the LC network to a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(d)). The LC ladder network 960 also includes (N−1)/2 capacitor(s), each coupled from a respective tap point between the inductors to the power supply terminal with the predetermined voltage reference level (e.g., ground as shown in FIG. 9(d)).


In FIG. 9(e), the LC ladder network 970 includes N/2 inductor(s) that are coupled together in a series configuration from the input of the LC network to a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(e)). LC ladder network 970 also includes N/2 capacitor(s), each of the capacitor(s) being coupled between one of the inductor(s) and the power supply terminal with the predetermined voltage reference level (e.g., ground as shown in FIG. 9(e)).


The N-th order all-pass filter can be realized by configuring Ii1=Ii2=Iin and gm1=gm2=gm. The transfer function of the N-th order all-pass filters can be obtained by substituting for Y(s) the admittance of the LC ladder networks 960 or 970 into Eq. (11) above. In some examples, the inductor(s) in FIG. 9(d) and FIG. 9(e) can be implemented with the OTA-C simulated inductor 1000 or 1100, respectively shown in FIGS. 10 and 11.



FIG. 3 illustrates a simplified block diagram of an example OTA-based current-mode filter 300 arranged in accordance with at least some embodiments of the present disclosure. The filter 300 includes a DO-OTA 310 with an inverting (−) input 312, a non-inverting (+) input 314, a non-inverting (+) output 316, and an inverting (−) output 318. The filter 300 also includes a DO-OTA 330 with an inverting (−) input 332, a non-inverting (+) input 334, a non-inverting (+) output 336, and an inverting (−) output 338. The filter 300 further includes a circuit 350 with a first terminal 352 and a second terminal 354. The first DO-OTA 310 has a characteristic transconductance gm1. The second DO-OTA 330 has a characteristic transconductance gm2. The DO-OTA 310 and the DO-OTA 330 may have substantially the same characteristic transconductance gm. The circuit 350 has a characteristic admittance Y(s). The illustrated DO-OTA 330 behaves like a resistor of value 1/gm2.


The non-inverting (+) input 314 of the DO-OTA 310 is coupled to the second terminal 354 of circuit 350, the inverting (−) output 338 of the DO-OTA 330, and the inverting (−) output 318 of the DO-OTA 310. The inverting (−) input 312 of the DO-OTA 310 is coupled to the inverting (−) input 332 and the non-inverting (+) output 336 of the DO-OTA 330. The first terminal 352 of the circuit 350 and the non-inverting (+) input 334 of the DO-OTA 330 are coupled to a power supply terminal with a predetermined voltage reference level (e.g., VX, VDD, Vss, VGND, etc.). A current input, Ii1, is fed to the inverting (−) input 312 of the DO-OTA 310 and the inverting (−) input 332 of the DO-OTA 330. The inverting (−) output 338 of the DO-OTA 330 provides a current output, IO2, which is substantially the same as the current input, Ii1 The non-inverting (+) output 316 of the OTA 310 provides a current output, IO1+, and the inverting (−) output 318 of the DO-OTA 310 provides a current output, IO1. The current outputs (IO1+, IO1) of the DO-OTA 310 are determined by the voltage (Vi1+, Vi1) applied across inputs 314 and 312, where IO1+=−IO1=gm1·(Vi1+−Vi1). The current outputs (IO2+, −IO2) of the DO-OTA 330 are determined by the voltage (Vi2+, Vi2) applied across inputs 334 and 332, where IO2+=−IO2=gm2·(Vi2+−Vi2).


The input-output relation of the filter 300 is the same as the filter 100 in FIG. 1 and as given in Eq. (1) above. Accordingly, by configuring Ii1=Iin and gm1=gm2=gm, the filter 300 realizes the transfer function given by Eq. (2) above.


The circuit 350 can be implemented with the circuit shown in FIG. 9(a). A capacitor 910 with a capacitance value of C1 is coupled between the second terminal 354 of the circuit 350 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(a)). The admittance of the circuit 350 is Y(s)=sC1. By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (1) or Eq. (2), the filter 300 acts as a first-order non-inverting type all-pass filter and the transfer function is shown in Eq. (5) above.


A second-order all-pass filter can be realized by implementing the circuit 350 with the circuit shown in FIG. 9(b). A capacitor 920 with a capacitance value of C1 in parallel with an inductor 930 with an inductance value of I1 are coupled between to the second terminal 354 of the circuit 350 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(b)). In this example, the admittance of the circuit 350 is Y(s)=(sC1+1/(sL1)). By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)), and substituting these parameters into Eq. (1) or Eq. (2), the transfer function of the second-order all-pass filter is shown in Eq. (8) above.


Another second-order all-pass filter can be realized by implementing the circuit 350 with the circuit shown in FIG. 9(c1) or FIG. 9(c2). An impedance containing the inductor 940A with an inductance value of I1 in series with the capacitor 950A with a capacitance value C1 is coupled between the second terminal 354 of the circuit 350 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c1)). The admittance of the circuit 350 is Y(s)=1/(sL1+1/(sC1)). Alternatively, an impedance containing the capacitor 950B with a capacitance value C1 in series with the inductor 940B with an inductance value of I1 is coupled between the second-terminal 354 of the circuit 350 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c2)). By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)), and substituting these parameters into Eq. (1) or Eq. (2), the transfer function of the second-order all-pass filter can be obtained.


In some embodiments, the circuit arrangement using the inductor 940A of FIG. 9(c1) may involve two OTAs but may be affected by the parasitic capacitance of both the terminals of the floating capacitor. On the other hand, the circuit arrangement using the inductor 940B of FIG. 9(c2) may involve three OTAs but may not be affected by the parasitic capacitance of the capacitor bottom plate as it uses grounded capacitors throughout.


An N-th order all-pass filter can be realized by implementing the circuit 350 with the LC ladder network 960 as shown in FIG. 9(d) or the LC ladder network 970 as shown in FIG. 9(e). The N-th order all-pass filter can be realized by configuring Ii1=Iin and gm1=gm2=gm. The transfer function of the N-th order all-pass filter can be obtained by substituting for Y(s) the admittance of the LC ladder networks 960 or 970 into Eq. (2) above. In some examples, the inductor(s) in FIG. 9(d) and FIG. 9(e) can be implemented with the OTA-C simulated inductor 1000 or 1100, respectively shown in FIGS. 10 and 11.



FIG. 4 illustrates a simplified block diagram of an example OTA-based current-mode filter 400 arranged in accordance at least some embodiments of the present disclosure. The filter 400 includes a DO-OTA 410 with a non-inverting (+) input 412, an inverting (−) input 414, and two non-inverting (+) outputs 416 and 418. The filter 400 also includes a DO-OTA 430 with a non-inverting (+) input 434, an inverting (−) input 432, a non-inverting (+) output 436, and an inverting (−) output 438. The filter 400 further includes a circuit 450 with a first terminal 452 and a second terminal 454. The first DO-OTA 410 has a characteristic transconductance gm1. The second DO-OTA 430 has a characteristic transconductance gm2. The DO-OTA 410 and the DO-OTA 430 may have substantially the same characteristic transconductance gm. The circuit 450 has a characteristic admittance Y(s). The illustrated DO-OTA 430 behaves like a resistor of value 1/gm2.


The inverting (−) input 414 of the DO-OTA 410 is coupled to the circuit 450, the non-inverting (+) output 418 of the DO-OTA 410, and the inverting (−) output 438 of the DO-OTA 430. The non-inverting (+) input 412 of the DO-OTA 410 is coupled to the inverting (−) input 432 and the non-inverting (+) output 436 of the DO-OTA 430. The first terminal 452 of the circuit 450 and the non-inverting (+) input 434 of the DO-OTA 430 are coupled to a power supply terminal with a predetermined voltage reference level (e.g., VX, VDD, VSS, VGND, etc.). A current input, Ii1, is fed to the non-inverting (+) input 412 of the DO-OTA 410 and the inverting (−) input 432 of the DO-OTA 430. The inverting (−) output 438 of the DO-OTA 430 provides a current output, IO3, which is substantially the same as the current input, Ii1. The non-inverting (+) outputs 416 and 418 of DO-OTA 410 respectively provide output currents IO1 and a current IO2. The current outputs IO1, IO2 of the first DO-OTA are determined by the voltages Vi1+, Vi1 applied across inputs 412 and 414, where IO1=IO2=gm1·(Vi1+−Vi1). The current outputs IO3+, −IO3 of the second DO-OTA are determined by the voltage (Vi2+, Vi2) applied across inputs 434 and 432, where IO3+=IO3=gm2·(Vi2+−Vi2).


The input-output relation of the filter 400 in FIG. 4 is same as the filter 200 in FIG. 2 and is as given in Eq. (10) above. Accordingly, by configuring Ii1=Iin and gm1=gm2=gm, the filter 400 realizes the transfer function as given in Eq. (11) above.


The circuit 450 can be implemented with the circuit shown in FIG. 9(a). A capacitor 910 with a capacitance value of C1 is coupled between the second terminal 454 of the circuit 450 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(a)). The admittance of the circuit 450 is Y(s)=sC1. By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=sC1, and substituting these parameters into Eq. (10) or Eq. (11), the filter 400 acts as a first-order inverting type all-pass filter, and the transfer function is shown in Eq. (14) above.


A second-order all-pass filter can be realized by implementing the circuit 450 with the circuit shown in FIG. 9(b). A capacitor 920 with a capacitance value of C1 in parallel with an inductor 930 with an inductance value of I1 are coupled between the second terminal 454 of the circuit 450 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(b)). In this example, the admittance of the circuit 450 is Y(s)=(sC1+1/(sL1)). By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=(sC1+1/(sL1)), and substituting these parameters into Eq. (10) or Eq. (11), the transfer function of the second-order all-pass filter is shown in Eq. (17) above.


Another second-order all-pass filter can be realized by implementing the circuit 450 with the circuit shown in FIG. 9(c1) or FIG. 9(c2). An impedance containing the inductor 940A with an inductance value of I1 in series with the capacitor 950A with a capacitance value C1 is coupled between the second terminal 454 of the circuit 450 and a power supply terminal with a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c1)). Alternately, an impedance containing the capacitor 950B with a capacitance value C1 in series with the inductor 940B with an inductance value I1 is coupled between the second-terminal 454 of the circuit 450 and a power supply terminal, where the power supply terminal has a predetermined voltage reference level (e.g., ground as shown in FIG. 9(c2)). The admittance of the circuit 450 is Y(s)=1/(sL1+1/(sC1)). By configuring Ii1=Iin, gm1=gm2=gm, and Y(s)=1/(sL1+1/(sC1)), and substituting these parameters into Eq. (10) or Eq. (11), the transfer function of the second-order all-pass filter can be obtained.


An N-th order all-pass filter can be realized by implementing the circuit 450 with the LC ladder network 960 as shown in FIG. 9(d) or the LC ladder network 970 as shown in FIG. 9(e). The N-th order all-pass filter can be realized by configuring Ii1=Iin and gm1=gm2=gm. The transfer function of the N-th order all-pass filter can be obtained by substituting the parameters and the admittance of the LC ladder networks 960 or 970 into Eq. (11) above. In some examples, the inductor(s) in FIG. 9(d) and FIG. 9(e) can be implemented with the OTA-C simulated inductor 1000 or 1100, respectively shown in FIGS. 10 and 11.



FIG. 5 illustrates a simplified block diagram of an example current-mode quadrature oscillator 500 with two first-order all-pass filters, arranged in accordance with at least some embodiments of the present disclosure. A four-output-OTA 510, a SO-OTA 520, and a circuit 530 have a structure similar to the filter in FIG. 1 with two more inverting (−) outputs from the four-output-OTA 510, which are coupled to the inverting (−) input and non-inverting (+) input of a four-output-OTA 540, respectively. The four-output-OTA 510 has a characteristic transconductance gm510 and the SO-OTA 520 has a characteristic transconductance gm520. The current outputs (IO0+, −IO1, −IO1, −IO1−1) of the four-output-OTA 510 are determined by the voltage (Vi1+, Vi1) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO1+=−IO1=gm510·(Vi1+−Vi1). The current output of the SO-OTA 520 (IO2) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi2+, Vi2), i.e., IO2=gm520·(Vi2+−Vi2) In some embodiments, Vi2+ and Vi4+ are equal to ground voltage, when the non-inverting inputs of the SO-OTA 520 and the SO-OTA 550 are coupled to ground. The four-output-OTA 540, a SO-OTA 550, and a circuit 560 also have a structure similar to the circuit in FIG. 1 with one more inverting (−) output and one more non-inverting (+) output from the four-output-OTA 540. The four-output-OTA 540 has a characteristic transconductance gm540 and the SO-OTA 550 has a characteristic transconductance gm550. The current outputs (−IO3, IO3+, IO3+, IO3) of the four-output-OTA 540 are determined by the voltage (Vi3+, Vi3) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO3+=−IO3=gm540·(Vi3+−Vi3). The current output of the SO-OTA 550 (IO4) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi4+, Vi4), i.e., IO4=gm550·(Vi4+−Vi4). Two non-inverting (+) outputs of the four-output-OTA 540 are coupled to the inverting (−) input and non-inverting (+) input of the OTA 510, respectively. In this example, the circuits 530 and 560 are implemented with the capacitance circuit shown in FIG. 9(a). When the OTAs 510, 520, 540, and 550 are configured to have substantially the same transconductance gm, and the capacitance value of the circuits 530 and 560 are configured to have substantially the same capacitance value of C, the first-order all-pass filter composed of the four-output-OTA 510, SO-OTA 520, and circuit 530, and the first-order all-pass filter composed of the four-output-OTA 540, SO-OTA 550, and circuit 560 constitute the quadrature oscillator 500, which oscillates at an angular frequency, ωO=gm/C. The illustrated SO-OTAs 520 and 550 behave like resistors of value 1/gm520 and 1/gm550, respectively.



FIG. 6 illustrates a simplified block diagram of an example current-mode quadrature oscillator 600 with two first-order all-pass filters, arranged in accordance with at least some embodiments of the present disclosure. A four-output-OTA 610, a SO-OTA 620, and a circuit 630 have a structure similar to the filter in FIG. 2 with two more inverting (−) outputs from the four-output-OTA 610, which are coupled to the inverting (−) input and non-inverting (+) input of a four-output-OTA 640, respectively. The four-output-OTA 610 has a characteristic transconductance gm610 and the SO-OTA 620 has a characteristic transconductance gm620. The current outputs (IO1+, IO1, IO1, IO1+) of the four-output-OTA 610 are determined by the voltage (Vi1+, Vi1) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO1+=−IO1=gm610·(Vi1+−Vi1). The current output of the SO-OTA 620 (IO2) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi2+, Vi2), i.e., IO2=gm620·(Vi2+−Vi2). In some embodiments, Vi2+ and Vi4+ are equal to ground voltage, when the non-inverting inputs of the SO-OTA 620 and the SO-OTA 650 are coupled to ground. The four-output-OTA 640, a SO-OTA 650, and a circuit 660 also have a structure similar to the circuit in FIG. 2 with one more inverting (−) output and one more non-inverting (+) output from the four-output-OTA 640. The four-output-OTA 640 has a characteristic transconductance gm640 and the SO-OTA 650 has a characteristic transconductance gm650. The current outputs (−IO3, IO3+, IO3+, IO3) of the four-output-OTA 640 are determined by the voltage (Vi3+, Vi3) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO3+=−IO3=gm640·(Vi3+−Vi3). The current output of the SO-OTA 650 (Io4) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi4+, Vi4), i.e., IO4=gm650·(Vi4+−Vi4). Two non-inverting (+) outputs of the four-output-OTA 640 are coupled to the inverting (−) input and non-inverting (+) input of the OTA 610, respectively. In this example, the circuits 630 and 660 are implemented with the capacitance circuit shown in FIG. 9(a). When the OTAs 610, 620, 640, and 650 are configured to have substantially the same transconductance gm, and the capacitance value of the circuits 630 and 660 are configured to have substantially the same capacitance value of C, the first-order all-pass filter composed of the four-output-OTA 610, SO-OTA 620, and circuit 630, and the first-order all-pass filter composed of the four-output-OTA 640, SO-OTA 650, and circuit 660 constitute the quadrature oscillator 600, which oscillates at an angular frequency, ωO=gm/C. The illustrated OTAs 620 and 650 behave like resistors of value 1/gm620 and 1/gm650, respectively.



FIG. 7 illustrates a simplified block diagram of an example current-mode quadrature oscillator 700 with two first-order all-pass filters, arranged in accordance with at least some embodiments of the present disclosure. A three-output-OTA 710, a DO-OTA 720, and a circuit 730 have a structure similar to the filter in FIG. 3 with one more inverting (−) output from the three-output-OTA 710. The non-inverting (+) output of the three-output-OTA 740 is coupled to the inverting (−) input of the OTA 710. The three-output-OTA 710 has a characteristic transconductance gm710 and the DO-OTA 720 has a characteristic transconductance gm720. The current outputs (IO1+, IO1, IO1+) of the three-output-OTA 710 are determined by the voltage (Vi1+, Vi1) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO1+=−IO1=gm710·(Vi1+−Vi1). The current output of the DO-OTA 720 (IO2+, IO2) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi2+, Vi2), i.e., IO2+=−IO2=gm720·(Vi2+−Vi2). The three-output-OTA 740, a DO-OTA 750, and a circuit 760 also have a structure similar to the circuit in FIG. 3 with one more inverting (−) output from the three-output-OTA 740. The non-inverting (+) output of the three-output-OTA 740 is coupled to the inverting (−) input of the OTA 710. The three-output-OTA 740 has a characteristic transconductance gm740 and the DO-OTA 750 has a characteristic transconductance gm750. The current outputs (−IO3, IO3+, IO3) of the three-output-OTA 740 are determined by the voltage (Vi3+, Vi3) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO3+=IO3=gm740·(Vi3+−Vi3). The current outputs of the DO-OTA 750 (IO4+, IO4) are determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi4+, Vi4), i.e., IO4+=IO4=gm750·(Vi4+−Vi4). In this example, the circuits 730 and 760 are implemented with the capacitance circuit shown in FIG. 9(a). When the OTAs 710, 720, 740, and 750 are configured to have substantially the same transconductance gm, and the capacitance value of the circuits 730 and 760 are configured to have substantially the same capacitance value of C, the first-order all-pass filter composed of the three-output-OTA 710, DO-OTA 720, and the circuit 730, and the first-order all-pass filter composed of the three-output-OTA 740, the SO-OTA 750, and the circuit 760 constitute the quadrature oscillator 700, which oscillates at an angular frequency, ωO=gm/C. The illustrated OTAs 720 and 750 behave like resistors of value 1/gm720 and 1/gm750, respectively.



FIG. 8 illustrates a simplified block diagram of an example current-mode quadrature oscillator 800 with two first-order all-pass filters, arranged in accordance with at least some embodiments of the present disclosure. A three-output-OTA 810, a DO-OTA 820, and a circuit 830 have a structure similar to the filter in FIG. 4 with one more inverting (−) output from the three-output-OTA 810. The inverting (−) output of the three-output-OTA 810 is coupled to the non-inverting (+) input of the OTA 840. The three-output-OTA 810 has a characteristic transconductance gm810, and the DO-OTA 820 has a characteristic transconductance gm820. The current outputs (IO1+, IO1, IO1+) of the three-output-OTA 810 are determined by the voltage (Vi1+, Vi1) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO1+=−IO1=gm810·(Vi1+−Vi1). The current output of the DO-OTA (IO2+, −IO2) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi2+, Vi2), i.e., IO2+=−IO2=gm820·(Vi2+−Vi2). The three-output-OTA 840, a DO-OTA 850, and a circuit 860 also have a structure similar to the circuit in FIG. 4 with one more inverting (−) output from the three-output-OTA 840. The non-inverting (+) output of the three-output-OTA 840 is coupled to the non-inverting (+) input of the OTA 810. The three-output-OTA 840 has a characteristic transconductance gm840 and the DO-OTA 850 has a characteristic transconductance gm850. The current outputs (−IO3, IO3+, IO3+) of the three-output-OTA 840 are determined by the voltage (Vi3+, Vi3) applied across the non-inverting (+) and inverting (−) inputs, i.e., IO3+=−IO3=gm840·(Vi3+−Vi3). The current output of the DO-OTA (IO4+, IO4) is determined by the voltage applied across the non-inverting (+) and inverting (−) inputs (Vi4+, Vi4), i.e., IO4+=−IO4=gm850·(Vi4+−Vi4). In this example, the circuits 830 and 860 are implemented with the capacitance circuit shown in FIG. 9(a). When the OTAs 810, 820, 840, and 850 are configured to have substantially the same transconductance gm, the capacitance value of the circuits 830 and 860 are configured to have substantially the same capacitance value of C, the first-order all-pass filter composed of the three-output-OTA 810, DO-OTA 820, and the circuit 830, and the first-order all-pass filter composed of the three-output-OTA 840, SO-OTA 850, and circuit 860 constitute the quadrature oscillator 800, which oscillates at an angular frequency, ωO=gm/C. The illustrated OTAs 820 and 850 behave like resistors of value 1/gm820 and 1/gm850, respectively.


The herein described subject matter sometimes illustrates different components contained within, or connected with, different other components. It is to be understood that such depicted architectures are merely exemplary, and that in fact many other architectures can be implemented which achieve the same functionality. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as “associated with” each other such that the desired functionality is achieved, irrespective of architectures or intermediate components. Likewise, any two components so associated can also be viewed as being “operably connected”, or “operably coupled”, to each other to achieve the desired functionality, and any two components capable of being so associated can also be viewed as being “operably couplable”, to each other to achieve the desired functionality. Specific examples of operably couplable include but are not limited to physically mateable and/or physically interacting components and/or wirelessly interactable and/or wirelessly interacting components and/or logically interacting and/or logically interactable components.


With respect to the use of substantially any plural and/or singular terms herein, those having skill in the art can translate from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or application. The various singular/plural permutations may be expressly set forth herein for sake of clarity.


It will be understood by those within the art that, in general, terms used herein, and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as “open” terms (e.g., the term “including” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “having at least,” the term “includes” should be interpreted as “includes but is not limited to,” etc.). It will be further understood by those within the art that if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases “at least one” and “one or more” to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim recitation to inventions containing only one such recitation, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an” (e.g., “a” and/or “an” should typically be interpreted to mean “at least one” or “one or more”); the same holds true for the use of definite articles used to introduce claim recitations. In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should typically be interpreted to mean at least the recited number (e.g., the bare recitation of “two recitations,” without other modifiers, typically means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to “at least one of A, B, and C, etc.” is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., “a system having at least one of A, B, and C” would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). In those instances where a convention analogous to “at least one of A, B, or C, etc.” is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., “a system having at least one of A, B, or C” would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). It will be further understood by those within the art that virtually any disjunctive word and/or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase “A or B” will be understood to include the possibilities of “A” or “B” or “A and B.”


From the foregoing, it will be appreciated that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the following claims.

Claims
  • 1. A filter, comprising: a first circuit having a first node and a second node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: an inverting input for coupling to a first input current signal;a non-inverting input, coupled to the second node, for coupling to a second input current signal;an inverting output, coupled to the second node, for providing a first output current signal; anda non-inverting output for providing a second output current signal; anda second OTA, comprising:a non-inverting input, coupled to the first node;an inverting input, coupled to the inverting input of the first OTA; anda non-inverting output, coupled to the inverting input of the first OTA, for providing a third output current signal;wherein the first OTA and the second OTA have substantially the same transconductance, and the filter is configured such that the first and the second output current signals are proportional to the transconductance of the first OTA and a voltage difference between the non-inverting input and the inverting input of the first OTA, and the third output current signal is proportional to the transconductance of the second OTA and a voltage difference between the non-inverting input and the inverting input of the second OTA.
  • 2. The filter of claim 1, wherein the first circuit comprises: M inductors series coupled between the first node and the second node; andM−1 capacitors, each coupled between a respective one of the M inductors and the first node.
  • 3. The filter of claim 1, wherein the first circuit comprises: M inductors series coupled between the first node and the second node; andM capacitors each coupled between a respective one of the M inductors and the first node.
  • 4. The filter of claim 1, wherein the first circuit is either: a capacitor;an inductor;a simulated inductor;a capacitor coupled in parallel with an inductor;a capacitor coupled in parallel with a simulated inductor;a capacitor series coupled to an inductor; ora capacitor series coupled to a simulated inductor.
  • 5. A filter, comprising: a first circuit having a first node and a second node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising:an inverting input for coupling to a first input current signal; a non-inverting input, coupled to the second node;an inverting output, coupled to the second node, for providing a first output current signal; anda non-inverting output for providing a second output current signal; anda second OTA, comprising:a non-inverting input, coupled to the first node;an inverting input coupled to the inverting input of the first OTA;a non-inverting output, coupled to the inverting input of the first OTA, for providing a third output current signal; andan inverting output, coupled to the second node, for providing a fourth output current signal;wherein the first OTA and the second OTA have substantially the same transconductance, and the filter is configured such that the first and the second output current signals are proportional to the transconductance of the first OTA and a voltage difference between the non-inverting input and the inverting input of the first OTA, and the third and the fourth output current signals are proportional to the transconductance of the second OTA and a voltage difference between the non-inverting input and the inverting input of the second OTA.
  • 6. The filter of claim 5, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM−1 capacitors, each coupled between a respective one of the M inductors and the first node.
  • 7. The filter of claim 5, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM capacitors, each coupled between a respective one of the M inductors and the first node.
  • 8. The filter of claim 5, wherein the first circuit is either: a capacitor;an inductor;a simulated inductor;a capacitor coupled in parallel with an inductor;a capacitor coupled in parallel with a simulated inductor; ora capacitor series coupled to an inductor; ora capacitor series coupled to a simulated inductor.
  • 9. A quadrature oscillator, comprising: a first filter, comprising: a first capacitor coupled to a first node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: an inverting input;a non-inverting input coupled to the first capacitor;a first inverting output;a second inverting output;a third inverting output coupled to the first capacitor; anda non-inverting output; anda second OTA, comprising: a non-inverting input coupled to the first node;an inverting input coupled to the inverting input of the first OTA; anda non-inverting output coupled to the inverting input of the first OTA; anda second filter, comprising:a second capacitor coupled to the first node;a third OTA, comprising: an inverting input coupled to the first inverting output of the first OTA;a non-inverting input coupled to the second inverting output of the first OTA and the second capacitor;a first non-inverting output coupled to the inverting input of the first OTA;a second non-inverting output coupled to the non-inverting input of the first OTA;a first inverting output coupled to the second capacitor; anda second inverting output; anda fourth OTA, comprising:a non-inverting input coupled to the first node;an inverting input coupled to the inverting input of the third OTA; anda non-inverting output coupled to the inverting input of the third OTA;wherein the first OTA, the second OTA, the third OTA, and the fourth OTA have substantially the same transconductance, and the first capacitor and the second capacitor have substantially the same capacitance value.
  • 10. A quadrature oscillator, comprising: a first filter, comprising: a first capacitor coupled to a first node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: an inverting input;a non-inverting input coupled to the first capacitor;a first inverting output;a second inverting output coupled to the first capacitor; anda non-inverting output; anda second OTA, comprising:a non-inverting input coupled to the first node;an inverting input coupled to the inverting input of the first OTA;a non-inverting output coupled to the inverting input of the first OTA; andan inverting output coupled to the non-inverting input of the first OTA; anda second filter, comprising: a second capacitor coupled to the first node;a third OTA, comprising: an inverting input coupled to the first inverting output of the first OTA;a non-inverting input coupled to the second capacitor;a non-inverting output coupled to the inverting input of the first OTA;a first inverting output coupled to the second capacitor; anda second inverting output; and a fourth OTA, comprising: a non-inverting input coupled to the first node;an inverting input coupled to the inverting input of the third OTA;a non-inverting output coupled to the inverting input of the third OTA; andan inverting output coupled to the non-inverting input of the third OTA;wherein the first OTA, the second OTA, the third OTA, and the fourth OTA have substantially the same transconductance, and the first capacitor and the second capacitor have substantially the same capacitance value.
  • 11. A filter, comprising: a first circuit having a first node and a second node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: a non-inverting input for coupling to a first input current signal;an inverting input, coupled to the second node, for coupling to a second input current signal;a first non-inverting output, coupled to the second node, for providing a first output current signal; anda second non-inverting output for providing a second output current signal; anda second OTA, comprising: a non-inverting input, coupled to the first node;an inverting input, coupled to the non-inverting input of the first OTA; anda non-inverting output, coupled to the non-inverting input of the first OTA, for providing a third output current signal;wherein the first OTA and the second OTA have substantially the same transconductance, and the filter is configured such that the first and the second output current signals are proportional to the transconductance of the first OTA and a voltage difference between the non-inverting input and the inverting input of the first OTA, and the third output current signal is proportional to the transconductance of the second OTA and a voltage difference between the non-inverting input and the inverting input of the second OTA.
  • 12. The filter of claim 11, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM−1 capacitors, each coupled between a respective one of the M inductors and the first node.
  • 13. The filter of claim 11, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM capacitors, each coupled between a respective one of the M inductors and the first node.
  • 14. The filter of claim 11, wherein the first circuit is either: a capacitor;an inductor;a simulated inductor;a capacitor coupled in parallel with an inductor; a capacitor coupled in parallel with a simulated inductor; ora capacitor series coupled to an inductor; ora capacitor series coupled to a simulated inductor.
  • 15. A filter, comprising: a first circuit having a first node and a second node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: a non-inverting input for coupling to a first input current signal;an inverting input, coupled to the second node;a first non-inverting output, coupled to the second node, for providing a first output current signal; anda second non-inverting output for providing a second output current signal; anda second OTA, comprising: a non-inverting input, coupled to the first node;an inverting input, coupled to the non-inverting input of the first OTA; anda non-inverting output, coupled to the non-inverting input of the first OTA, for providing to a third output current signal; andan inverting output, coupled to the second node, for providing to a fourth output current signal;wherein the first OTA and the second OTA have substantially the same transconductance, and the filter is configured such that the first and the second output current signals are proportional to the transconductance of the first OTA and a voltage difference between the non-inverting input and the inverting input of the first OTA, and the third and the fourth output current signals are proportional to the transconductance of the second OTA and a voltage difference between the non-inverting input and the inverting input of the second OTA.
  • 16. The filter of claim 15, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM−1 capacitors, each coupled between a respective one of the M inductors and a first node.
  • 17. The filter of claim 15, wherein the first circuit comprises: M inductors serially coupled between the first node and the second node; andM capacitors, each coupled between a respective one of the M inductors and the first node.
  • 18. The filter of claim 15, wherein the first circuit is either: a capacitor;an inductor;a simulated inductor;a capacitor coupled in parallel with an inductor;a capacitor coupled in parallel with a simulated inductor;a capacitor series coupled to an inductor; ora capacitor series coupled to a simulated inductor.
  • 19. A quadrature oscillator, comprising: a first filter, comprising: a first capacitor coupled to a first node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: a non-inverting input;an inverting input coupled to the first capacitor;a first inverting output;a second inverting output;a first non-inverting output coupled to the first capacitor; anda second non-inverting output;a second OTA, comprising: a non-inverting input coupled to the first node;an inverting input coupled to the non-inverting input of the first OTA; anda non-inverting output coupled to the non-inverting input of the first OTA; anda second filter, comprising: a second capacitor coupled to the first node;a third OTA, comprising: a non-inverting input coupled to the first inverting output of the first OTA;an inverting input coupled to the second inverting output of the first OTA and the second capacitor;a first non-inverting output coupled to the non-inverting input of the first OTA;a second non-inverting output coupled to the inverting input of the first OTA;a third non-inverting output coupled to the second capacitor; andan inverting output; anda fourth OTA, comprising: a non-inverting input coupled to the first node;an inverting input coupled to the non-inverting input of the third OTA; anda non-inverting output coupled to the non-inverting input of the third OTA;wherein the first OTA, the second OTA, the third OTA, and the fourth OTA have substantially the same transconductance, and the first capacitor and the second capacitor have substantially the same capacitance value.
  • 20. A quadrature oscillator, comprising: a first filter, comprising: a first capacitor coupled to a first node, wherein the first node is a common node that is either a circuit ground node, a voltage reference node, or a power supply node;a first operational transconductance amplifier (OTA), comprising: a non-inverting input;an inverting input coupled to the first capacitor;an inverting output;a first non-inverting output coupled to the first capacitor; anda second non-inverting output; a second OTA, comprising:a non-inverting input coupled to the first node;an inverting input coupled to the non-inverting input of the first OTA;a non-inverting output coupled to the non-inverting input of the first OTA; andan inverting output coupled to the inverting input of the first OTA; anda second filter, comprising: a second capacitor coupled to the first node;a third OTA, comprising: a non-inverting input coupled to the inverting output of the first OTA;an inverting input coupled to the second capacitor;a first non-inverting output coupled to the non-inverting input of the first OTA;a second non-inverting output coupled to the second capacitor; anda second inverting output; anda fourth OTA, comprising: a non-inverting input coupled to the first node;an inverting input coupled to the non-inverting input of the third OTA;a non-inverting output coupled to the non-inverting input of the third OTA; andan inverting output coupled to the inverting input of the third OTA;wherein the first OTA, the second OTA, the third OTA, and the fourth OTA have substantially the same transconductance, and the first capacitor and the second capacitor have substantially the same capacitance value.
Priority Claims (1)
Number Date Country Kind
2117/CHE/2010 Jul 2010 IN national
PCT Information
Filing Document Filing Date Country Kind 371c Date
PCT/IB10/55524 12/1/2010 WO 00 1/3/2012