Claims
- 1. An output signal converter for a tube amplifier comprising semiconductor devices for amplifying or attenuating an output signal of the tube amplifier while maintaining output properties of the tube amplifier, said output signal converter comprising:an output transformer (TR) having an input terminal (TRa); a first circuit branch (C1) connected between the input terminal (TRa) and an output terminal of the tube amplifier; and a second circuit branch (C2) connected to the input terminal (TRa) of the output transformer (TR) and in parallel to the first circuit branch, said second circuit branch including means for generating an electric current proportional to a current level in said first circuit branch; wherein said first circuit branch and said second circuit branch are located between said tube amplifier and said output transformer (TR) and comprise semiconductor devices so that said output signal from said tube amplifier is amplified while maintaining the output properties of the tube amplifier.
- 2. The output signal converter as defined in claim 2, wherein said first circuit branch consists of a first resistance (R1, R11) and a first transistor (Q1, Q11) connected in series with each other, said second circuit branch consists of a second resistance (R2, R12) and a second transistor (Q2, Q12) connected in series with each other, said first transistor (Q1, Q11) has a base terminal connected to a node between the second resistance (R2, R12) and the second transistor (Q2, Q12) and said second transistor (Q2, Q12) has a base terminal connected to a node between the first transistor and the output terminal of the tube amplifier.
- 3. The output signal converter as defined in claim 2, further comprising a third transistor (Q13) connected in series between the second resistance (R12) and the second transistor (Q12) and also connected to the base terminal of the first transistor (Q11) to form a mirror circuit portion together with the first transistor.
- 4. The output signal converter as defined in claim 2, further comprising a diode (D1) connected between said second resistance (R2, R12) and said second transistor (Q2, Q12).
- 5. The output signal converter as defined in claim 2, wherein said second resistance (R2, R12) is a variable resistance.
- 6. An output signal converter for a tube amplifier comprising semiconductor devices for amplifying or attenuating an output signal of the tube amplifier while maintaining output properties of the tube amplifier, said tube amplifier comprising a first vacuum tube and a second vacuum tube and said output signal converter comprisingan output transformer having a first input terminal and a second input terminal; a first circuit branch connected between the first input terminal and an output terminal of the first vacuum tube; a second circuit branch connected to the first input terminal of the output transformer and in parallel to the first circuit branch, said second circuit branch including means for generating an electric current proportional to a current level in said first circuit branch; a third circuit branch connected between the second input terminal of the output transformer and an output terminal of the second vacuum tube; a fourth circuit branch connected to the second input terminal of the output transformer and in parallel to the third circuit branch, said fourth circuit branch including means for generating an electric current proportional to the current level flowing in the first circuit branch; wherein said first circuit branch, said second circuit branch, said third circuit branch and said fourth circuit branch are located between said tube amplifier and said output transformer and comprise semiconductor devices so that said output signal from said tube amplifier is amplified while maintaining the output properties of the tube amplifier.
- 7. The output signal converter as defined in claim 6, wherein said first circuit branch consists of a first resistance and a first transistor connected in series with each other, said second circuit branch consists of a second resistance and a second transistor connected in series with each other, said third circuit branch consists of a third resistance and a third transistor connected in series with each other, said fourth circuit branch consists of a fourth resistance and a fourth transistor connected in series with each other, said first transistor has a base terminal connected to a node between the second resistance and the second transistor, said second transistor has a base terminal connected to a node between the first transistor and the output terminal of the first vacuum tube, said third transistor has a base terminal connected to a node between the fourth transistor and the fourth resistance and said fourth transistor has a base terminal connected to a node between the third transistor and the output terminal of the second vacuum tube.
- 8. The output signal converter as defined in claim 7, further comprising a fifth transistor connected between the second resistance and the second transistor and also connected to the first transistor to form a current mirror circuit portion and a sixth transistor connected between the fourth resistance and the fourth transistor and also connected to the third transistor to form another current mirror circuit portion.
- 9. The output signal converter as defined in claim 7, further comprising a first diode connected between the second resistance and the second transistor and a second diode connected between the fourth resistance and the fourth transistor.
- 10. The output signal converter as defined in claim 7, wherein said second resistance and said fourth resistance are each variable.
Priority Claims (2)
Number |
Date |
Country |
Kind |
9-348729 |
Dec 1997 |
JP |
|
10-199038 |
Jul 1998 |
JP |
|
Parent Case Info
This is a divisional of Ser. No. 09/200,102, filed on Nov. 24, 1998, now U.S. Pat. No. 6,175,271.
US Referenced Citations (3)
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5734725 |
Pritchard |
Mar 1998 |
|
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Zimmerman |
Jun 1999 |
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6175271 |
Mieda et al. |
Jan 2001 |
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Foreign Referenced Citations (1)
Number |
Date |
Country |
12-31754 |
Jan 2000 |
JP |