Claims
- 1. A method for protecting an I/O circuit of an electronic circuit against overvoltages, comprising the steps of:
- (a) connecting the I/O circuit of the electronic circuit to a current path comprising a first diode through which current flows when the voltage on the I/O circuit is a negative overvoltage;
- (b) providing the I/O circuit of the electronic circuit with a second current path comprising a second diode connected in series to a time-delay circuit at a first node; the time delay circuit including a thyristor connected between the first node and ground and having a gate, a zener diode connected in series with a first resistance between the first node and ground, and a second resistance connected between the gate and a second node linking the zener diode and the first resistance, whereby the thyristor is fired by a time-delay in the time-delay circuit when the voltage on the I/O circuit is an a positive overvoltage, the current flowing through the current paths providing the overvoltage protection.
- 2. The method according to claim 1, further including the step of:
- (c) providing a first capacitor connected to the time-delay circuit in parallel with the thyristor, and a second capacitor for removing transient interference voltage peaks.
- 3. The method according to claim 1 or 2, further including the step of providing the first diode, the second diode, and the thyristor with current ratings exceeding the fusing value of a mains fuse included in the secondary circuit of a decoupling transformer.
- 4. The method according to claim 3, further including the step of connecting the time-delay circuit to a plurality of I/O circuits.
- 5. The method of claim 2, wherein said step (c) includes connecting said second capacitor in parallel with said first capacitor.
- 6. An apparatus for protecting an input/output circuit of an electronic circuit against overvoltages, comprising:
- a conductor for the input/output circuit of the electronic circuit;
- a first reverse-biased diode having an anode connected to ground and a cathode connected to said conductor;
- a second forward-biased diode connected between the conductor and a first node; and
- a time-delay circuit connected between the first node and ground, said time-delay circuit including a first capacitor and a thyristor connected in parallel between the first node and ground, a gate of said thyristor being connected through a Zener diode to the node and to a cathode of said second diode.
- 7. The apparatus according to claim 5, further including a plurality of conductors, each for a respective I/O circuit and connected through respective first reverse-biased diodes to ground and through respective second forward-biased diodes to the first node, wherein the first and second diodes are connected as a bridge circuit.
- 8. The apparatus of claim 7, wherein said time-delay circuit further includes:
- a second resistance connected between said Zener diode and the gate of said thyristor, said second resistance connecting to said Zener diode at a second node;
- a first resistance connected between the second node and ground;
- a third resistance connected between said first node and a positive voltage source; and
- a second capacitor connected in parallel with said first capacitor between said first node and ground, said second capacitor having a smaller capacitance than said first capacitor and absorbing transient voltage peaks at said first node.
- 9. The apparatus of claim 6, wherein said time-delay circuit further includes a resistance connected between said Zener diode and the gate of said thyristor.
- 10. The apparatus of claim 9, wherein said resistance connects to said Zener diode at a second node, and further including another resistance connected between the second node and ground.
- 11. The apparatus of claim 6, wherein said time-delay circuit further includes a resistance connected between said first node and a positive voltage source.
Priority Claims (1)
Number |
Date |
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Kind |
941720 |
Apr 1994 |
FIX |
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Parent Case Info
This application is a continuation of application Ser. No. 08/421,483 filed on Apr. 13, 1995, now abandoned.
US Referenced Citations (7)
Foreign Referenced Citations (6)
Number |
Date |
Country |
0401410 |
Dec 1990 |
EPX |
0490787 |
Jun 1992 |
EPX |
0541097 |
May 1993 |
EPX |
3128638 |
Jul 1983 |
DEX |
3408788 |
Sep 1985 |
DEX |
9216019 |
Sep 1992 |
WOX |
Non-Patent Literature Citations (1)
Entry |
"Crowbar Protection," Elektor Electronics, vol. 18, No. 202, 01 Jul. 1992, p. 51. |
Continuations (1)
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Number |
Date |
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Parent |
421483 |
Apr 1995 |
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