The invention relates to packaging assemblies and, more particularly, to a package assembly for thin wafer shipping using a wafer container and a method of use.
Semiconductor wafer manufacturing utilizes very sophisticated wafer processing procedures and complicated manufacturing systems. In efforts to reduce the size of the semiconductor package, manufacturers have reduced component sizes including the thickness of the wafer, itself. For example, wafer thinning can be performed by a grinding method to achieve a wafer thickness on the order of 100 microns and less. These thin wafers, though, are very fragile and brittle. Of particular concern are thinned wafers with through silicon vias (TSV), which can be about 25% as strong as non TSV wafers. For example, as the fracture strength varies with the square of wafer thickness, a force to break the thin wafers can be around 1N or less.
Shipping of thin wafers is thus a difficult challenge. Currently, for example, the wafers are placed into plastic containers for shipping. In known implementations, the wafers are manually placed into the containers with foam cushions on the bottom and on top and thin cleanroom paper dispersed between each wafer. Once placed into the containers, a top is placed onto the container. However using these containers and methods of insertion, the thinned wafers are subjected to an unacceptably high risk of damage. For example, when the thin wafers are flexed, whether during the packaging or shipping process, they become susceptible to micro-crack generation, which ultimately leads to wafer breakage.
Also, existing methods for loading and unloading thin, fragile wafers into and out of shipping containers is prone to causing wafer breakage. For example, dicing vendors prefer to manually remove thin, fragile wafers instead of extracting them from shipping containers with vacuum wands. However, wafers easily break if they contact the wall of the shipping container while they are being placed into and/or removed from the shipping container. This problem will only grow worse as the industry trends to even thinner wafers.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.
In an aspect of the invention, a package assembly comprises a shipping container and a wafer container having a bottom surface and a plurality of straps attached thereto placed within the shipping container. The package assembly further comprises upper and lower force distribution plates provided within the shipping container positioned respectively on a top side and bottom side thereof.
In an aspect of the invention, a package assembly comprises a wafer container comprising a plurality of straps. The package assembly further comprises a stack of wafers interposed with ESD compliant material sheets positioned within the wafer container. The package assembly further comprises a distribution plate positioned on a top side and bottom side of the stack of wafers. The distribution plates are structured to: contain the stack of wafers as a unit; and distribute forces across a surface of the stack of wafers.
In an aspect of the invention, a method comprises: spreading straps of a wafer container to expose a bottom surface thereof; placing a lower force distribution plate on the bottom surface of the wafer container; alternately stacking a plurality of wafers and sheets on the lower force distribution plate; placing an upper force distribution plate on an upper sheet of the stack of wafers; lifting the wafer container and placing it within a shipping container; placing foam cushioning within the shipping container to protect the stack of wafers; and sealing the shipping container.
The present invention is described in the detailed description which follows, in reference to the noted plurality of drawings by way of non-limiting examples of exemplary embodiments of the present invention.
The invention relates to packaging assemblies and, more particularly, to a package assembly for thin wafer shipping using a wafer container and a method of use. More specifically, the present invention is directed to a wafer container (also referred to as a wafer basket or wafer cartridge) for holding thin wafers. Advantageously, the wafer container allows fragile wafers to be loaded into and unloaded from a shipping container without breakage or damage from contacting the walls of the shipping container. Thus, the present invention prevents breakage of the thin wafers during the shipping process, e.g., packaging and unpackaging of the thin wafers.
In embodiments, the wafer container includes straps provided in many different configurations as described herein, which allow the wafer container to be packaged into and unpackaged from the shipping container. In embodiments, the straps can be hinged or made of flexible material, any of which configuration has a length extending beyond an upper portion of the shipping container to provide a means for grasping the straps for such packaging and unpackaging. By using the wafer container, the probability of wafer breakage decreases significantly over existing approaches. In fact, tests have shown that a success rate of 100% can be achieved with shipping sub-100 μm thickness wafers.
In addition to using the wafer container, force distribution plates can be used within the package assembly to reduce flexing of the thin wafers while in transit. The force distribution plates are rigid plates placed below and above a stack of thin wafers in a container, thereby restricting flexure of the wafer and reducing wafer breakage. In embodiments, the force distribution plates can be placed within the wafer container with the stack of wafers. In other embodiments, the straps can be directly fastened to the force distribution plates, for packaging into and unpackaging from the shipping container.
Still referring to
In this configuration, the bottom force distribution plate is provided on a bottom of a stack of wafers 20, 22, and a top force distribution plate 24 is provided on a top side the stack of wafers 20, 22. Advantageously, by using the force distribution plates 24 in combination with the wafer container (of any aspect of the invention), it is now possible to ship upwards of 13 or more 75 micron thin wafers 20, without damage; compared to conventional systems which are able to stack only six wafers, with the possibility of damage occurring to some of those wafers. Accordingly, in aspects of the present invention, the wafer container (of
The force distribution plates 24 are reasonably flat and rigid, thereby preventing flexure of the wafers during shipping. The force distribution plates 24 are also sized to fit within a shipping container and wafer container of any aspect of the present invention. The force distribution plate 24, for example, can be standard thickness silicon wafers or some other suitable material fabricated into force distribution plates, e.g., any ESD (electro-static discharge) compliant material such as metal discs, plastic discs with conductive coatings or other materials. The force distribution plate 24 can have a thickness of about 1 mm to about 2 mm; although other dimensions are contemplated by the present invention, depending on the material used to fabricate the force distribution plate 24.
During shipping, the force distribution plates 24 advantageously distribute forces over the entire surface of the wafers, thus reducing the overall force applied to any single point on the wafer. For example, vibration forces occurring during shipping as well as vertical forces applied onto the wafers during packaging and unpackaging can be distributed over the entire surface of the wafers, thereby reducing or eliminating a larger force being applied to any single point or small area on the wafer. In more specific embodiments, the force distribution plate 24 is rigid enough to withstand at least 1N or more of force, to prevent flexure of the thinned wafers. Essentially, the force distribution plates 24 act to contain the thin wafers 20 as a unit, allowing them to move only as a unit and distribute all forces across the wafer surface thereby reducing and/or eliminating any damage to the wafers.
As represented by
(i) the straps of the wafer container are spread out, allowing access to the bottom surface;
(ii) a lower force distribution plate is placed on the bottom surface of the wafer container;
(iii) a plurality of wafers and sheets are alternately stacked on the lower distribution plate, on the bottom surface of the wafer container. The wafers can be stacked (and unstacked) using a conventional vacuum wand;
(iv) an upper force distribution plate is placed on an uppermost sheet of the stack of wafers;
(v) at any stage before, during or after steps (i)-(iv), a foam cushion can be placed on a bottom of the shipping container. At similar stages, in optional embodiments, the perimeter foam cushions can also be placed in the shipping container;
(vi) the straps of the wafer container are grasped by a user, e.g., the straps are held together above the upper force distribution plate;
(vii) the user picks up the wafer container, using the straps, and places the assembly within the shipping container (on the foam);
(viii) the user folds the straps in the manner already described herein;
(ix) upper foam is placed on the wafer container, above the upper force distribution plate;
(x) in embodiments, a top cover can be placed on the upper foam; and
(xi) the container is sealed.
The wafer shipping container may then be disassembled by reversing the assembly process. It should be understood by those of ordinary skill in the art, that the unloading (unpacking) process does not necessarily require removal of the lower distribution plate, the lower foam sheet or the perimeter cushions.
Table 1 shows testing performed on 100 micron, 85 micron, 75 micron and 65 micron wafers. As shown in this table, each of the wafers passed all testing: downward pressure test, vibration test and drop test.
The method(s) as described above is used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (that is, as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case the chip is mounted in a single chip package (such as a plastic carrier, with leads that are affixed to a motherboard or other higher level carrier) or in a multichip package (such as a ceramic carrier that has either or both surface interconnections or buried interconnections). In any case the chip is then integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either (a) an intermediate product, such as a motherboard, or (b) an end product. The end product can be any product that includes integrated circuit chips, ranging from toys and other low-end applications to advanced computer products having a display, a keyboard or other input device, and a central processor.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Number | Name | Date | Kind |
---|---|---|---|
2979246 | Liebeskind | Apr 1961 | A |
3102311 | Martin et al. | Sep 1963 | A |
3486200 | Orenick | Dec 1969 | A |
4688979 | Kupersmit | Aug 1987 | A |
4850283 | Carvin | Jul 1989 | A |
5682997 | Bartholomew | Nov 1997 | A |
5931205 | Jasica et al. | Aug 1999 | A |
6237771 | Haq | May 2001 | B1 |
6286684 | Brooks | Sep 2001 | B1 |
6341695 | Lewis | Jan 2002 | B1 |
6533123 | Nakamura et al. | Mar 2003 | B1 |
6662950 | Cleaver | Dec 2003 | B1 |
6988620 | Haggard et al. | Jan 2006 | B2 |
7059475 | Zabka et al. | Jun 2006 | B2 |
7225929 | Forsyth | Jun 2007 | B2 |
7431162 | Forsyth | Oct 2008 | B2 |
7918341 | Pylant et al. | Apr 2011 | B2 |
8104619 | Pylant et al. | Jan 2012 | B2 |
8393471 | Ochoa et al. | Mar 2013 | B2 |
8397917 | Kasama et al. | Mar 2013 | B2 |
8870503 | Stromberg | Oct 2014 | B2 |
9714113 | Jung | Jul 2017 | B2 |
20050098473 | Sheehan, Jr. | May 2005 | A1 |
20050109651 | Fujimori | May 2005 | A1 |
20050194279 | Coppola et al. | Sep 2005 | A1 |
20100101635 | Koester et al. | Apr 2010 | A1 |
20110158761 | Jackson | Jun 2011 | A1 |
20120181215 | Brooks et al. | Jul 2012 | A1 |
20120279896 | Lantz | Nov 2012 | A1 |
20130140303 | James | Jun 2013 | A1 |
20130240398 | Garner et al. | Sep 2013 | A1 |
Number | Date | Country |
---|---|---|
2007314208 | Dec 2007 | JP |
4924033 | Apr 2012 | JP |
2012071878 | Apr 2012 | JP |
4943387 | May 2012 | JP |
2013145768 | Jul 2013 | JP |
20070012370 | Jan 2007 | KR |
2005113375 | Dec 2005 | WO |
2011135639 | Nov 2011 | WO |
Entry |
---|
International Search Report and Written Opinion for related Application No. PCT/IB2014/062985, dated Oct. 14, 2014, 9 pages. |
Number | Date | Country | |
---|---|---|---|
20170032993 A1 | Feb 2017 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 14036999 | Sep 2013 | US |
Child | 15292613 | US |