Embodiments of the present disclosure generally relate to the field of package assemblies, and in particular package assemblies that include photonic integrated circuit (PIC) dies.
Continued reduction in end product size of LiDAR (Light Detection and Ranging) optical sensors for Autonomous Vehicles is a driving force for the development of reduced size system in package components.
Embodiments of the present disclosure may generally relate to systems, apparatus, and/or processes directed to a package that include multiple PICs in the package that are optically coupled with each other. In embodiments, the package may include discrete electronic and optical components. The package may be surrounded by housing that may be used in part for thermal management. In embodiments, the housing may include openings to access optical components, for example optical components used to optically couple the multiple PICs within the package. In embodiments, a PIC may include, but is not limited to, a transceiver, a LiDAR transceiver, a laser, a tunable external feedback laser (TEFL), or a wavelength switchable laser array (WSLA).
In embodiments, the multiple PICs may be physically coupled with a substrate that may include an optical bench to provide alignment stability with the multiple PICs, particularly with respect to their optical coupling. One or more thermal management features, which may use to dissipate, route, or, otherwise adjust for heat generated by PICs within a package, may include but are not limited to TECs, thermal interface materials (TIMs), heat spreaders, and the like. These thermal management features may be integrated into the package and/or may be thermally coupled with the package.
In embodiments, the thermal management features may be used to support different thermal setpoints and different thermal tolerances for each of the different PICs within the package to meet electrical performance requirements at the required temperatures. In addition, various materials may be chosen to minimize differences between a coefficient of thermal expansion (CTE) of various components within the package to further decrease expansion differences during heat of operation of the package in order to minimize optical alignment issues within the package.
In addition, in embodiments, the PICs may be coupled with interposers that may be used to electrically couple the PIC with a substrate, which may reduce or eliminate the need for wire bonding or wire bond pads within the package. In embodiments, the PICs may be attached to substrates or other components within the package using a flip chip assembly process. In embodiments, these packages may be used for silicon photonics-based LiDAR systems, for example, to increase sensor capability and functionality within autonomous vehicles. These embodiments facilitate the addition of more sensors within a constrained vehicle space by facilitating the reduction of the form factor of these LiDAR systems.
Legacy systems include using an external laser component outside of a PIC package, where the external laser may be integrated into the LiDAR system. Using external laser components increase LiDAR system form factor and cost, and lead to manufacturing challenges with integrating LiDAR sensors into autonomous vehicles, including increasing bill of materials (BOM) costs of the legacy LiDAR system. In addition, legacy systems use a common thermal solution that does not thermally isolate a PIC within a package. For example, legacy systems are not able to thermally isolate multiple PICs within a package, or enable independent thermal control of the multiple PICs. This is particularly true when the multiple PICs may each have different thermal requirements.
In the following detailed description, reference is made to the accompanying drawings which form a part hereof, wherein like numerals designate like parts throughout, and in which is shown by way of illustration embodiments in which the subject matter of the present disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of embodiments is defined by the appended claims and their equivalents.
For the purposes of the present disclosure, the phrase “A and/or B” means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
The description may use perspective-based descriptions such as top/bottom, in/out, over/under, and the like. Such descriptions are merely used to facilitate the discussion and are not intended to restrict the application of embodiments described herein to any particular orientation.
The description may use the phrases “in an embodiment,” or “in embodiments,” which may each refer to one or more of the same or different embodiments. Furthermore, the terms “comprising,” “including,” “having,” and the like, as used with respect to embodiments of the present disclosure, are synonymous.
The term “coupled with,” along with its derivatives, may be used herein. “Coupled” may mean one or more of the following. “Coupled” may mean that two or more elements are in direct physical or electrical contact. However, “coupled” may also mean that two or more elements indirectly contact each other, but yet still cooperate or interact with each other, and may mean that one or more other elements are coupled or connected between the elements that are said to be coupled with each other. The term “directly coupled” may mean that two or more elements are in direct contact.
Various operations may be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent.
As used herein, the term “module” may refer to, be part of, or include an ASIC, an electronic circuit, a processor (shared, dedicated, or group) and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable components that provide the described functionality.
Various Figures herein may depict one or more layers of one or more package assemblies. The layers depicted herein are depicted as examples of relative positions of the layers of the different package assemblies. The layers are depicted for the purposes of explanation, and are not drawn to scale. Therefore, comparative sizes of layers should not be assumed from the Figures, and sizes, thicknesses, or dimensions may be assumed for some embodiments only where specifically indicated or discussed.
In embodiments, the optical bench 104 may be used as a support platform that is designed to be very rigid with a minimum amount of deflection during operation. This facilitates the alignment of optical elements attached to the optical bench 104, for example laser PIC die 106 and transceiver PIC die 108, staying within optical alignment tolerances. In embodiments, the optical bench 104 may be made of a metal with low CTE to provide thermo-mechanical stability to the optical bench 104 during operating conditions, and in embodiments including Invar that includes iron and nickel, and may be represented as FeNi36.
In embodiments, other dies 110 may be physically and/or electrically coupled with the substrate 102, and may be electrically coupled with the laser PIC die 106 and/or transceiver PIC die 108. In embodiments, the transceiver PIC die 108 may be optically coupled with a prism 114, which may be used to transmit or receive light via one or more light pathways through a top of the package, as discussed further below. In embodiments, the transceiver PIC die 108 may be electrically coupled with a connector 116.
In embodiments, a laser PIC die 106 may be physically and thermally coupled with the first optical bench area 104a. In embodiments, the physical and thermal coupling may be achieved with an adhesive 120, with low thermal conductivity, such that all the heat generated by the laser PIC die 106, will be directed towards the top of the die, where the thermal solution is located. In embodiments, the laser PIC die 106 may be electrically coupled with the PCB 102 through a wire bond 106a. A transceiver PIC die 108 may be physically coupled with the second optical bench area 104b. In embodiments, the transceiver PIC die 108 may be electrically coupled with an interposer 112. In embodiments, the interposer 112 may be a substrate with one or more electrically conductive layers to route signals and/or power between the transceiver PIC die 108 and the PCB 102. In embodiments, the interposer 112 may include silicon. In embodiments, connections 112a, such as flip chip connections, may electrically couple the transceiver PIC die 108 with the interposer 112. The interposer 112 may be physically coupled with the second optical bench area 104b using an adhesive 122, with low thermal conductivity, such that all the heat generated by the transceiver PIC die 108, will be directed towards the top of the die, where the thermal solution is located.
The transceiver PIC die 108 is optically coupled with the laser PIC die 106 using optical components 124. In embodiments, the optical connectivity components 124 may include lenses and/or isolators. In embodiments, at least some of the optical connectivity components 124 may be physically coupled with the optical bench 104 and optically coupled with the laser PIC die 106 and the transceiver PIC die 108. As shown, some of the optical connectivity components 124 are physically coupled with the first optical bench area 104a, however in other embodiments (not shown) they may be physically coupled with the second optical bench area 104b.
Note that in embodiments discussed further below, access may be provided to the optical connectivity components 124, for example for installation, repair, or alignment adjustment, after the package 100C has been manufactured. In embodiments, a cover 126, that may extend from the optical bench 104 and/or the PCB 102 and surround the laser PIC die 106 and the transceiver PIC die 108, may include a hole or an access port (not shown but discussed below) to provide access to the optical components 124. In embodiments, the cover 126 may be referred to as a housing.
A TEC 128, that includes a cold side 128a and a hot side 128b opposite the cold side 128a, may be thermally coupled with the laser PIC die 106. In embodiments, this coupling may be done through an adhesive 130 that may have a high thermal conductivity. The TEC 128 may be electrically coupled with the PCB 102 using wire bonding 129. In this configuration, the TEC 128 may be used to manage the operating temperature of the laser PIC die 106.
A heat spreader 118 may be thermally coupled to the transceiver PIC die 108 using a TIM 130. In embodiments, the heat spreader 118 may include copper. A main TEC 136 may be thermally coupled with the TEC 128 using a TIM 134. The main TEC 136 may also be thermally coupled with the heat spreader 118 using a TIM 132.
In embodiments, a TEC 228, which may be similar to TEC 128 of
A prism 314, which may be similar to prism 114 of
A heat spreader 319 may be thermally coupled with the laser PIC die 306. The laser PIC die 306 may be physically and/or electrically coupled with an interposer 311, which may be similar to interposer 112 of
The heat spreader 318 may be thermally coupled with the transceiver PIC die 308, which may be physically and/or electrically coupled with an interposer 312. The interposer 312 may be physically coupled with the optical bench 304 using an adhesive 322, which may be similar to adhesive 122 of
An optical bench 404, which may be similar to optical bench 304 of
In embodiments, the heat spreader 560 may extend from the substrate 502, and come into thermal contact with the laser PIC die 506 and the transceiver PIC die 508. In embodiments, there may be a sealant adhesive material 521, which may be similar to sealant adhesive material 321 of
In embodiments, an opening 560a, which also may be referred to as a cutout, may be formed in the heat spreader 560 that allow access to the optical coupling components 524. This access may allow the installation, adjustment, or removal of the optical coupling components 524. In embodiments, another opening 560b may be formed to accommodate a prism 514, which may be similar to prism 314 of
Note that in embodiments, the heat spreader 560 may also serve as a cover for the package 500A, which may be similar to cover 126 of
In embodiments, the laser PIC die 606 and the transceiver PIC die 608 are optically coupled using optical coupling components 624, which may be similar to optical coupling components 524 of
A stiffener 607 may be physically coupled to a side of the substrate 602. In embodiments, the stiffener 607 may be proximate to the cutout 602a. In embodiments, the stiffener 607 may include stainless steel, or some other rigid material. A silicon spacer 670 may be physically and thermally coupled with the laser PIC die 606 using a TIM 672, and may be physically and thermally coupled with the transceiver PIC die 608 using a TIM 674. In embodiments the TIM 672, 674 may be thermal adhesives with a high glass transition temperature (Tg). The Tg is the temperature at which a polymer material changes from a hard and relatively brittle “glasssy” state into a viscous or rubbery state as the temperature is increased. A high Tg material provides thermo-mechanical stability to the physical coupling of the PIC dies 608 and 606 to the silicon spacer 670 during subsequent thermal operations in the assembly process and during the thermal operating conditions of the package.
The silicon spacer 670, may also be thermally coupled with a second TIM 675 at a side opposite the side coupled with the laser PIC die 606 and the transceiver PIC die 608. Multiple TECs 676, 678 maybe coupled with the second TIM 675, and may be located proximate to the transceiver PIC die 608 and the laser PIC die 606, respectively. The TECs 676, 678 may be embedded into or surrounded by a backing plate 680. In embodiments, the backing plate 680 may include copper or aluminum nitride. In embodiments, the combined silicon spacer 670, the second TIM 675, and the backing plate 680 provide a rigid stage 682, which may provide a very rigid platform, with very little deflection during operation, that may be used to secure the positions and optical alignment of the laser PIC die 606 and the transceiver PIC die 608.
In embodiments, a CTE of the silicon spacer 670, a CTE of the laser PIC die 606, and a CTE of the transceiver PIC die 608 may be similar. In embodiments, this may be used instead of a optical bench such as optical bench 104 of
Note that similar to package 100C of
In embodiments, a cold plate 890 may be thermally coupled with the optical bench 804, and may be coupled with the substrate 802. A main TEC 892 may be thermally coupled with the cold plate 890 by TIM layer 896.
Instead of a cold plate 890 of
In this embodiment, another TEC 1094 is thermally coupled with the second optical bench area 1004b, and thermally coupled with TEC 1092 using a TIM 1096, which may be similar to TEC 992 and TIM 996 of
At block 1202, the process may include providing an optical bench. In embodiments, the optical bench may be similar to at least optical bench 104 of
At block 1204, the process may further include coupling a first PIC with a side of the optical bench. In embodiments, the first PIC may be similar to at least laser PIC die 106 or transceiver PIC die 108 of
At block 1206, the process may further include coupling a second PIC with the side of the optical bench. In embodiments, the second PIC may be similar to at least laser PIC die 106 or transceiver PIC die 108 of
At block 1208, the process may further include aligning the first PIC and the second PIC for optical coupling. In embodiments, aligning may include positioning the first PIC or the second PIC on the optical bench. In other embodiments, aligning may also include inserting optical coupling components, such as optical coupling components 124 of
At block 1210, the process may further include enclosing the first PIC, the second PIC, and at least a portion of the optical bench within a housing. In embodiments, the housing may be similar to cover 126 of
In an embodiment, the electronic system 1300 is a computer system that includes a system bus 1320 to electrically couple the various components of the electronic system 1300. The system bus 1320 is a single bus or any combination of busses according to various embodiments. The electronic system 1300 includes a voltage source 1330 that provides power to the integrated circuit 1310. In some embodiments, the voltage source 1330 supplies current to the integrated circuit 1310 through the system bus 1320.
The integrated circuit 1310 is electrically coupled to the system bus 1320 and includes any circuit, or combination of circuits according to an embodiment. In an embodiment, the integrated circuit 1310 includes a processor 1312 that can be of any type. As used herein, the processor 1312 may mean any type of circuit such as, but not limited to, a microprocessor, a microcontroller, a graphics processor, a digital signal processor, or another processor. In an embodiment, the processor 1312 includes, or is coupled with, a package with multiple PIC optically coupled with each other, as disclosed herein. In an embodiment, SRAM embodiments are found in memory caches of the processor. Other types of circuits that can be included in the integrated circuit 1310 are a custom circuit or an application-specific integrated circuit (ASIC), such as a communications circuit 1314 for use in wireless devices such as cellular telephones, smart phones, pagers, portable computers, two-way radios, and similar electronic systems, or a communications circuit for servers. In an embodiment, the integrated circuit 1310 includes on-die memory 1316 such as static random-access memory (SRAM). In an embodiment, the integrated circuit 1310 includes embedded on-die memory 1316 such as embedded dynamic random-access memory (eDRAM).
In an embodiment, the integrated circuit 1310 is complemented with a subsequent integrated circuit 1311. Useful embodiments include a dual processor 1313 and a dual communications circuit 1315 and dual on-die memory 1317 such as SRAM. In an embodiment, the dual integrated circuit 1310 includes embedded on-die memory 1317 such as eDRAM.
In an embodiment, the electronic system 1300 also includes an external memory 1340 that in turn may include one or more memory elements suitable to the particular application, such as a main memory 1342 in the form of RAM, one or more hard drives 1344, and/or one or more drives that handle removable media 1346, such as diskettes, compact disks (CDs), digital variable disks (DVDs), flash memory drives, and other removable media known in the art. The external memory 1340 may also be embedded memory 1348 such as the first die in a die stack, according to an embodiment.
In an embodiment, the electronic system 1300 also includes a display device 1350, an audio output 1360. In an embodiment, the electronic system 1300 includes an input device such as a controller 1370 that may be a keyboard, mouse, trackball, game controller, microphone, voice-recognition device, or any other input device that inputs information into the electronic system 1300. In an embodiment, an input device 1370 is a camera. In an embodiment, an input device 1370 is a digital sound recorder. In an embodiment, an input device 1370 is a camera and a digital sound recorder.
As shown herein, the integrated circuit 1310 can be implemented in a number of different embodiments, including a package substrate having a package with multiple PIC optically coupled with each other, according to any of the several disclosed embodiments and their equivalents, an electronic system, a computer system, one or more methods of fabricating an integrated circuit, and one or more methods of fabricating an electronic assembly that includes a package substrate having a package with multiple PIC optically coupled with each other, according to any of the several disclosed embodiments as set forth herein in the various embodiments and their art-recognized equivalents. The elements, materials, geometries, dimensions, and sequence of operations can all be varied to suit particular I/O coupling requirements including array contact count, array contact configuration for a microelectronic die embedded in a processor mounting substrate according to any of the several disclosed package substrates having a package with multiple PIC optically coupled with each other embodiments and their equivalents. A foundation substrate may be included, as represented by the dashed line of
The following paragraphs describe examples of various embodiments.
Example 1 includes a package comprising: a substrate; a first photonics integrated circuit (PIC) coupled with a side of the substrate; a second PIC coupled with the side of the substrate; and wherein the first PIC and the second PIC are optically coupled with each other.
Example 2 includes the package of example 1, or of any other example or embodiment described herein, wherein at least a portion of the substrate is an optical bench, wherein the first PIC and the second PIC are coupled with a side of the optical bench.
Example 3 includes the package of example 2, or of any other example or embodiment described herein, wherein the optical bench includes a selected one or more of: iron, nickel, or Invar.
Example 4 includes the package of example 2, or of any other example or embodiment described herein, wherein the side of the optical bench is a first side; and further comprising: a trench extending across the first side of the optical bench, a bottom of the trench proximate to the second side of the optical bench opposite the first side; and wherein the trench is between the first PIC and the second PIC, and wherein the trench reduces thermal conductivity between the first PIC and the second PIC.
Example 5 includes the package of example 4, or of any other example or embodiment described herein, wherein the trench is filled with air.
Example 6 includes a package of example 1, or of any other example or embodiment described herein, further comprising an interposer between a side of the first PIC and a side of the substrate, wherein the interposer is electrically coupled with the PIC.
Example 7 includes a package of example 6, or of any other example or embodiment described herein, further comprising an electrical coupling between the interposer and a printed circuit board (PCB) that electrically couples the first PIC and the PCB.
Example 8 includes package of example 6, or of any other example or embodiment described herein, further comprising a TIM between a surface of the interposer and a surface of the substrate.
Example 9 includes the package of example 6, or of any other example or embodiment described herein, wherein the side of the first PIC is a first side; and further comprising: a second side of the first PIC opposite the first side; and a heat spreader thermally coupled with the second side of the first PIC.
Example 10 includes a package of example 1, or of any other example or embodiment described herein, further comprising a TEC that is thermally coupled with a side of the second PIC.
Example 11 includes the package of example 10, or of any other example or embodiment described herein, wherein the TEC has a cold side and a hot side opposite the cold side, wherein the cold side is thermally coupled with the side of the second PIC, and wherein the hot side is thermally coupled with a heat spreader.
Example 12 includes the package of example 11, or of any other example or embodiment described herein, wherein the TEC is electrically coupled with a PCB.
Example 13 includes a package of example 1, or of any other example or embodiment described herein, further comprising: a silicon spacer having a first side and a second side opposite the first side, the first side of the silicon spacer coupled with a side of the first PIC and with a side of the second PIC that is opposite the substrate; a first TIM between the side of the first PIC and the silicon spacer; a second TIM between the side of the second PIC and the silicon spacer; and one or more TEC thermally coupled with the second side of the silicon spacer.
Example 14 includes the package of example 13, or of any other example or embodiment described herein, further comprising a backing plate surrounding the one or more TEC, the backing plate thermally coupled with the second side of the silicon spacer.
Example 15 includes the package of example 13, or of any other example or embodiment described herein, further comprising an opening within the substrate proximate to an area between the first PIC and the second PIC that provides access to optical components optically coupling the first PIC and the second PIC.
Example 16 includes a package of example 1, or of any other example or embodiment described herein, wherein the first PIC or the second PIC include a selected one of: a LiDAR transceiver, a laser, a tunable external feedback laser (TEFL), or a wavelength switchable laser array (WSLA).
Example 17 is a package comprising: a substrate; a first photonics integrated circuit (PIC) coupled with a side of the substrate; a second PIC coupled with the side of the substrate, wherein the first PIC and the second PIC are optically coupled with each other; and a housing coupled with the substrate, the housing surrounds the first PIC and the second PIC.
Example 18 includes the package of example 17, or of any other example or embodiment described herein, wherein the first PIC is a plurality of first PICs, and wherein the second PIC is a plurality of second PICs.
Example 19 includes the package of example 17, or of any other example or embodiment described herein, wherein the substrate includes an Invar metal, and wherein the first PIC and the second PIC are coupled with the Invar metal.
Example 20 includes the package of example 19, or of any other example or embodiment described herein, further comprising a cold plate on a side of the Invar metal opposite the first PIC and the second PIC.
Example 21 includes the package of example 20, or of any other example or embodiment described herein, further comprising a thermoelectric cooler (TEC) thermally coupled with the cold plate.
Example 22 is a method comprising: providing an optical bench; coupling a first photonics integrated circuit (PIC) with a side of the optical bench; coupling a second PIC with the side of the optical bench; aligning the first PIC and the second PIC for optical coupling; and enclosing the first PIC, the second PIC, and at least a portion of the optical bench within a housing.
Example 23 includes the method of example 22, or of any other example or embodiment described herein, wherein coupling the second PIC with the side of the optical bench further includes: coupling the second PIC with a first side of an interposer that has the first side and a second side opposite the first side; and coupling the second side of the interposer with the side of the optical bench.
Example 24 includes the method of example 22, or of any other example or embodiment described herein, wherein enclosing within a housing further includes: thermally coupling a heat spreader to the first PIC and/or to the second PIC; and thermally coupling the heat spreader with the housing.
Example 25 includes the method of example 22, or of any other example or embodiment described herein, wherein aligning the first PIC of the second PIC for optical coupling further includes inserting optical components between the first PIC and the second PIC through an opening in the housing.
Various embodiments may include any suitable combination of the above-described embodiments including alternative (or) embodiments of embodiments that are described in conjunctive form (and) above (e.g., the “and” may be “and/or”). Furthermore, some embodiments may include one or more articles of manufacture (e.g., non-transitory computer-readable media) having instructions, stored thereon, that when executed result in actions of any of the above-described embodiments. Moreover, some embodiments may include apparatuses or systems having any suitable means for carrying out the various operations of the above-described embodiments.
The above description of illustrated embodiments, including what is described in the Abstract, is not intended to be exhaustive or to limit embodiments to the precise forms disclosed. While specific embodiments are described herein for illustrative purposes, various equivalent modifications are possible within the scope of the embodiments, as those skilled in the relevant art will recognize.
These modifications may be made to the embodiments in light of the above detailed description. The terms used in the following claims should not be construed to limit the embodiments to the specific implementations disclosed in the specification and the claims. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.