Patent Application
20060080461
The field of invention relates generally to computing systems; and, more specifically, to packet exchanges for controlling computer system power modes.
Computing system comprise multiple components that may share a certain resource within the computing system. For example, referring to
Power management has become an increasingly important computing system feature. Power management is the functional aspect of a computing system that is devoted to modulating the computing system's power consumption in light of its usage. For example, because the traditional technology that has been used to implement large scale integration semiconductor chips (a technology known as Complementary MOSFET or “CMOS”) increases its power consumption with clock speed, prior art processors have been heretofore designed to modulate the speed of their clock in light of processing demand. That is, when the processing demand placed on the processor drops, the processor causes its clock to reduce its frequency; and, when the processing demand placed on the processor increases, the processor causes its clock to increase its frequency.
When a resource such as a clock source 102 is shared, changing an operational state of the shared resource to control power consumption becomes complicated because of the dependencies that exist. That is, using the circuitry of
Moreover, power control features have been relatively isolated functions so as to involve only a few components (e.g., a single processor, a chipset, etc.) that are integrated onto the same physical platform (e.g., the same PC board and/or chassis). Therefore, power control features have traditionally been a “low-level” function implemented with only simplistic circuitry (e.g., electrically conductive signal lines designed into the physical platform whose sole purpose is to transport power control related information).
The emergence of distributed and/or scalable computing systems challenges these traditions. Specifically, distributed computing (which is the implementation of a computing system having multiple components distributed across different physical platforms that are interconnected by a network and/or having multiple components distributed across different clock domains) raises the possibility that the components that share a resource whose operational state is to be modulated in response to the computing system's usage may reside on different physical platforms. Moreover, with respect to the communication exchanges amongst components discussed above to implement an operational state change to a shared resource, the notion of scalability raises the notion that these exchanges may not be practicable if the number of components exceeds beyond some maximum threshold.
The present invention is illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements and in which:
a and 3b show different packet based network topologies for communicating control information for modulating the power consumption of a computing system;
Here, as described in more detail further below, a packet based network 203 is understood to include multiple nodes; such that, at least for some packets sent into the network at any of a number of ingress points, traversing the network to an appropriate network egress point entails one or more “nodal hops” within the network between the ingress point and the egress point. Such a packet based network 203 is significant in a number of respects concerning both common physical platform implementations and non common physical platform implementations. For simplicity, the present application will refer to a packet based network as described above simply as “a network”.
Common physical platform implementations are those implementations where the network 203 resides on the same PC board or in a single chassis. Non common physical platform implementations are those implementations where the network 203 couples components from different physical platforms (i.e., across different chasses). That is, for example, each of components 2011 through 2014 would be part of a different physical platform. A chassis is a complete “box” that surrounds one or more PC boards and has its own power supply. Other characteristics of a chassis include the circuitry that is housed by the chassis having its own crystal oscillator(s) for generating clock signals (except for those circuits designed to run on a clock provided from outside the chassis (such as a chassis for a time division multiplexed (TDM) networking box designed to run on a “network clock”)).
With respect to implementations where the network 203 resides on/in a common physical platform, the number of components that can be designed to share a common resource 202 can scale upward with little if any real practical concern of reaching some maximum limit for the power management function. With respect to implementations where the network 203 couples differing physical platforms, the number of components that can be designed to share a common resource 202 can also scale because the network 203 is apt to be designed to have the bandwidth to support fundamentally critical operations such as passing instructions and/or data between computing system components.
Before discussing some possible network topologies in
A resource is any functional part of a computing system such as a component or some other functional part (e.g., a clock source, a power supply, etc.). A shared resource is a resource used by more than one component. Note that
A packet based network 203, as described above, is a network designed to transport packets and having multiple nodes; where, at least for some packets sent into the network at any of a number of ingress points, traversing the network to an appropriate network egress point entails one or more “nodal hops” within the network between the ingress point and the egress point. Packets are data structures having a header and payload; where, the header includes “routing information” such as the source address and/or destination address of the packet; and/or, a connection identifier that identifies a connection that effectively exists in the network to transport the packet. Note that although packets are often viewed as a “physically connected” data structure that flows “as a single unit” along a single link, it is possible that the components of a packet data structure could be physically separated over its travels into, within and/or from the network (e.g., with a first link that carries header information and a second link that carries payload information).
A discussion of possible exchanges of power management packets between computing system components is provided in more detail with respect to
a and 3b show various network topologies that packet network 203 may be comprised of.
a shows a standard packet based network 3031. A standard packet based network can often be viewed as an ad hoc collection of nodes 3101-3105 at least some of which are indirectly connected to one another through another node. The nodal hop(s) are an artifact of the indirect connection(s). For example, a packet launched into the network by component 301A that is to be received by component 301B will have a “shortest path” that involves three nodal hops across nodes 3102, 3103 and 3105 (because nodes 3102 and 3105 are indirectly connected through node 3103). Importantly, the network nodes 310 themselves may also be components of the computing system (i.e., besides performing computing system component duties they also perform routing/switching duties).
In operation, a packet can traverse through the network (from a network ingress/source point to a network egress/destination point) by “hopping” from node to node along a path that eventually leads to the destination/egress point. Upon being received at a node, the packet's header is typically analyzed and its payload is forwarded with updated (or in some cases unchanged) header information to the next node along the path.
In a typical implementation, the nodes themselves are embedded with a “routing protocol” that enables the nodes to determine amongst themselves the appropriate node-to-node path through the network for any source/destination combination. Routing protocols are well known in the art and are typically implemented with software that runs on a processor. It is possible however that the functionality needed to execute a routing protocol could be implemented with dedicated logic circuitry in whole or in part.
b shows a ring topology network 3032. An appropriately sized ring (three nodes or more with a unidirectional ring; or, four nodes or more with a bi-directional ring) can also have one or more nodal hops within the ring network. For example, a packet sent from node 301C to node 301E will experience a nodal hop at either node 301D or 301F depending on which direction the packet is sent. As the network expands in size a ring topology network (as well as a standard packet based network) can entertain at least one path having at least one nodal hop between the nodes that act as the path's ingress point into the network and the path's egress point from said network
A ring topology network often times uses a “token scheme” to control the use of the network. That is, a token is passed around the ring. A component seizes the token if it wishes to send a packet to another component. Here, the packet is released onto the ring by the sending component. The packet travels around the ring. When the packet arrives at the destination component, the destination component recognizes its address as the destination from the packet header and formally accepts the packet in response. The sending component releases the token back onto the ring when it can no longer use the ring. Rings may be unidirectional or bi-directional.
The ring topology network can be used for same physical platform implementations because it is easily scalable into any number of components and shared resources. That is, for example, a first computing system may be designed having a ring with only two components that share a certain resource, a second computing system may be designed having a ring with five components, a third computing system may be designed having a ring with ten components, etc.; where, the same software/circuitry is used in each component across all three computing systems. Moreover, a single ring can support multiple communities of components that share different resources. That is, a first set of components that share a first resource and a second set of components that share a second resource may all be coupled to the same ring within the same computing system.
A multi-physical platform, distributed computing system may be designed to use the network that transports the instructions, data and other transactions within the distributed computing system. That is, the packets that are sent as part of the power management control of the computing system uses the same network that the distributed computing system uses to transfer instructions, transfer data, request specific transactions (e.g., read, write, etc.), confirm that specific transactions have been performed, etc. . . .
In a further embodiment, the distributed computing system's underlying network includes at least one virtual network that is organized into a plurality of different channels; where, each channel type is supposed to only transport packets having a classification that corresponds to the channel type. That is, packets are classified based upon the type of content they contain; and, a unique channel is effectively designed into the network for each of the packet classes that exist (i.e., a first channel is used to transport packets of a first classification, a second channel is used to transport packets of a second classification, etc.). Here, power management packets could be assigned to one of the classes and therefore be transported along the channel allocated for the particular class.
Referring back to
An example of the former (control point at component 2014) would be if the shared resource 202 is a cache and the computing system components 201, through 2014 are each processors that read/write cache lines worth of data from/to the cache 202; where, the cache 202 is local to processor 2014. Here, processor 2014 could be the control point having the circuitry and/or software for deciding what operational state cache 202 should be within in light of the usage of the computing system. An example of the later would be if the cache 202 itself ha the circuitry and/or software to make such decisions.
According to
Regardless as to the precise nature of the packet exchange, the control point component 4014 accumulates the responses and determines whether the operational state is acceptable or not. (e.g., if all components indicate it is “OK” to change the state; then, the change is deemed acceptable—otherwise it is not deemed acceptable). The change is made through control line 404.
The architecture of
Each of the packet exchange examples discussed above indicated that a particular component that used the shared resource affirmatively requested the state change. In an alternative approach, the usage of the shared resource itself might trigger a request packet being sent from the control point for the shared resource. For example, if the shared resource 402, 502 of
Each of the packet exchange examples discussed above discuss a centralized point of control for a shared resource. Conceivably the control could be distributed amongst the components themselves. For example, the components could broadcast to each other their usage of the shared resource and, by executing an identical algorithm at each component, each component could reach the same conclusion for a given set of circumstances regarding the operational state of the shared resource.
With respect to ring topologies, recalling that more than one community of resource sharing components could be connected to the same ring. That is, for example, a first set of components that share a first resource and a second set of components that share a second resource could all be coupled to the same ring. Here, components of a same set should know the identities or addresses of other components they share resources with so that destination and source addresses can be properly recognized (e.g., so that a component from the first set knows to ignore a packet sent from a component that belongs to the second set).
Note that
Recall from the discussion of
Note that if component 8014 is the control point for the shared resource 802, clock domain 8034 will include region 808. Control line 805 can be used to control the operational state of the shared resource 802 in this case. If the control point for the shared resource 802 is the shared resource 802 itself, it is apt to be within its own clocking domain 806.
The circuitry that actually implements the power management function may be any circuitry capable of performing the method taught herein. Examples include a state machine or embedded controller/processor that executes software instructions consistent with the methodologies taught herein—or some combination thereof. In order to launch packets onto the network and receive packets from the network the circuitry should be coupled to a media access layer (MAC) circuit. The MAC circuit includes or has an interface to coupled to the physical later circuitry that drives/receives signals on/from the physical lines of the network. The network lines can be copper or fiber optic cables that are connected to a PC board with a connector.
The software may be implemented with program code such as machine-executable instructions which cause a machine (such as a “virtual machine”, general-purpose processor or special-purpose processor) to perform certain functions. Alternatively, these functions may be performed by specific hardware components that contain hardwired logic for performing the functions, or by any combination of programmed computer components and custom hardware components.
An article of manufacture may be used to store program code. An article of manufacture that stores program code may be embodied as, but is not limited to, one or more memories (e.g., one or more flash memories, random access memories (static, dynamic or other)), optical disks, CD-ROMs, DVD ROMs, EPROMs, EEPROMs, magnetic or optical cards or other type of machine-readable media suitable for storing electronic instructions. Program code may also be downloaded from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals embodied in a propagation medium (e.g., via a communication link (e.g., a network connection)).
In the foregoing specification, the invention has been described with reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
