Claims
- 1. A packet switch, comprising:
a plurality of input port interfaces; a plurality of output port interfaces, and a packet relaying unit for switching variable length packets received from said input port interfaces to one of said output port interfaces corresponding to the destination address of each of said packets, wherein each of said output port interfaces comprises:
a buffer memory for storing transmission packets, a transmission priority controller for classifying transmission packets passed from said packet relaying unit into a plurality of queue groups to which a specific bandwidth is assigned respectively, according to the header information of each of said transmission packets and for queuing said transmission packets in said buffer memory so as to form a plurality of queues according to transmission priority in each queue group, a packet read-out controller for reading out transmission packets according to the transmission priority while guaranteeing the bandwidth assigned to said queue group, and a packet transmission circuit for transmitting said transmission packets read out by said packet read-out controller to an output port associated with the output port interface.
- 2. A packet switch according to claim 1, wherein said transmission priority controller includes means for specifying, according to the header information of said transmission packet passed from said packet relaying unit, communication service contract and transmission priority related to the transmission packet, whereby said transmission.
- 3. A packet switch comprising a plurality of control boards, each of which includes at least a pair of input interface and an output interface, and a packet switching unit for switching variable length packets among said control boards,
wherein each of said input port interfaces includes:
a receiving buffer memory for storing received packets temporarily; a relaying priority controller configured so as to filter packets received from an input port based on a destination address thereof and queue received packets to be transferred to one of the other control boards into said receiving buffer memory according to their priority based on the header information of the packet; and a received packet read-out circuit for reading out the received packets stored in said receiving buffer memory based on the priority and supplying said received packets to said packet switching unit, and wherein each of said output interfaces includes:
a transmission buffer memory for storing transmission packets; a transmission priority controller configured so as to classify transmission packets passed from said packet switching unit into a plurality of queue groups, to which an individual bandwidth is assigned respectively, according to the header information of the respective transmission packets, and queue the transmission packets in said transmission buffer memory so as to form a plurality of queues according to the transmission priority thereof in each of said queue groups; a transmission packet read-out controller configured so as to read out transmission packets from each of said queue groups in said transmission buffer memory according to the transmission priority while guaranteeing a bandwidth assigned to each of said queue groups; and a packet transmission circuit for transmitting the transmission packets read out by said packet read-out controller to an output port associated with the output port interface.
- 4. A packet switch according to claim 3, wherein said transmission priority controller includes means for specifying, according to the header information of each of said transmission packets passed from said packet switching unit, a communication service contract and a transmission priority related to the transmission packet, whereby the transmission packet is queued into a queue corresponding to said specified transmission priority within a queue group corresponding to said specified communication service contract.
- 5. A packet switch according to claim 3, wherein said transmission priority controller includes means for specifying, according to protocol information included in the header of each of said transmission packets passed from said packet switching unit, a queue group corresponding to the transmission packet, whereby said transmission packet is queued into said specified queue group according to the order of said transmission priority.
- 6. A packet switch according to claim 3, wherein said transmission priority controller comprises:
a first table for defining a group identifier corresponding to first and second control information included in the header of each of transmission packets passed from said packet switching unit; a second table for defining a queue identifier corresponding to third and fourth control information included in the header of each of said transmission packets; and means for retrieving a group identifier and a queue identifier from said first and second tables, respectively, according to the header information of each of said transmission packets, and for queuing each of said transmission packets into a queue specified with said queue identifier within a queue group specified with said group identifier.
- 7. A packet switch according to claim 3, wherein said transmission packet read-out controller comprises:
a bandwidth control circuit for cyclically designating a queue group to read out packets therefrom among a plurality of queue groups and for assigning a packet read-out time to said designated queue group according to the bandwidth thereof; and a transmission packet read-out circuit for reading out transmission packets according to the transmission priority from said queue group designated by said bandwidth control circuit.
- 8. A packet switch comprising a plurality of input port interfaces, a plurality of output port interfaces, a packet switching unit for switching variable length packets received from said input port interfaces to one of said output port interfaces, corresponding to the destination address of each of said packets,
wherein each of said output port interfaces comprises:
a buffer memory for storing transmission packets; a transmission priority controller configured so as to classify transmission packets passed from said packet switching unit based on a predetermined algorithm and queuing said transmission packets according to a transmission priority thereof in one of queue groups to which an individual bandwidth is assigned respectively; a packet read-out controller for cyclically accessing said queue groups of said buffer memory to read out transmission packets according to the transmission priority from each of said queue groups while guaranteeing the bandwidth assigned to each of said queue groups; and a packet transmission circuit for sending out transmission packets read out by said packet read-out controller to an output port associated with the output port interface.
- 9. A packet switch according to claim 8, further comprising:
means for changing said algorithm, which is provided in said transmission controller for classifying transmission packets, according to control information supplied from external.
- 10. A packet switch according to claim 8, wherein each of said input port interfaces comprises:
a receiving buffer memory for storing received packets temporarily; a relaying priority controller configured so as to filter packets received from an input port according to the destination address of each of said received packets, classify said filtered received packets based on a predetermined algorithm, and queue said classified received packets in said buffer memory according to the priority thereof; and a received packet read-out circuit for reading out said received packets stored in said receiving buffer memory according to the priority to supply the packets to said packet switching unit.
- 11. A switching method for switching variable length packets, comprising the steps of:
filtering received packets supplied from an input port according to the destination address of each of said received packets; transferring said filtered received packets to one of a plurality of output port interfaces as transmission packets, said output port interfaces being determined according to the destination address included in the header of each of said packets; classifying said transmission packets based on a predetermined algorithm to queue said classified transmission packets in one of a plurality of queue groups to which a specific bandwidth is assigned respectively, according to a transmission priority of the transmission packets; accessing said plurality of queue groups cyclically to read out said transmission packets from each of said queue groups according to the transmission priority while guaranteeing the bandwidth assigned to each of said queue groups; and transmitting said read-out transmission packets to an output port.
- 12. A packet switching method for switching variable length packets according to claim 11, wherein said step of transferring said filtered received packets includes the steps of:
queuing said filtered received packets according to the priority thereof in said receiving buffer memory and reading out said received packets stored in said receiving buffer memory, according to the priority to transfer each of the packets to one of said plurality of output port interfaces as said transmission packets.
- 13. A packet switching method for switching variable length packets according to claim 11, wherein transmission packets are classified by communication service contract related to each of said transmission packets and queued according to transmission priority in a queue group corresponding to said contract in said step for queuing said transmission packets.
- 14. A packet switching method for switching variable length packets according to claim 11, wherein said transmission packets are classified by communication protocol related to each of said transmission packets and queued according to transmission priority in a queue group corresponding to said protocol in said step for queuing said transmission packets.
Priority Claims (1)
Number |
Date |
Country |
Kind |
10-088330 |
Apr 1998 |
JP |
|
Parent Case Info
[0001] The present application is a divisional application of application Ser. No. 09/280,980, filed Mar. 30, 1999, the contents of which are incorporated herein by reference.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09280980 |
Mar 1999 |
US |
Child |
10197464 |
Jul 2002 |
US |