Claims
- 1. A method of parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
receiving the concurrently-transmitted data in the plurality of multiple-bit groups; and after receiving the concurrently-transmitted data, realigning skew-caused misalignments between the groups.
- 2. The method of claim 1, wherein realigning skew-caused misalignments between the groups occurs after validating the received data and before further interpretation of the received data.
- 3. The method of claim 1, further including controlling the skewing of the data in each group.
- 4. The method of claim 3, wherein controlling the skewing of the data in each group occurs independent of each other group.
- 5. The method of claim 1, further including transmitting, for each group, a clock signal used to synchronize the concurrently-transmitted data within each group.
- 6. The method of claim 1, further including transmitting a data-valid indicator and using the data-valid indicator to control the reception of the data in each group.
- 7. The method of claim 6, wherein transmitting the data-valid indicator is performed for each group of transmitted data.
- 8. The method of claim 7, further including coding the data into coded-data values before the data is concurrently transmitted in the plurality of multiple-bit groups and wherein the data-valid indicator is a unique coded-data value.
- 9. The method of claim 7, further including transmitting at least one special bit for each group, and wherein the data-valid indicator is transmitted using the at least one special bit.
- 10. The method of claim 1, for each group further including: transmitting a synchronization clock signal and a data-valid indicator, receiving the transmitted data by sampling the data at the synchronization clock signal, and using the data-valid indicator to control the reception of the data in the group.
- 11. The method of claim 10, for each group further including: determining that the data-valid indicator indicates that valid data has been received and, in response, storing the received data before realigning skew-caused misalignments between the groups.
- 12. The method of claim 10, wherein storing the received data for each group includes storing the received data in a single-group FIFO buffer dedicated to the group, and wherein realigning skew-caused misalignments between the groups includes providing a group-global FIFO for storing data output from the respective single-group FIFOs.
- 13. The method of claim 1, wherein for each group, data is carried by a plurality of data-carrying lines that are synchronized by a differential clock signal to tolerate any skew-caused misalignments between data concurrently transferred in the group, the skew-caused misalignments not exceeding one half clock period.
- 14. The method of claim 1, further including coding the data from an 8-bit value to a 6-bit coded-data value for each group before the data is concurrently transmitted.
- 15. A parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
means for receiving the concurrently-transmitted data in the plurality of multiple-bit groups; and means for realigning skew-caused misalignments between the groups after receiving the concurrently-transmitted data.
- 16. A parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
a receive circuit configured and arranged to receive the concurrently transmitted data in the plurality of multiple-bit groups; and a realignment circuit configured and arranged to realign skew-caused misalignments between the groups after receiving the concurrently-transmitted data.
- 17. The parallel data communication arrangement of claim 16, further including a sending module configured and arranged to concurrently transmit the data in the plurality of multiple-bit groups.
- 18. The parallel data communication arrangement of claim 17, wherein realigning skew-caused misalignments between the groups occurs after validating the received data and before further interpretation of the received data.
- 19. The parallel data communication arrangement of claim 17, further including controlling the skewing of the data in each group.
- 20. The parallel data communication arrangement of claim 19, wherein controlling the skewing of the data in each group occurs independent of each other group.
- 21. The parallel data communication arrangement of claim 17, further including transmitting, for each group, a clock signal used to synchronize the concurrently-transmitted data within each group.
- 22. The parallel data communication arrangement of claim 17, further including transmitting a data-valid indicator and using the data-valid indicator to control the reception of the data in each group.
- 23. The parallel data communication arrangement of claim 22, wherein transmitting the data-valid indicator is performed for each group of transmitted data.
- 24. The parallel data communication arrangement of claim 23, further including coding the data into coded-data values before the data is concurrently transmitted in the plurality of multiple-bit groups and wherein the data-valid indicator is a unique coded-data value.
- 25. The parallel data communication arrangement of claim 23, further including transmitting at least one special bit for each group, and wherein the data-valid indicator is transmitted using the at least one special bit.
- 26. The parallel data communication arrangement of claim 17, for each group further including: transmitting a synchronization clock signal and a data-valid indicator, receiving the transmitted data by sampling the data at the synchronization clock signal, and using the data-valid indicator to control the reception of the data in the group.
- 27. The parallel data communication arrangement of claim 26, for each group further including: determining that the data-valid indicator indicates that valid data has been received and, in response, storing the received data before realigning skew-caused misalignments between the groups.
- 28. The parallel data communication arrangement of claim 26, wherein storing the received data for each group includes storing the received data in a single-group FIFO buffer dedicated to the group, and wherein realigning skew-caused misalignments between the groups includes providing a group-global FIFO for storing data output from the respective single-group FIFOs.
- 29. The parallel data communication arrangement of claim 17, wherein for each group, data is carried by a plurality of data-carrying lines that are synchronized by a differential clock signal to tolerate any skew-caused misalignments between data concurrently transferred in the group, the skew-caused misalignments not exceeding one half clock period.
- 30. The parallel data communication arrangement of claim 17, further including coding the data from an 8-bit value to a 6-bit coded-data value for each group before the data is concurrently transmitted.
- 31. A method of parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
in each of the plurality of multiple-bit groups, concurrently transmitting the data along with a synchronization clock signal and a data-valid indicator; receiving the concurrently-transmitted data by sampling the data at the synchronization clock signal; using the data-valid indicator to control the reception of the data in the group; and after using the data-valid indicator to control the reception of the data in the group, realigning skew-caused misalignments between the groups.
- 32. A parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
means for each of the plurality of multiple-bit groups, for concurrently transmitting the data along with a synchronization clock signal and a data-valid indicator; means for receiving the concurrently-transmitted data by sampling the data at the synchronization clock signal; means for using the data-valid indicator to control the reception of the data in the group; and after using the data-valid indicator to control the reception of the data in the group, means for realigning skew-caused misalignments between the groups means.
- 33. A parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
a first module having a transmission circuit for each of the plurality of multiple-bit groups, each transmission circuit for concurrently transmitting the data along with a synchronization clock signal and a data-valid indicator; a second module for, each group, receiving the concurrently-transmitted data by sampling the data at the synchronization clock signal, for using the data-valid indicator to control the reception of the data in the group, and after using the data-valid indicator to control the reception of the data in the group, for realigning skew-caused misalignments between the groups.
- 34. A method of parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
in each of the plurality of multiple-bit groups, concurrently transmitting the data along with a synchronization clock signal and a data-valid indicator; in each of the plurality of multiple-bit groups, receiving the concurrently-transmitted data by sampling the data at the synchronization clock signal,
using the data-valid indicator to control the reception of the data in the group, and after using the data-valid indicator to control the reception of the data in the group, storing the received data in a single-group FIFO buffer; and realigning skew-caused misalignments between the groups including using a group-global FIFO buffer for storing data output from the respective single-group buffers and then interpreting the data in the group-global FIFO buffer.
- 35. A parallel data communication arrangement that is susceptible to skewing data which is concurrently transmitted in a plurality of multiple-bit groups, comprising:
means, in each of the plurality of multiple-bit groups, for concurrently transmitting the data along with a synchronization clock signal and a data-valid indicator; means, in each of the plurality of multiple-bit groups, for
receiving the concurrently-transmitted data by sampling the data at the synchronization clock signal, using the data-valid indicator to control the reception of the data in the group, and after using the data-valid indicator to control the reception of the data in the group, storing the received data in a single-group FIFO buffer; and means for realigning skew-caused misalignments between the groups including using a group-global FIFO buffer for storing data output from the respective single-group buffers and then interpreting the data in the group-global FIFO buffer.
RELATED PATENT DOCUMENTS
[0001] The present invention is related to and fully incorporates the subject matter disclosed in U.S. patent applications, Ser. No. 09/871,197, entitled “Parallel Communication Based On Balanced Data-Bit Encoding” (VLSI.295PA); Ser. No. 09/871,160 entitled “Parallel Data Communication Consuming Low Power” (VLSI.299PA); Ser. No. 09/871,159, entitled “Parallel Data Communication Having Skew Intolerant Data Groups” (VLSI.300PA); and Ser. No. 009/871,117, entitled “Parallel Data Communication Having Multiple Sync Codes” (VLSI.312PA).