PARALLEL INTERFACE BUS TO COMMUNICATE VIDEO DATA ENCODED FOR SERIAL DATA LINKS

Abstract

In some embodiments, a device includes a bus, a parallel source, and a parallel sink. The parallel source is to provide parallel groups of signals including video signals to the bus, wherein the bus has a number of lanes that is fewer than a number of signals used to represent a pixel such that pixels are represented in more than one of the parallel groups. The parallel sink is to receive the parallel groups of signals from the bus, wherein the parallel sink includes a signal extractor to separate at least a portion of the groups of signals into multiple channels, and encoder and serializer circuits to encode and serialize the separated signals. Other embodiments are described and claimed.

Description

BRIEF DESCRIPTION OF THE FIGURES

Embodiments of the invention is more fully appreciated in connection with the following detailed description taken in conjunction with the accompanying drawings.

FIG. 1 is a functional block diagram representation of communication of data representing uncompressed, digitized video and digitized audio via a parallel communications link according to some embodiments of the invention.

FIG. 2 is a block diagram representation of a multimedia source that includes a parallel digital video interface source, a parallel bus, and a parallel digital video interface sink according to some embodiments of the invention.

FIG. 3 is a block diagram representation illustrating a parallel HDMI bus transmitter that is suitable to implement the bus transmitter of FIG. 2 according to some embodiments of the invention.

FIG. 4 illustrates a timing diagram depicting the timing of transporting subsets of parallel HDMI data signals and parallel HDMI control signals over a parallel HDMI bus in accordance with some embodiments of the invention.

FIG. 5 is a block diagram illustrating a parallel HDMI bus receiver and transmitter in accordance with some embodiments of the invention.

FIG. 6 is a block diagram illustrating another parallel HDMI bus transmitter in accordance with some embodiments of the invention.

FIG. 7 is a block diagram illustrating a TMDS-based repeater configured to regenerate TMDS-based signals on one or more serial data links, according to some embodiments of the invention.

FIG. 8 is a block diagram illustrating a system according to some embodiments of the invention.

Claims

1. A device comprising: a bus;a parallel source to provide parallel groups of signals including video signals to the bus, wherein the bus has a number of lanes that is fewer than a number of signals used to represent a pixel such that pixels are represented in more than one of the parallel groups; anda parallel sink to receive the parallel groups of signals from the bus, wherein the parallel sink includes a signal extractor to separate at least a portion of the groups of signals into multiple channels, and encoder and serializer circuits to encode and serialize the separated signals.

2. The device of claim 1, wherein the parallel source is a parallel transition minimized differential signaling (TMDS)-based source and the parallel groups of signals are TMDS signals.

3. The device of claim 1, wherein the bus has twelve lanes and twenty-four signals are used to represent a pixel.

4. The device of claim 1, wherein the signal extractor is to separate the at least a portion of the groups of signals into three color groups: red, green, and blue.

5. The device of claim 1, wherein the parallel source is in a first chip and the parallel sink is in a second chip.

6. The device of claim 5, wherein the first chip includes video processing circuitry to provide the video signals to the parallel source, and the second chip is a physical layer (PHY) chip.

7. The device of claim 1, wherein the parallel source is a parallel video and audio source in which the group of signals include video, audio, and control signals, and the parallel sink is a parallel video and audio sink.

8. The device of claim 7, wherein the parallel source includes a signal formatter to format the video, audio, and control signals in a High-Definition Multimedia Interface (HDMI) compatible format, and a transmitter to transmit the video, audio, and control signals on the bus.

9. The device of claim 1, wherein the device includes a DVD player.

10. The device of claim 1, wherein the signal extractor is to recreate at least one control signal that can be inferred from transmitted from control signals.

11. A system comprising: a serial link in a cable;a system video and audio sink device;a system video and audio source device coupled to the system video and audio sink device through the serial link, the system video and audio source device including:a parallel source to provide parallel groups of signals including video signals to the bus, wherein the bus has a number of lanes that is fewer than a number of signals used to represent a pixel such that pixels are represented in more than one of the parallel groups; anda parallel sink to receive the parallel groups of signals from the bus, wherein the parallel sink includes a signal extractor to separate at least a portion of the groups of signals into multiple channels, and encoder and serializer circuits to encode and serialize the separated signals.

12. The system of claim 11, wherein the parallel source is a parallel transition minimized differential signaling (TMDS)-based source and the parallel groups of signals are TMDS signals.

13. The system of claim 11, wherein the parallel source is in a first chip and the parallel sink is in a second chip, wherein the parallel source is a parallel video and audio source in which the group of signals include video, audio, and control signals, and the parallel sink is a parallel video and audio sink, and wherein the first chip includes video processing circuitry to provide the video signals to the parallel video and audio source.

14. The system of claim 11, wherein the parallel source is a parallel video and audio source in which the group of signals include video, audio, and control signals, and the parallel sink is a parallel video and audio sink, and wherein the parallel source includes a signal formatter to format the video, audio, and control signals in a High-Definition Multimedia Interface (HDMI) compatible format, and a transmitter to transmit the video, audio, and control signals on the bus.

15. The system of claim 11, wherein the system video and audio sink device is a high definition display, and the system video and audio source device is one of the following: a DVD player, a set top box, and a computer.

16. A chip comprising: a parallel source to provide parallel groups of signals including video signals to output ports, wherein the number of output ports is fewer than a number of signals used to represent a pixel such that pixels are represented in more than one of the parallel groups; and

17. The chip of claim 16, wherein the parallel source is a parallel transition minimized differential signaling (TMDS)-based source and the parallel groups of signals are TMDS signals.

18. The chip of claim 16, further comprising video processing circuitry to provide the video signals to the parallel source.

19. The chip of claim 16, wherein the signals include video, audio, and control signals, and the parallel source includes a signal formatter to format the video, audio, and control signals in a High-Definition Multimedia Interface (HDMI) compatible format, and a transmitter to transmit the video, audio, and control signals.

20. A chip comprising: a parallel sink to receive the parallel groups of signals from ports, wherein the parallel sink includes a signal extractor to separate at least a portion of the groups of signals into multiple channels, and encoder and serializer circuits to encode and serialize the separated signals.

21. The chip of claim 20, wherein there are twelve input ports and twenty-four signals are used to represent a pixel.

22. The chip of claim 20, the chip is a physical layer (PHY) chip.

23. An apparatus comprising: parallel input ports configured to receive subsets of parallel encoded signals;an signal extractor configured to extract groups of bits from the subsets of the parallel encoded signals to form extracted groups; anda number of serializers each of which is configured to at least serialize one of said extracted groups to form a serialized group,wherein said serialized group is transmitted via a serial link.

24. The apparatus of claim 23, wherein the encoded signals are Transition Minimized Differential Signaling (“TMDS”) signals.

25. The apparatus of claim 23 wherein the signal extractor comprises a signal detector configured to identify said groups of bits constituting a first subset and a second subset of the subsets of the parallel encoded signals.

26. The apparatus of claim 23, wherein the serial link further comprises one or more of the following: High-Definition Multimedia Interface (“HDMI”)-compliant link, a Digital Visual Interface (“DVI”)-compliant link, Unified Display Interface (“UDI”)-compliant link, and an TMDS-compliant link.

27. The apparatus of claim 23, wherein the encoded signals include parallel HDMI control signals.

28. A repeater for regenerating encoded signals for transmission over one or more serial links, the repeater comprising: one or more inbound serial data links;one or more parallel sources configured to encoded signals from said one or more inbound serial data links, and further configured to generate parallel encoded signals;one or more parallel sinks configured to extract groups of bits from said parallel TMDS-based signals, and further configured to serialized said groups of bits for transmission over said one or more serial links; andone or more parallel buses for carrying said parallel encoded signals from said one or more parallel sources to said one or more parallel sinks.

29. The repeater of claim 28, wherein said parallel encoded signals are transition-minimized differential signaling (“TMDS”) signals.

30. The repeater of claim 28, wherein said repeater is a High-Definition Multimedia Interface (“HDMI”) repeater and said one or more parallel TMDS-based buses are parallel HDMI buses.