Mark A. Neifeld; Improvements in the Data Fidelity of Photorefractive Memories; Jul. 1995; The International Society for Optical Engineering, vol. 2529. |
Mark A. Neifeld, et al.; Parallel Error Correction for Optical Memories; 1994; p. 87-98; Optical Memory and Neural Networks, vol. 3, No. 2. |
Mark A. Neifeld, et al.; Optical and Electronics Error Correction Schemes for Highly Parallel Access Memories; Jul., 1993; pp. 543-553; The International Society for Optical Engineering, vol. 2026. |
Chuck Benz, et al.; An Error-Correcting Encoder and Decoder for a 1 Gbit/s Fiber Optic Link; 1991; pp. 7.1.1-7.1.4; IEEE 1991 Custom Integrated Circuits Conference. |
Somsak Choomchuay, et al.; An Algorithm and a VLSI Architecture for Reed Solomon Decoding: 1992; pp. 2120-2123; 1992 IEEE. |
B. Arambepola, et al.; VLSI Array Architecture for Reed-Solomon Decoding; Apr., 1991; pp. 2963-2966; 1991 IEEE; CH 3006-4. |
Mark A. Niefeld, et al.; Error Correction for Increasing the Usable Capacity of Photorefractive Memories; 1994; pp. 1483-1485; Optics Letters, vol. 19, No. 18. |
Mark A. Niefeld, et al; Error-correction Schemes for Volume Optical Memories; Dec. 10, 1995; pp. 8183-8191; Applied Optics; vol. 34, No. 35. |
B. Arambepola, et al.; Algorithms and Architectures for Reed-Solomon Codes; 1992; pp. 172-184; GEC Journal of Research; vol. 9, No. 3. |
Howard M. Shao, et al.; A VLSI Design of a Pipeline Reed-Solomon Decoder; May, 1985; pp. 393-403; Transactions on Computers; vol. C-34, No. 5. |
Richard E. Blahut; A Universal Reed-Solomon Decoder; Mar., 1984; pp. 150-157; IBM J. Res. Develop.; vol. 28, No. 2. |
D. M. Castagnozzi et al.; Error Correcting Coding of a 220Mbit/s Coherent Optical Communication Channel; Aug. 2, 1990; pp. 1288-1290; Electronics Letters; vol. 26, No. 16. |
L. Welch et al., Continued Fractions and Berlekamp's Algorithm, IEEE Transactions on Information Theory, vol. IT-25, No. 1, Jan. 1979, pp. 19-27. |
S. Choomchuay, et al.; Error Correction, Reed-Solomon Decoding, VLSI; Jun., 1993; pp. 189-196; IEE Proceedings-I; vol. 140, No. 3. |
Shyue-Win Wei, et al.p; High-Speed Decoder of Reed-Solomon Codes; Nov., 1993; pp. 1588-1593; IEEE Transactions on Communications; vol. 41, No. 11. |
William D. Doyle, et al.; A High Capacity, High Performance, Small Form Factor Magnetic Tape Storage System; Sep., 1990; pp. 2152-2156; IEEE Transactions on Magnetics; vol. 26, No. 5. |
Christopher R. Hawthorne, et al.; An Error-Correction Scheme for a Helical-Scan Magnetic Data Storage System; Jan., 1992; pp. 267-275; IEEE Journal on Selected Areas in Communications; vol. 10, No. 1. |
Toshinari Suematsu, et al.; An Error Position Recording Method for Optical Disks; 1993; pp. 3-43; Electronics and Communications in Japan; Part 3, vol. 76, No. 3. |
Jiren Yuan, et al; 1.2 Gbit/s Error-correcting en/decoder for Optical Fibre Communication in 1.2 um CMOS; 1991; pp. 1901-1904; IEEE; CH 3006-4. |
J. Franz, et al.; Error Correcting Coding in Optical Transmission Systems with Direct Detection and Heterodyne Receivers; 1993; pp. 194-199; Journal of Optical Communications, 14 (1993). |
S.R. Whitaker, Reed Solomon VLSI Codec For Advanced Television, IEEE Transactions Circuits and Systems for Video Technology, vol. 1, No. 2, Jun. 1991, pp. 230-236. |
Razavi S. H., et al.; Error Control Coding for Future Digital Cellular Systems; 1992; pp. 685-689; IEEE. |
Toby D. Bennett, et al.; A Single-Chip Deinterleaving Red-Solomon Decoder for High Performance CCDS Telemetry; 1992; pp. 12-19—12-21; IEEE. |
T. K. Truong, et al.; Simplified Procedure for Correcting Both Errors and Erasures of Reed-Solomon Code Using Euclidean Algorithm; Nov., 1988; pp. 318-324; IEE Proceedings; vol. 135, Pt. E, No. 6. |
Kuang Y. Liu; Architecture for VLSI Design of Reed-Solomon Encoders; Feb., 1982; pp. 170-175; IEEE Transactions on Computers, vol. C-31, No. 2. |
Tetsuo Iwaki, et al.; Architecture of a High Speed Reed-Solomon Decoder; Feb. 1994; pp. 75-82; IEEE Transactions on Consumer Electronics, vol. 40, No. 1, Feb. 1994. |
Yong Hwan Kim, et al.; A VLSI Reed-Solomon Decoder; 1992; pp. 1064-1075; The International Society for Optical Engineering/Visual Communications and Image Processing '92; vol. 1818. |
Pomeranz et al., “Vector replacement to improve static-test compaction for synchronous sequential circuits”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 20, Issue 2, pp. 336-342, Feb. 2001.* |
Ruan et al., “A bi-partitioni-codec architecture to reduce power in pipelined circuits”, Computer-Aided Designh of Integrated Circuits and Systems, IEEE Transactions on, Vol. 2, Issue 2, pp. 343-348, Feb. 2001.* |
Aziz et al., “Efficient control state-space search”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 20, Issue 2, pp. 332-336, Feb. 2001.* |
Berlekamp, “Algebraic Coding Theory”, Agean Park Press, pp. 177-199, Dec. 1984. |