Electronic devices commonly share a single output with multiple internal components. For example, a single universal serial bus (USB) port can be configured to send or receive USB information as well as send or receive one or more other type of information, such as audio information. Such dual use of a single port often requires separate circuits having at least some component redundancy.
This document discusses, among other things, a switch multiplexer having a common connector, the switch multiplexer including a first switch configured to receive a first signal at or above a ground (GND) reference and a second switch configured to receive a second signal that swings positive and negative about GND. The switch multiplexer includes a negative charge pump configured to bias the first switch with a negative charge pump voltage lower than the most negative voltage swing of the second signal when the second switch is enabled, and to bias the first switch with GND when the first switch is enabled.
This overview is intended to provide an overview of subject matter of the present patent application. It is not intended to provide an exclusive or exhaustive explanation of the invention. The detailed description is included to provide further information about the present patent application.
In the drawings, which are not necessarily drawn to scale, like numerals may describe similar components in different views. Like numerals having different letter suffixes may represent different instances of similar components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed in the present document.
The present inventor has recognized, among other things, a system and method capable of reducing component redundancy in multi-use pass gates sharing a common connector. In an example, a negative charge pump, providing an output with a magnitude less than the most negative switch node voltage (−VSW) in a system, can be enabled in a switch only during modes that require a negative switch voltage. In an example, the switch can have a first mode, such as a USB mode, where the switch voltage remains above GND, and a second mode, such as an audio mode, where the switch voltage goes below GND. In the first mode, where the switch voltage remains above GND, the negative charge pump can provide an output at GND potential. In the second node, where the switch voltage goes below GND, the negative charge pump can provide an output with a magnitude less than the most negative switch node voltage (−VSW) in the system.
When enabled (e.g., in audio mode, etc.), a negative charge pump 315 (e.g., such as that illustrated in the example of
In an example, the function of the UVT networks can be provided by the negative charge pump, and the UVT networks, as illustrated in the example of
In this example, the USB pass gate 305 is a first pass gate and the audio pass gate 310 is a second pass gate. In certain examples, one or more other types of gates can be used with the systems and methods disclosed herein.
In Example 1, a system includes a switch multiplexer (MUX) having a common connector, the switch MUX including a first switch configured to receive a first signal, wherein the first signal is at or above a ground (GND) reference, and a second switch configured to receive a second signal, wherein the second signal swings positive and negative about GND. The system of Example 1 further includes a negative charge pump configured to bias the first switch with a negative charge pump voltage lower than the most negative voltage of the second signal when the second switch is enabled, and to bias the first switch with GND when the first switch is enabled.
In Example 2, the first signal of Example 1 optionally remains at or above GND.
In Example 3, the first switch of any one or more of Examples 1-2 optionally includes a universal serial bus (USB) switch and wherein the first signal includes a USB signal configured to remain at or above GND.
In Example 4, the second switch of any one or more of Examples 1-3 optionally includes at least one of an audio switch, a communication switch, or a video switch.
In Example 5, the second switch of any one or more of Examples 1-4 optionally includes an audio switch. In Example 6, the second switch of any one or more of Examples 1-5 is optionally configured to be coupled to a second level shift component and to an under voltage tolerance (UVT) network, wherein the UVT network is configured to provide the lower of the negative charge pump voltage and an input to the second switch, wherein the first switch of any one or more of Examples 1-5 is optionally configured to be coupled to a first level shift down component and to the negative charge pump voltage.
In Example 7, the first switch of any one or more of Examples 1-6 optionally includes parasitic body diodes, and wherein the negative charge pump is configured to reverse bias, when the second switch is enabled, the parasitic body diodes of the first switch.
In Example 8, the common connector of any one or more of Examples 1-7 is coupled to a USB port of an electronic device.
In Example 9, a method includes receiving a first signal at a first switch, wherein the first signal is configured to be at or above a ground (GND) reference, receiving a second signal at a second switch, wherein the second signal is configured to swing positive and negative about GND, biasing the first switch with a negative charge pump voltage lower than the most negative voltage of the second signal using a negative charge pump when the second switch is enabled, and biasing the first switch with GND using the negative charge pump when the first switch is enabled.
In Example 10, the first signal of any one or more of Examples 1-9 optionally remains at or above GND.
In Example 11, the first switch of any one or more of Examples 1-10 optionally includes a universal serial bus (USB) switch and the first signal of any one or more of Examples 1-10 optionally includes a USB signal configured to remain at or above GND.
In Example 12, the second switch of any one or more of Examples 1-11 optionally includes at least one of an audio switch, a communication switch, or a video switch.
In Example 13, the second switch of any one or more of Examples 1-12 optionally includes the audio switch.
In Example 14, any one or more of Examples 1-13 optionally includes coupling the second switch between a second level shift component and an under voltage tolerance (UVT) network, wherein the UVT network is configured to provide the lower of the negative charge pump voltage and an input to the second switch and coupling the first switch between a first level shift down component and the negative charge pump voltage.
In Example 15, the first switch of any one or more of Examples 1-14 optionally includes parasitic body diodes, and any one or more of Examples 1-14 optionally includes reverse biasing the parasitic body diodes of the first switch when the second switch is enabled.
In Example 16, the common connector of any one or more of Examples 1-15 is optionally coupled to a USB port of an electronic device.
In Example 17, a system or apparatus can include, or can optionally be combined with any portion or combination of any portions of any one or more of Examples 1-16 to include, means for performing any one or more of the functions of Examples 1-16, or a machine-readable medium including instructions that, when performed by a machine, cause the machine to perform any one or more of the functions of Examples 1-16.
The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments in which the invention can be practiced. These embodiments are also referred to herein as “examples.” Such examples can include elements in addition to those shown or described. However, the present inventor also contemplates examples in which only those elements shown or described are provided. Moreover, the present inventor also contemplates examples using any combination or permutation of those elements shown or described (or one or more aspects thereof), either with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.
All publications, patents, and patent documents referred to in this document are incorporated by reference herein in their entirety, as though individually incorporated by reference. In the event of inconsistent usages between this document and those documents so incorporated by reference, the usage in the incorporated reference(s) should be considered supplementary to that of this document, for irreconcilable inconsistencies, the usage in this document controls.
In this document, the terms “a” or “an” are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of “at least one” or “one or more.” In this document, the term “or” is used to refer to a nonexclusive or, such that “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise indicated. In this document, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein.” Also, in the following claims, the terms “including” and “comprising” are open-ended, that is, a system, device, article, or process that includes elements in addition to those listed after such a term in a claim are still deemed to fall within the scope of that claim. Moreover, in the following claims, the terms “first,” “second,” and “third,” etc. are used merely as labels, and are not intended to impose numerical requirements on their objects.
Method examples described herein can be machine or computer-implemented at least in part. Some examples can include a computer-readable medium or machine-readable medium encoded with instructions operable to configure an electronic device to perform methods as described in the above examples. An implementation of such methods can include code, such as microcode, assembly language code, a higher-level language code, or the like. Such code can include computer readable instructions for performing various methods. The code may form portions of computer program products. Further, in an example, the code can be tangibly stored on one or more volatile, non-transitory, or non-volatile tangible computer-readable media, such as during execution or at other times. Examples of these tangible computer-readable media can include, but are not limited to, hard disks, removable magnetic disks, removable optical disks (e.g., compact disks and digital video disks), magnetic cassettes, memory cards or sticks, random access memories (RAMs), read only memories (ROMs), and the like.
The above description is intended to be illustrative, and not restrictive. For example, the above-described examples (or one or more aspects thereof) may be used in combination with each other. Other embodiments can be used, such as by one of ordinary skill in the art upon reviewing the above description. The Abstract is provided to comply with 37 C.F.R. §1.72(b), to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. This should not be interpreted as intending that an unclaimed disclosed feature is essential to any claim. Rather, inventive subject matter may lie in less than all features of a particular disclosed embodiment. Thus, the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separate embodiment, and it is contemplated that such embodiments can be combined with each other in various combinations or permutations. The scope of the invention should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.
This application claims the benefit of priority under 35 U.S.C. §119(e) of Nickole Gagne U.S. Provisional Patent Application Ser. No. 61/750,594, titled “METHOD OF PARASITIC ISOLATION IN COMMUNICATION SWITCHES WITH IMPROVED BANDWIDTH,” filed on Jan. 9, 2013, which is incorporated by reference herein in its entirety.
Number | Date | Country | |
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61750594 | Jan 2013 | US |