The present invention relates to protection circuits generally and, more particularly, to a method and/or apparatus for implementing a partial hot plug protection circuit for super capacitor temperature sensor.
Conventional backup power supplies implement battery packs or capacitor banks to provide power to computers. The backup supplies continue to power the computers (such as network servers, or important work stations) when the line voltage is interrupted.
It would be desirable to implement a partial hot plug protection circuit for a temperature sensor in a capacitor package.
The present invention concerns an apparatus comprising a capacitor circuit, a control circuit, and a resistor circuit. The capacitor circuit may be configured to (i) be charged through an input terminal and (ii) store a charge sufficient to run a device drive on an output terminal. The control circuit may be configured to (i) charge the capacitor through the input terminal, (ii) couple the input terminal to a voltage source, and (iii) discharge the capacitor circuit when the output terminal is not connected to the device drive.
The objects, features and advantages of the present invention include providing a protection circuit that may (i) implement a partial hot plug, (ii) ensure that a partially charged capacitor bank does not AC couple into a ground pin, (iii) provide a safe discharge of a capacitor pack, and/or (iv) be cost effective to implement.
These and other objects, features and advantages of the present invention will be apparent from the following detailed description and the appended claims and drawings in which:
The present invention may use one or more P-channel FET and/or N-channel transistors to isolate a power path of a capacitor pack. In one example, a capacitor pack may refer to a discrete package that may be implemented separately from a device such as a controller board. In another example, the capacitor pack may refer to a group of capacitors fabricated along with another device, such as a controller board. A control circuit may be used to prevent a fully charged (or partially charged) capacitor pack from AC coupling energy into one or more ground pins of one or more active Integrated Circuits (ICs) (e.g., a temperature sensor) in a configuration using the capacitor pack. While a temperature sensor has been described generally, the particular type of active IC protected may be varied to meet the design criteria of a particular implementation.
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The current into or out of a capacitor circuit 102 is normally enabled (or disabled) by the use of a control circuit (to be described in more detail in connection with
The capacitor circuit 102 may include control circuitry that may respond to an input voltage VDD (to be described in more detail in connection with
With the implementation of the control circuit on a base card (e.g., a PCIe board that may plug into a PCIe bus of a computer), the circuit 100 may ensure the energy from a fully (or partially) charged capacitor circuit 102 does not AC couple into the GND pin of the temperature sensor 104 in the capacitor circuit 102. While a PCIe board and/or PCIe bus have been described, the particular type of bus and/or interconnection used may be varied to meet the design criteria of a particular implementation. In one example, the capacitor circuit 102 may be used to provide power to a memory device (not shown). The memory device may be implemented, in one example, as a non-volatile storage device, such as a flash memory, a flash memory array, or other suitable memory module. Such a memory device may be implemented, in one example, to store cache data such as cache data from a redundant array of inexpensive disks (RAID) controller. The capacitor circuit 122 may provide sufficient energy to power the cache memory. Also, the circuit 100 may allow the capacitor circuit 102 to self discharge in a safe manner to prevent an end user from being exposed to high energy discharge (e.g., a shock). The circuit 100 may be used to control AC coupled energy from a fully (or partially) charged capacitor circuit 102 into the GND pin of the active circuit ICs (e.g., the temperature sensor circuit 104).
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The present invention may also be implemented by the preparation of ASICs (application specific integrated circuits), Platform ASICs, FPGAs (field programmable gate arrays), PLDs (programmable logic devices), CPLDs (complex programmable logic device), sea-of-gates, RFICs (radio frequency integrated circuits), ASSPs (application specific standard products), one or more integrated circuits, one or more chips or die arranged as flip-chip modules and/or multi-chip modules or by interconnecting an appropriate network of conventional component circuits, as is described herein, modifications of which will be readily apparent to those skilled in the art(s).
The terms “may” and “generally” when used herein in conjunction with “is(are)” and verbs are meant to communicate the intention that the description is exemplary and believed to be broad enough to encompass both the specific examples presented in the disclosure as well as alternative examples that could be derived based on the disclosure. The terms “may” and “generally” as used herein should not be construed to necessarily imply the desirability or possibility of omitting a corresponding element.
While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the scope of the invention.