Claims
- 1. A peak detector circuit for linearly displaying the peak level of video-modulated, incoming RF signals as well as CW incoming RF signals from a signal source, said peak detector circuit comprising:
- a first peak detector circuit portion having an output and an input coupled to said signal source and including a first capacitor having a relatively small time constant; and
- a second peak detector circuit portion having an output and an input electrically connected to the output of said first peak detector circuit portion and including a holding capacitor permanently connected as part of said second peak detector circuit portion and being in a fixed position relative thereto, said second peak detector circuit portion further including means for rapidly charging said holding capacitor, said holding capacitor having a relatively large time constant.
- 2. The peak detector circuit of claim 1 wherein said holding capacitor being suitably arranged in a feedback loop around a voltage comparator such that the charge on said holding capacitor increases in response to the output of said voltage comparator when said output is of a higher level than the existing charge on said holding capacitor.
- 3. The peak detector circuit of claim 2 wherein said second peak detector circuit portion is suitably arranged such that the charge on said holding capacitor is proportional to the peak level of said incoming RF signals.
Parent Case Info
This is a continuation of application Ser. No. 813,811, filed July 8, 1977.
US Referenced Citations (4)
Continuations (1)
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Number |
Date |
Country |
Parent |
813811 |
Jul 1977 |
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