Not Applicable
Not Applicable
The present technology pertains generally to electronic device antennas and manufacturing methods, and more particularly to miniaturized microstrip patch antennas and antenna arrays and volume fabrication methods.
Microstrip patch antennas are resonant radiating structures consisting generally of a laminate of two parallel conducting layers separated by a single thin dielectric center layer. The upper conducting layer functions as a radiator while the lower conductive layer acts as a ground plane. The radiating patch layer is typically configured with a square, rectangular, circular, or triangular shape but may take any shape. RF power may be fed to patch antennas in different ways such as with a microstrip line, a coaxial probe, aperture coupling and proximity coupling.
However, conventional microstrip antenna designs do have some limitations that may reduce theft practical usefulness, such as restricted operation bandwidth, low gain, and a potential decrease in radiation efficiency due to surface-wave losses. Several approaches have been attempted to increase the bandwidth of patch antennas including: the use of a low dielectric substrate; the use of a reduced ground plane, impedance matching techniques; cutting of a resonant slot in the patch and other antenna geometry configurations as well as multi-resonator stack configurations.
The widespread application of miniaturization techniques, along with multiband operation techniques in the design of RF and microwave planar antennas, has resulted in revolutionary advances and flexibility in communication systems over the past few decades. In particular, multiband operation and size reduction in microstrip patch antenna has received much attention due to their simplicity, conformal nature, low manufacturing cost, and accurate analysis and design using several EM simulators. However, conventional miniaturization techniques with patch antennas have not performed satisfactorily.
For example, it has been observed that the bandwidth of a patch antenna decreases as the thickness of the patch decreases. Another common miniaturization technique in microstrip patch antenna design is the use of dielectric materials with high-permittivity such as high-contrast, low-loss thick ceramic substrates. However, the use of high dielectric constant materials deteriorates the far-field performance of the antenna system due to the existence of surface waves, limiting the applicability of this approach.
The size reduction may also be achieved using artificial magneto-dielectric surfaces and metamaterials. One design method used to produce electrically small rectangular patch antennas involves the use of double positive metamaterial blocks. However, for such rectangular patches, broadside null radiation pattern was obtained in the sub-wavelength regime.
Loading the corners of a patch antenna by shorting-posts and artificial dielectrics has also been attempted as alternatives to high-permittivity materials. However the use of shorting post leads to a much-reduced impedance bandwidth and high cross-polarization in the antenna response.
Therefore, there remains an urgent need to develop more cost-effective approaches for scaling down the minimum feature size and increasing the density of features in microstrip patch antenna arrays. There is also a need for high volume and low cost fabrication methods. The present technology satisfies these needs and is generally an improvement in the art.
The demand for devices with thin and compact form factors requires small antenna elements. However, it is difficult to accommodate multiple antennas in compact devices because space within these devices is at a premium. The present technology provides reduced size microstrip patch antenna element designs and fabrication methods that allow close packing density of the radiating elements as well as dual mode degeneracy. The microstrip patch antenna elements may be used individually or as components of an array of antenna elements. The microstrip patch antenna elements can also be used in a wide variety of applications ranging from mobile telephones to battlefield surveillance and telemetry systems.
The patch antenna elements have a highly periodic, rippled radiating element of an electrically conductive material disposed upon a thin substrate of a dielectric and a conductive ground plane. In one preferred embodiment, the patch antenna elements utilize a rippled silicon substrate as a template for the deposition of a conductor layer and the patterning of the rippled microstrip patch antenna. For example, highly periodic rippled silicon dioxide substrates in the form of triangular shaped troughs are illustrated. However, the substrates can be patterned with both periodic and/or non-periodic features and troughs with shapes other than triangles can also be used. Substrates with various periodicities as low as 500 nm and as high as 10 μm can also be fabricated.
In one embodiment, the patch is fed by two microstrip matching networks, exciting both TM10 and TM01 modes in the antenna. The square patch structure is designed to be rippled in one direction and flat in the other. This allows for dual mode degeneracy as well as size miniaturization in the patch antenna. Since the patch antenna has two different effective lengths along the two in-plane directions, it has two dominant resonant frequency modes depending on the location of the input excitation port. This allows for miniaturization of the patch antenna as well as dual-band degeneracy. In another embodiment, the structure can also be rippled in both dimensions with different periodicities to achieve two different resonant frequencies.
A fabrication process for the antenna element is also provided. The process includes: forming an oxide layer on a substrate; depositing photoresist over the oxide layer and patterning the photoresist to form a trench pattern of exposed oxide; etching the photoresist and exposed oxide to form a trench pattern of exposed substrate; etching the exposed substrate using the oxide as an etch mask to form V-shaped trenches in the substrate; removing the oxide etch mask to expose the substrate; forming an oxide layer on the exposed substrate as an insulator layer; and depositing a metal layer over the insulator layer; wherein a plurality of metalized parallel trenches is formed; and wherein the trenches are along one in-plane direction or along two perpendicular in-plane directions.
According to one aspect of the technology, a periodically-rippled patch antenna structure is provided with a plurality of metalized periodic parallel trenches positioned along one in-plane direction or along two perpendicular in-plane directions.
Another aspect of the technology is to provide an antenna that has a low profile but is capable of operating on multiple frequency bands, which may be integrated into a wide variety of devices.
A further aspect of the technology is to provide a processing system that uses patterning methods that are easy to implement in high-volume manufacturing facilities for high volume production.
Another aspect of the technology is to provide a rippled patch antenna with features that have tunable dimensions and high antenna performance.
Further aspects of the technology described herein will be brought out in the following portions of the specification, wherein the detailed description is for the purpose of fully disclosing preferred embodiments of the technology without placing limitations thereon.
The technology described herein will be more fully understood by reference to the following drawings which are for illustrative purposes only:
Referring more specifically to the drawings, for illustrative purposes, embodiments of the methods and resulting structures are generally shown. Several embodiments of the technology are described generally in
Turning now to
The antenna radiator structure illustrated in
In the detail shown in
The illustration shown in
The properties of the antenna can also be controlled by tuning the parameters in a rectangular patch antenna design (L, W, h, permittivity). For example, the bandwidth of can be increased by increasing the height (h) or thickness of the substrate. The length (L) of the patch can control the resonant frequency and the width (W) can control the input impedance and radiation patterns. The selection of materials with different permittivities can also influence the impedance, radiation and bandwidth characteristics of the device.
Referring now to
In the embodiment illustrated, a silicon wafer 20 with a (100) crystallographic orientation may be thermally oxidized to grow a layer of oxide 22 to serve as an etch mask, as shown in
Dry etching is preferably used to etch the exposed SiO2 etch mask 22 and create trenches 28 of defined dimensions in the oxide layer 22, spaced at a determined distance apart and exposing the silicon substrate 20 underneath. The photoresist layer 24 can also be removed to reveal the patterned oxide layer as seen in
Anisotropic etching of the exposed silicon 28 can then be performed using KOH at 45° C., with the patterned thermal oxide 22 acting as an etch mask, for example. This produces V shape trenches in the silicon of desired dimensions in this illustration as shown in
Another thermal oxide layer 30 of a desired thickness can then be grown on the clean and trenched substrate 20 for further substrate insulation as seen in
The invention may be better understood with reference to the accompanying examples, which are intended for purposes of illustration only and should not be construed as in any sense limiting the scope of the present invention as defined in the claims appended hereto.
In order to prove the concept of the device and the fabrication methods, a patch antenna device was produced using the methods of the present technology as outlined in
To further demonstrate the technology, a 1D rippled patch antenna was fabricated and compared with a conventional flat patch antenna.
Apart from area reduction, the 1D rippled patch antenna also enables dual mode degeneracy as shown in
In the graph of
The second mode occurs when the 1D rippled patch antenna is excited with a microstrip line that is connected perpendicular to the 1D ripples (from port R2). The effective length of the antenna along this direction is 4 mm and thus the radiation frequency is near that of the flat 4 mm×4 mm, which is 10.1 GHz displayed as R2 in
The radiation pattern of the 1D rippled patch antenna when excited from port R1 is compared with the flat patch antenna in
From the description herein, it will be appreciated that that the present disclosure encompasses multiple embodiments which include, but are not limited to, the following:
1. A microstrip patch antenna apparatus, comprising: (a) a dielectric substrate with a patterned top surface of a plurality of troughs; (b) a ground plane adjacent to the dielectric substrate; (c) a radiating patch of one or more layers of a conductor disposed over the patterned top surface of the substrate; and (d) at least one input excitation port coupled to the conductor.
2. The apparatus of any preceding embodiment, further comprising a layer of a metal oxide between the top surface of the substrate and the conductor layer.
3. The apparatus of any preceding embodiment, wherein the substrate comprises undoped silicon and the oxide layer comprises a silicon dioxide layer.
4. The apparatus of any preceding embodiment, wherein the patterned top surface comprises periodic parallel troughs positioned along one in-plane direction or along two perpendicular in-plane directions.
5. The apparatus of any preceding embodiment, wherein the patterned top surface comprises periodic parallel troughs with a triangular cross-section.
6. The apparatus of any preceding embodiment, wherein the periodic parallel troughs with a triangular cross-section have a trough width and a distance between troughs wherein the distance between troughs and the trough width are equal.
7. The apparatus of any preceding embodiment: wherein the periodic parallel troughs with a triangular cross-section have a trough width and a distance between troughs; and wherein the distance between troughs and the trough width are not equal.
8. The apparatus of any preceding embodiment, wherein the patterned surface comprises a non-periodic surface pattern.
9. The apparatus of any preceding embodiment, further comprising: a second port coupled to the conductor at a position orthogonal to the first port; wherein the structure is a component of a dual mode antenna capable of operating at two distinct frequencies.
10. A microstrip patch antenna apparatus, comprising: (a) a silicon substrate with a patterned top surface of a plurality of troughs; (b) an oxide layer disposed over the patterned top surface of the substrate; (c) at least one radiating patch of one or more layers of a metal conductor disposed over the oxide layer; (d) a first one input excitation port coupled to the conductor; (e) a second port coupled to the conductor at a position orthogonal to the first port; and (f) a ground plane adjacent to the dielectric substrate.
11. The apparatus of any preceding embodiment, wherein the patterned top surface comprises periodic parallel troughs positioned along one in-plane direction or along two perpendicular in-plane directions.
12. The apparatus of any preceding embodiment, wherein the patterned top surface comprises periodic parallel troughs with a triangular cross-section.
13. The apparatus of any preceding embodiment: wherein the periodic parallel troughs with a triangular cross-section have a trough width and a distance between troughs; and wherein the distance between troughs and the trough width are equal.
14. The apparatus of any preceding embodiment: wherein the periodic parallel troughs with a triangular cross-section have a trough width and a distance between troughs; and wherein the distance between troughs and the trough width are not equal.
15. The apparatus of any preceding embodiment, wherein the patterned surface comprises a non-periodic surface pattern.
16. A method for fabricating a periodically-rippled patch antenna structure, the method comprising: forming an oxide layer on a substrate; depositing photoresist over the oxide layer and patterning the photoresist to form a trench pattern of exposed oxide; etching the photoresist and exposed oxide to form a trench pattern of exposed substrate; etching the exposed substrate using the oxide as an etch mask to form trenches in the substrate; removing the oxide etch mask to expose the etched substrate; and depositing a metal layer over the etched substrate; wherein a plurality of metalized parallel trenches is formed; and wherein the trenches are along one in-plane direction or along two perpendicular in-plane directions.
17. The method of any preceding embodiment, further comprising: forming an oxide layer on the etched substrate as an insulator layer; and depositing a metal layer over the insulator layer.
18. The method of any preceding embodiment, wherein the trenches formed in the etched substrate have a triangular shaped cross-section.
19. The method of any preceding embodiment, further comprising: mounting the substrate to a ground plane; and coupling input excitation ports to the metal layer at locations that will produce two dominant resonant frequency modes.
20. The method of any preceding embodiment, further comprising: forming a plurality of patterns of trenches in the substrate; depositing layers of metal on each trench pattern to form an array; and coupling input excitation ports to the metal layer of each trench pattern at locations that will produce two dominant resonant frequency modes for each metal layer of the array.
Although the description herein contains many details, these should not be construed as limiting the scope of the disclosure but as merely providing illustrations of some of the presently preferred embodiments. Therefore, it will be appreciated that the scope of the disclosure fully encompasses other embodiments which may become obvious to those skilled in the art.
In the claims, reference to an element in the singular is not intended to mean “one and only one” unless explicitly so stated, but rather “one or more.” All structural, chemical, and functional equivalents to the elements of the disclosed embodiments that are known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the present claims. Furthermore, no element, component, or method step in the present disclosure is intended to be dedicated to the public regardless of whether the element, component, or method step is explicitly recited in the claims. No claim element herein is to be construed as a “means plus function” element unless the element is expressly recited using the phrase “means for”. No claim element herein is to be construed as a “step plus function” element unless the element is expressly recited using the phrase “step for”.
This application is a 35 U.S.C. § 111(a) continuation of PCT international application number PCT/US2016/028158 filed on Apr. 18, 2016, incorporated herein by reference in its entirety, which claims priority to, and the benefit of, U.S. provisional patent application Ser. No. 62/149,583 filed on Apr. 18, 2015, incorporated herein by reference in its entirety. Priority is claimed to each of the foregoing applications. The above-referenced PCT international application was published as PCT International Publication No. WO 2016/172056 on Oct. 27, 2016, which publication is incorporated herein by reference in its entirety.
Number | Date | Country | |
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62149583 | Apr 2015 | US |
Number | Date | Country | |
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Parent | PCT/US2016/028158 | Apr 2016 | US |
Child | 15786039 | US |