PHASE-CONTROLLED IGBT BRIDGE TYPE, GTO BRIDGE TYPE, AND HYBRID IGBT/SEMI-PASSIVE, GTO/SEMI-PASSIVE TYPES FAULT CURRENT LIMITERS (FCLs)

Abstract

The present invention provides topologies of phase-controlled IGBT bridge type and GTO bridge type Fault Current Limiter (FCL), which allow the precise limitation of fault currents to the desired values and can keep these values constant despite variations (dynamic behavior) of the fault currents. According to an embodiment of the invention, the topologies enable to use a phase control approach for optimal firing angles calculation. This control approach can be used in the proposed FCL topologies and other controlled bridge topologies such as SCRs bridge, GTO bridge, and IGBT/IGCT/Mosfet bridge topologies.

Description

FIELD OF THE INVENTION

The present invention relates to the field of current limiters. More particularly, the present invention relates to phase-controlled Insulated-Gate Bipolar Transistor (IGBT) bridge type, Gate Turn-off Thyristor (GTO) bridge type, and hybrid IGBT/semi-passive, and GTO/semi-passive type, and IGBT/Thyristor, and GTO/Thyristor Fault Current Limiters (FCLs).

BACKGROUND OF THE INVENTION

The search for solutions to the power quality issues in modern distribution power networks is becoming more intensive during the last years, due to the increasing number of electronic and sensitive loads, and widespread integration of renewable energy sources and distributed generation. The main power quality problems are harmonics, short circuit currents, and voltage spikes or sags. Harmonics produced by non-linear equipment adversely affect motors, transformers, and long power cables. The problem of harmonics can be treated by using passive or active power filters (APFs). The fault currents are dangerous for the network equipment and loads, and also may cause voltage sags. The voltage spikes and sags may be treated by Dynamic Voltage Restorers (DVRs) and static compensators (STATCOMs), while the fault currents can be eliminated by Circuit Breakers (CBs). However, the response time of CBs is limited. Furthermore, the price of the CBs increases with the amplitude of the fault currents that CB has to trip.

In order to limit fault currents, superconducting Fault Current Limiters (FCLs) may also be used. FCLs can be applied in series with the existing circuit breakers. Due to the fast response time, FCLs can limit short circuit currents to the desired threshold value until the circuit breaker disconnects the damaged line from the rest of the grid. Moreover, implementation of FCLs allows reduction of circuit breakers rated short circuit current and, as a result, price decrease.

The FCLs change their impedance from zero during normal operation to some fixed or varying impedance (depends on the type of FCL) during fault operation. There are a lot of FCL types that are comprised of different components, have different design, etc.

The FCLs can be divided into two main groups-superconducting and non-superconducting. The main advantages of non-superconducting upon superconducting FCLs are smaller size and weight, simpler structure, and lower price. The main disadvantage is higher power losses. The most widespread types of superconducting FCLs are resistive and inductive, superconducting magnetic energy storage (SMES), and bridge-type FCL. The common topologies of non-superconducting FCLs are resistive such as series dynamic braking resistor (SDBR) and bridge type FCLs.

Typically, the bridge for the bridge-type FCLs is comprised of passive (diodes) or active (thyristors, metal-oxide-semiconductor field-effect transistors (MOSFETs), or insulated-gate bipolar transistors (IGBTs)) semiconductors. Conventional or superconducting reactors and/or resistors are placed inside the bridge. The diodes-based bridge type FCLs are cheaper and have simpler control than the thyristors- and transistors-based FCLs. The transistor-based FCLs have the highest flexibility and control resolution that allows limiting the fault current accurately to the desired value.

It is, therefore, an object of the present invention to provide a phase-controlled IGBT bridge type, GTO bridge type Fault Current Limiter (FCL), and bypassed Thyristors bridge which allow the precise limitation of fault currents to the desired values and can keep these values constant despite variations (dynamic behavior) of the fault currents. All these topologies have the same controller, operation principle, and advantages.

Another object of the present invention is to provide hybrid topologies of phase-controlled IGBT/semi-passive and GTO/semi-passive bridge type FCLs with three active and one passive (diode) switches, and IGBT/Thyristor and GTO/Thyristors bridge type FCLs with two bi-directional switches and two thyristor switches. This results in a reduced price of the FCL.

It is yet another object of the present invention to provide a comprehensive analysis of presented FCLs used to optimize their control units.

It is a further object of the present invention to provide a phase control algorithm that implements theoretical equations for optimal firing angles calculation. This control approach can be used in the proposed FCL topologies and other controlled bridge topologies such as SCRs bridge, GTO bridge, and IGBT/IGCT/Mosfet bridge topologies.

Other objects and advantages of the invention will become apparent as the description proceeds.

SUMMARY OF THE INVENTION

An IGBT and GTO bridge type Fault Current Limiters (FCLs) located between a power source and a load, comprising:

• • a power circuit, constructed from topology of two bi-directional S1, S4 and two unidirectional fully controlled switches S2, S3, connected in a bridge form and a non-superconducting reactor being installed inside said bridge and having internal resistance R_DC with series connected dumping resistor R_D, and parallel to bridge connected shunt capacitor C_sh and resistor R_sh; and
  • a power circuit, constructed from topology of four bi-directional S1-S4 fully controlled switches connected in a bridge form and a non-superconducting reactor being installed inside said bridge and having internal resistance R_DC with series connected dumping resistor R_D, and parallel to bridge connected shunt capacitor C_sh and resistor R_sh; and
  • a controller with precise phase control circuit for limiting the fault current to the desired value by:
    • calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;
    • converting the calculated turn ON and OFF angles to gating signals; and
    • supplying the gating signals to the switches.

In one aspect, the bidirectional switches allow bypassing the FCL during normal operation by simultaneously turning them on at the beginning of the normal operation and their conducting state is preserved until the normal operation mode ends, such that the current that flows through reactor L_DC is zero and the line current flows through switches S₁, S₄.

In another aspect, the reactor operates in a charging mode, during which the positive or negative current flows through the transmission line, corresponding pair of switches, reactor L_DC, and the load, where at the end of the charging mode, the reactor is charged to the maximum absolute value of the line current. The dumping resistor R_D allows fast discharging of the L_DC reactor after the fault period ends and the normal period starts, so it will be ready for the next fault.

In yet another aspect, the reactor operates in a freewheeling mode following the charging mode, during which the polarity of the voltage drop on the reactor is reversed.

During transition from normal to fault operation mode, the shunt capacitor C_sh absorbs undesirable voltage spikes on the IGBT switches due to power line's inductance, while the resistor R_sh limits the capacitor's current. Also during transition from fault to normal operation mode, the shunt capacitor C_sh absorbs undesirable voltage spikes that are developing on reactor L_DC and power line's inductance.

In still another aspect, an IGBT/semi-passive and GTO/semi-passive bridge type Fault Current Limiters (FCLs) located between a power source and a load, comprising:

• • a power circuit, constructed from two fully controlled bidirectional switches S1, S4, one fully controlled unidirectional switch S2, and one diode switch S3, connected in a form of bridge. A non-superconducting reactor is installed inside said bridge and having internal resistance R_DC with series connected dumping resistor R_D, and parallel to bridge connected shunt capacitor C_sh and resistor R_sh; and
  • a controller with precise phase control circuit for limiting the fault current to the desired value by:
    • calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;
    • converting the calculated turn on and off angles to gating signals; and
    • supplying the gating signals to the switches.

In still another aspect, an IGBT/thyristor and GTO/thyristor bridge type Fault Current Limiters (FCLs) located between a power source and a load, comprising:

• • a power circuit, constructed from two fully controlled bidirectional IGBT or GTO switches S1, S4, and two fully controlled thyristor switches S2,S3 connected in a form of bridge. A non-superconducting reactor is installed inside said bridge and having internal resistance R_DC with series connected dumping resistor R_D, and parallel to bridge connected shunt capacitor C_sh and resistor R_sh; and
  • a controller with precise phase control circuit for limiting the fault current to the desired value by:
    • calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;
    • converting the calculated turn on and off angles to gating signals; and
    • supplying the gating signals to the switches.

According to an embodiment of the invention, the explained topologies can be assembled from Mosfets, or IGCTs or GTO, or Thyristor based switches.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other characteristics and advantages of the invention will be better understood through the following illustrative and non-limitative detailed description of preferred embodiments thereof, with reference to the appended drawings, wherein:

FIG. 1 shows an IGBT bridge type FCL connected in series with the line, according to an embodiment of the present invention;

FIG. 2 shows GTO-based bridge-type FCL connected in series with the line, according to an embodiment of the present invention;

FIG. 3 shows the IGBT bridge type FCL of FIG. 1 bypassed by turning on two bi-directional switches S₁ and S₄, normal operation, according to an embodiment of the present invention;

FIG. 4 shows a graph of simulated current flowing through bi-directional switches S₁, S₄ of FIG. 3, which acts as the line current (normal operation);

FIG. 5 shows a graph of an example of gating signal, where α is turn on angle and β is turn off angle;

FIG. 6A shows the path of bridge and capacitor currents during positive and negative half-cycles during fault operation, according to an embodiment of the present invention;

FIG. 6B shows the reactor is short-circuited by turning switches S₁, S₂ when the line current is zero, according to an embodiment of the present invention;

FIG. 7 shows a graph of simulated current through the switches, reactor and bridge; The fault operation mode begins at 0.04 s; α=20° and β=168°;

FIG. 8 shows a graph of zoom in on one cycle of the simulated current through the bridge, switches and reactor; The fault operation mode begins at 0.04 s; α=20° and β=168°;

FIG. 9 shows a graph of simulated current through the bridge, switches and reactor and a graph of the fault operation mode begins at 0.04 s; α=10° and β=197°;

FIG. 10 shows a graph of zoom in on one cycle of the simulated current through the bridge, switches and reactor and a graph of the fault operation mode begins at 0.04 s; α=10° and β=197°;

FIG. 11 shows the freewheeling mode during fault current operation, according to an embodiment of the present invention;

FIG. 12 shows a graph of simulated short circuit current with α=10° and β=262°;

FIG. 13 shows a graph of simulated short circuit current with α=40° and β=227°.

FIG. 14 shows a graph of simulated short circuit current with α_cr=72° and β=179°;

FIG. 15 shows a graph of simulated short circuit current with α=100° and β=255°, α>α_cr;

FIG. 16A shows a scheme of SDBR, according to an embodiment of the present invention;

FIG. 16B shows a scheme of standard diode bridge type FCL;

FIG. 17 shows a comparison graph of simulated line currents without FCL, standard diode bridge FCL, SDBR and proposed phase-controlled FCL, under normal and fault conditions;

FIG. 18 shows the IGBT/semi-passive FCL topology, according to an embodiment of the present invention;

FIG. 19 shows the GTO/semi-passive FCL topology, according to an embodiment of the present invention;

FIG. 20 shows eight IGBTs (four bi-directional switches) bridge type FCL connected in series with the line, according to an embodiment of the present invention.

FIG. 21 shows IGBTs/Thyristors bridge type FCL connected in series with the line, according to an embodiment of the present invention;

FIG. 22 shows GTOs/Thyristors bridge type FCL connected in series with the line, according to an embodiment of the present invention; and

FIG. 23 shows a bypassed thyristors bridge type FCL connected in series with the line, according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention provides phase-controlled IGBT-based and GTO-based bridge-type FCL (see FIG. 1 and FIG. 2). These two topologies are equivalent and have identical operation principles, including operation modes, analytical equations and control. For the convenience, the analytical analysis and all explanations will be provided for IGBT-based topology but all this is identical for the GTO-based topology.

These topologies have two significant advantages over existing FCL topologies. The first advantage of this topology is a precise limitation of the fault currents to the desired values. Furthermore, the proposed FCL can keep the value of the limited fault current constant despite the dynamic behavior of the fault current. The second advantage is reduced power losses (almost zero) during normal operation. This is due to bypassing of the reactor by bi-directional switches S1, S4 during normal operation. Therefore, the only power losses that FCL has during normal operation, may develop on internal conduction resistance of the IGBTs (R_{DS_ON}). This resistance is very small, so that the power losses are negligible.

The present invention also provides a theoretical analysis of the proposed FCL, for normal and fault operation modes, under continuous and discontinuous conduction modes. The analysis covered a wide range of all possible turn-on and turn-off angles.

The phase-control unit uses the presented analytical equations to calculate optimal turn-on and turn-off angles of the switches.

The supply V_in(t)=√{square root over (2)}V_m sin ωt feeds the circuit. According to an embodiment of the invention, an FCL 10 consists of a power circuit and a controller 11 (the controller may interchangeably refer herein also as a control unit). The power circuit comprises a reactor L_DC (indicated by numeral 12), dumping resistor R_D (21), two bi-directional switches S1, S4 (e.g., each bi-directional switch is constructed by a pair of series back-to-back connected IGBTs with parallel diodes, as by 1A, 1B for S1 and by 4A, 4B for S4), two unidirectional switches S2, S3 comprised of IGBT 2′, 3′ series-connected diode S2″, S3″, correspondingly and shunt capacitor (22) and shunt resistor (23). Controller 11 receives measured line voltage and current, calculates the turn-on and turn-off angles, and generates firing signals for IGBTs. The parameters of the simulated system are summarized in Table 1 below.

TABLE 1
System parameter values used in accompanying simulations
	Parameter	Value	Units
	Supply voltage, Vin	22	kV
	Reactance, LDC	40	mH
	Reactor resistance, RDC	0.1	Ω
	Dumping resistance, RD	0.5	Ω
	Line impedance, Zline	0	Ω
	Base frequency, ω	100π	rad/s
	Load impedance, ZLoad	100 + jπ	Ω
	IGBT forward voltage drop, VTF	1	V
	Shunt capacitance, Csh	10	uF
	Shunt resistance, Rsh	10	Ω

Normal Operation Analysis

The FCL 10 should not affect the power system during the normal operation, i.e., when the line currents are below maximum allowable values that are defined by the parameters of the power system. The use of bi-directional IGBT switches allows bypassing the FCL 10 during normal operation, so that the power system operates as if there is no FCL 10 in the power line. In this case, for linear loads, the obtained line currents will be continuous and sinusoidal. In order to bypass the FCL 10, two bi-directional switches are simultaneously turned on at the beginning of the normal operation, and their conducting state is preserved until the normal operation mode ends. As a result, the current that flows through the reactor L_DC is zero, and the line current that enters, flows through switches S₁, S₄ (as shown in FIG. 3).

The voltages of the power system presented in FIG. 1 during normal operation can be described by the following equation 1:

$\begin{array}{cc}{V}_{\mathrm{in}}=\left(R_{\mathrm{line}}+R_{\mathrm{Load}}\right)i_{\mathrm{load}}+\left(L_{\mathrm{line}}+L_{\mathrm{Load}}\right)\frac{d{i}_{\mathrm{load}}}{dt}+2V_{\mathrm{SF}},& \left(1\right)\end{array}$

where V_SF is the voltage drop across the bi-directional switch. FIG. 3 shows that one IGBT and one parallel reversed diode are conducting during the conduction of each bi-directional switch. Therefore, the V_SF voltage drop is the sum of IGBT′ (V_IF.) and diode′ (V_DF) voltage drops V_SF=V_IF+V_DF.

The impedance of the circuit Z_N consists of line and load impedances and can be calculated by

$\begin{array}{cc}❘Z_N❘=\sqrt{{\left(R_{\mathrm{line}}+R_{Load}\right)}^2+{\left(X_{\mathrm{line}}+X_{Load}\right)}^2},& \left(2\right)\end{array}$ ${\theta }_N=t{g}^{-1}\frac{\omega \left(L_{line}+L_{\mathrm{Load}}\right)}{R_{\mathrm{line}}+R_{\mathrm{Load}}},$

where |Z_N| is the modulus and θ_N is the angle of the circuit impedance.

The line current during normal operation can be calculated by

$\begin{array}{cc}{i}_{\mathrm{line}}\left(t\right)=e^{\frac{-\left(R_{\mathrm{line}}+R_{\mathrm{Load}}\right)}{L_{\mathrm{line}}+L_{\mathrm{Load}}}\left(t-t_{I.C.}\right)}\left[i_{\mathrm{line}\left(I.C.\right)}-\frac{\sqrt{2}V}{❘Z_N❘}\sin \left(\omega t_{I.C}-{\theta }_N\right)+\frac{2V_{\mathrm{SF}}}{R_{\mathrm{line}}+R_{\mathrm{Load}}}\right]+\frac{\sqrt{2}V}{❘Z_N❘}\sin \left(\omega t-{\theta }_N\right)-\frac{2V_{\mathrm{SF}}}{R_{\mathrm{line}}+R_{\mathrm{Load}}},& \left(3\right)\end{array}$

where i_line(I.C.) is the initial condition of the line current and t_(I.C.) is the initial condition time point.

FIG. 4 shows simulated line and bypass currents. In the presented case, the initial conditions are zero.

Fault Operation Analysis

The main purpose of the FCL is to limit fault currents during fault operation, when the line current exceeds its maximum allowable value, for example, during short-circuit currents. When short-circuit currents occur in the power system shown in FIG. 1, the load impedance is in parallel with the short circuit impedance Z_F=R_F jωL_F. The IGBT bridge type FCL can limit short-circuit currents by the L_DC reactor impedance, and by controlling the IGBTs' gating signals. The controller defines turn on angle α and turn off angle β of the IGBTs' gating signals, which are synchronized to the line voltage. FIG. 5 shows an example of a gating signal.

There are several possible ranges of turn-on and turn-off angles. Different ranges may result in different waveforms, amplitudes, and conduction modes (continuous conduction mode (CCM) and Discontinuous Conduction Mode (DCM). All possible ranges are thoroughly discussed and analyzed hereinafter.

0<α<180°;α<β<α+180°−DCM  A.

For this range of turn-on and turn-off angles, the FCL 10 operates in DCM. Switches S₁, S₃ are conducting during a positive half-cycle (the path of the line current in the positive half-cycle is indicated by the dotted lines 22 in FIG. 3) and switches S₂, S₄ are conducting during a negative half-cycle (the path of the line current in the negative half-cycle is indicated by the dotted lines 21 in FIG. 3). FIG. 6A shows the path of the currents during positive and negative half-cycles, which is flows through the line impedance, corresponding pair of bi-directional switches, reactor L_DC, shunt capacitor and resistor, and fault impedance Z_F, in parallel with the load. In this figure, the path of the line current in the positive half-cycle is indicated by the dotted lines 32, and the path of the line current in the negative half-cycle is indicated by the dotted lines 31.

During each half period, when the corresponding pair of the bi-directional switches are turned off at angle β, the line current falls to zero and remains zero until the other pair of switches is turned on in the following half-cycle. In order to avoid the abrupt disconnection of the reactor that will result in a high voltage spike across the reactor, according to

$V_L=L\frac{di}{\mathrm{dt}},$

reactor 12 should be short-circuited during the period when the line current is zero. Reactor 12 is short-circuited by turning switches S₁, S₂ on, as shown in FIG. 6B and as indicated by the path formed by dotted line 41.

FIG. 7 shows a simulation example where normal operation mode ends, and fault operation mode begins at time point 0.04 s. During the fault operation mode, the turn-on angle of the gating signals is set to α=20% and turn-off angle is set to β=168°. When the fault appears, the impedance of the power system changes from Z_N to Z_SC that can be described by

$\begin{array}{cc}{Z}_{\mathrm{SC}}=R_{\mathrm{line}}+{\mathrm{jX}}_{\mathrm{line}}+\frac{j{X}_{L_{DC}}+R_{sh}-j{X}_{C_{\mathrm{sh}}}}{j{X}_{L_{\mathrm{DC}}}\left(R_{\mathrm{sh}}-j{X}_{C_{\mathrm{sh}}}\right)}+\frac{\left(R_F+j{X}_F\right)\left(R_{\mathrm{Load}}+j{X}_{\mathrm{Load}}\right)}{\left(R_F+R_{\mathrm{Load}}\right)+j\left(X_F+{\mathrm{jX}}_{\mathrm{Load}}\right)}=R_{\mathrm{SC}}+j{X}_{\mathrm{SC}},& \left(4\right)\end{array}$ $\mathrm{where}$ $❘Z_{\mathrm{SC}}❘=\sqrt{R_{\mathrm{SC}}^2+X_{SC}^2}\mathrm{and}{\theta }_{\mathrm{SC}}=\mathrm{arc}\mathrm{tg}\frac{X_{\mathrm{SC}}}{R_{\mathrm{SC}}}.$

The resultant short circuit current i_SC can be calculated by

$\begin{array}{cc}{i}_{\mathrm{SC}}\left(t\right)=e^{-\frac{R_{\mathrm{SC}}}{X_{\mathrm{SC}}/\omega }\left(t-t_0\right)}\left[\frac{2V_{\mathrm{SF}}}{R_{\mathrm{SC}}}-\frac{\sqrt{2}{V}_m\sin (\left(\omega t_0-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}-\frac{2V_{\mathrm{SF}}}{R_{\mathrm{SC}}}+i_{C_{\mathrm{sh}}},& \left(5\right)\end{array}$

where t₀ is the initial condition time point, i.e., at t₀, the corresponding pair of bi-directional switches start conducting and i_Csh is the current that flows through shunt capacitor and resistor. The value of i_Csh is negligible compared to the bridge current.

FIG. 8 shows a graph of zoom in on one cycle of the simulated current through the bridge, switches and reactor; The fault operation mode begins at 0.04 s;α=20° and β=168°.

0<α<α′;(α+π)<β<(α′+π)−CCM  B.

This range can be divided into two periods. During the first period, the reactor is charged through corresponding pair of switches-charging mode. In the second period, there is an overlapping of two gating signals so that all four switches are conducting-freewheeling mode. These periods are demonstrated in the simulation example shown at FIG. 9, where the short circuit current begins at time point 0.04 s, and the turn-on angle of the gating signals is set to α=10′, while the turn-off angle is set to β=197′. The switches, reactor and short circuit currents zoomed in within one mains cycle are shown in the graphs of FIG. 10. In this figure, the current through switches S1 and S3 is indicated by numeral 51 in the upper graph, and the current through switches S2 and S4 is indicated by numeral 52 in the upper graph. The short circuit bridge current current is indicated by numeral 53 in the lower graph, and the reactor current is indicated by numeral 54 in the lower graph.

$t_2<t<\left(t_1+\frac{\pi }{\omega }\right)-\mathrm{reactor}\mathrm{charging}\mathrm{mode}$

In this mode, the reactor is charged by the short circuit current. During the positive half-cycle of the short-circuit current, switches S₁, S₃ are conducting while switches S₂, S₄ are OFF. During the negative half-cycle, the next charging mode will start at a time point

$t_2+\frac{\pi }{\omega },$

where switches S₂, S₄ are conducting while S₁, S₃ are OFF. This charging operation mode was already described in FIGS. 6A and B. The short circuit current i_{SC1_ch}(t) can be described by

$\begin{array}{cc}{i}_{\mathrm{SC}1\_\mathrm{ch}}\left(t\right)=e^{-\frac{R_{\mathrm{SC}}}{X_{\mathrm{SC}}/\omega }\left(t-t_2\right)}\left[i_{\mathrm{SC}1\_\mathrm{ch}\left(I.C.\right)}-\frac{\sqrt{2}{V}_m\sin \left(\omega t_2-{\theta }_{\mathrm{SC}}\right)}{❘Z_{\mathrm{SC}}❘}+\frac{2V_{\mathrm{SF}}}{R_{\mathrm{SC}}}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t-{\theta }_{\mathrm{SC}}\right)}{❘Z_{\mathrm{SC}}❘}-\frac{2V_{\mathrm{SF}}}{R_{\mathrm{SC}}}+i_{C_{\mathrm{sh}}},& \left(6\right)\end{array}$

where i_{SC1_ch(I.C.)} is the initial condition of the short-circuit current during charging mode.

t₁<t<t₂—Freewheeling Mode

FIG. 11 shows the operation principle of the FCL 10 in the freewheeling mode. Due to the overlapping of two gating signals, all four switches S1-S4 are conducting. As a result, previously charged reactor L_DC freewheels and discharges through all four switches S1-S4. During this time period, the current through switches S₁, S₃ increases while the current through switches S₂, S₄ decreases. The freewheeling mode ends at a time point t₂, when the switches S₂, S₄ are turned off. In this figure, the path of the line current in the positive half-cycle is indicated by the dotted lines 62, the path of the line current in the negative half-cycle is indicated by the dotted lines 61 and the path of the freewheeling current is indicated by the dotted lines 63 as formed by the pattern “_._”.

The total impedance in the freewheeling mode is given by

$\begin{array}{cc}{Z}_{\mathrm{SC}1}=R_{\mathrm{line}}+{\mathrm{jX}}_{\mathrm{line}}+\frac{\left(R_F+{\mathrm{jX}}_F\right)\left(R_{\mathrm{Load}}+{\mathrm{jX}}_{\mathrm{Load}}\right)}{\left(R_F+R_{\mathrm{Load}}\right)+j\left(X_F+{\mathrm{jX}}_{\mathrm{Load}}\right)}=R_{\mathrm{SC}1}+{\mathrm{jX}}_{\mathrm{SC}1},& \left(7\right)\end{array}$ $\mathrm{where}$ $❘Z_{\mathrm{SC}1}❘=\sqrt{R_{\mathrm{SC}1}^2+X_{\mathrm{SC}1}^2}\mathrm{and}{\theta }_{\mathrm{SC}1}=\mathrm{arc}\mathrm{tg}\frac{X_{{\mathrm{SC}}_1}}{R_{{\mathrm{SC}}_1}}.$

The short-circuit current i_{SC1_fw}(t) during the freewheeling mode can be calculated by

$\begin{array}{cc}{i}_{\mathrm{SC}1\_\mathrm{fw}}\left(t\right)=e^{-\frac{R_{\mathrm{SC}}}{X_{{\mathrm{SC}}_1}/\omega }\left(t-t_1\right)}\left[i_{\mathrm{SC}1\_\mathrm{fw}\left(I.C.\right)}-\frac{\sqrt{2}{V}_m\sin \left(\omega t_1-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{{\mathrm{SC}}_1}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{{\mathrm{SC}}_1}❘},& \left(8\right)\end{array}$

where i_{SC1_fw(I.C.)} is the initial condition of the short circuit current during the freewheeling mode. The freewheeling reactor current i_LDC(t) is calculated by

$\begin{array}{cc}{i}_{\mathrm{LDC}}\left(t\right)=i_{\mathrm{SC}\mathrm{1\_}\mathrm{ch}}\left(t_1\right)-\frac{2V_{SF}}{L_{\mathrm{DC}}}t.& \left(9\right)\end{array}$

Initial Conditions

The initial condition of the short circuit charging current equals to the reactor current at time point t₂,

$\begin{array}{cc}{i}_{\mathrm{SC}\mathrm{1\_}\mathrm{ch}\left(I.C.\right)}=i_{\mathrm{SC}\mathrm{1\_}\mathrm{ch}}\left(t_1\right)-\frac{2V_{SF}}{L_{\mathrm{DC}}}{t}_2.& \left(10\right)\end{array}$

Time point t₂ can be calculated by the solution of eq. (11)

$\begin{array}{cc}{i}_{\mathrm{SC}1\_\mathrm{ch}}\left(t_1\right)-\frac{2V_{\mathrm{SF}}}{L_{\mathrm{DC}}}{t}_2=e^{-\frac{R_{{\mathrm{SC}}_1}}{X_{{\mathrm{SC}}_1}/\omega }\left(t_2-t_1\right)}\left[i_{\mathrm{SC}1\_\mathrm{fw}\left(I.C.\right)}-\frac{\sqrt{2}{V}_m\sin \left(\omega t_1-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{{\mathrm{SC}}_1}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t_2-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{{\mathrm{SC}}_1}❘}.& \left(11\right)\end{array}$

Time point t₁ can be calculated by

$\begin{array}{cc}{t}_1=\frac{{\theta }_{\mathrm{SC}}+\alpha +\pi n}{\omega },& \left(12\right)\end{array}$

where n is the number of the half cycle of the supply voltage to which the firing angle α is synchronized.

The initial condition of the freewheeling short circuit current i_{SC1_fw(I.C.)} appears at time point t₁ and can be calculated by

$\begin{array}{cc}{i}_{\mathrm{SC}\mathrm{1\_}\mathrm{fw}\left(I.C.\right)}=i_{\mathrm{SC}1\_\mathrm{fw}}\left(t_1\right)=e^{-\frac{R_{{\mathrm{SC}}_1}}{{{X_{{\mathrm{SC}}_1}/\omega }^{}}_{}}\left(t_1\frac{{\theta }_{\mathrm{SC}}+\pi n}{\omega }\right)}\left[-\frac{\sqrt{2}{V}_m\sin \left({\theta }_{\mathrm{SC}}+\pi n-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{{\mathrm{SC}}_1}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t_1-{\theta }_{S{C}_1}\right)}{❘Z_{S{C}_1}❘}.& \left(13\right)\end{array}$

Calculation of Angle α′:

As shown before, if the turn-on angle will be higher than α′, the freewheeling mode will not exist, and only charging modes will be present. The angle α′ corresponds to time point t_α′. When α=α′, the |i_SC1(t_α′)|=|i_SC(t_α′)|. This can be extended to

$$\begin{gathered} \begin{array}{cc}\left|e^{-\frac{R_{S{C}_1}}{X_{{\mathrm{SC}}_1}/\omega }\left(t_{{\alpha }^{\prime }-}{t}_1\right)}\left[i_{\mathrm{SC}1\_\mathrm{fw}\left(I.C.\right)}-\frac{\sqrt{2}{V}_m\sin \left(\omega t_1-{\theta }_{{\mathrm{SC}}_1}\right)}{❘Z_{S{C}_1}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left(\omega t_{{\alpha }^{\prime }}-{\theta }_{S{C}_1}\right)}{\left|Z_{{\mathrm{SC}}_1}\right|}\right|=\text{ \\ |e-RSCXSC/ω⁢(t1-t2+πω)[iLDC(tf⁢1)+2⁢VSFRSC-2⁢Vm⁢sin⁢(ω⁡(t2-πω)-θs⁢c)❘"[LeftBracketingBar]"ZSC❘"[RightBracketingBar]"]+2⁢Vm⁢sin⁢(ω⁢t1-θSC)❘"[LeftBracketingBar]"ZS⁢C❘"[RightBracketingBar]"-2⁢VSFRSC|.}& \left(14\right)\end{array} \end{gathered}$$

The value of t_α, can be obtained numerically from (14).

The angle α_X can be calculated from

$\begin{array}{cc}{\alpha }^{\prime }=\frac{\pi }{T}{t}_{{\alpha }^{\prime }}+\pi n,& \left(15\right)\end{array}$

where n is the number of the corresponding half cycle of the main supply voltage.

0<α<α′;(α′+π)<β<(α′+2π)−CCM  C.

This range can also be divided into charging (t₁<t<t₂) and freewheeling (t₂<t<t₁+π/ω) periods. The short circuit current during charging operation mode is described by equation (6) and its initial condition by equation (10). However, due to the extended turn-off angle (α′+π)<β, the freewheeling period will be longer than in section B below. As a result, the short-circuit current during freewheeling mode will reach a higher peak value than in previous ranges discussed herein before. This peak value is a function of the turn-off angle β—a larger turn-off angle will result in a higher short circuit current peak value.

The short-circuit current during freewheeling operation mode is described by equations (7-9) and its initial condition by equation (13). FIG. 12 shows an example of simulated switches and short-circuit current with turn-on angle of the gating signals set to α=10° and the turn-off angle is set to β=262°.

α′<α<α_cr;(α+π)<β<(α′+π)−CCM  D.

In this range of gating angles, both charging and freewheeling modes are present. FIG. 13 shows an example of simulated switches and short circuit current with turn-on angle of the gating signals set to α=40° and the turn-off angle is set to β=227°.

The freewheeling mode (t₁<t<t₂) begins after time point t_α′. The length of the freewheeling mode is defined by the value of the turn-off angle β. Like in the previous case discussed in section B herein above, the peak value of the short circuit current in freewheeling mode is a function of β. The freewheeling short circuit current can be calculated by (8-9) and its initial condition by equation (13). The short-circuit current in charging mode

$\left(t_2<t<t_1+\frac{\pi }{\omega }\right)$

behaves according to the previously developed equation (6) and its initial condition by equation (10).

α_cr<α<π;α_cr<β<(α_cr+π)−DCM  E.

When the turn-on angle α will be higher than the critical angle α_cr, the FCL will operate in DCM mode. The example shown in FIG. 14 demonstrates that when IGBTs are turned on at the critical angle of 72°, the short circuit current in charging mode will initially charge the reactor L_DC and afterwards, discharge it to zero at a time point t_cr. The duration of the positive and negative half cycles of the short-circuit current is π.

The value of α_cr can be calculated by

$\begin{array}{cc}{\alpha }_{cr}=\frac{\pi }{T}{t}_{cr}-\pi n,& \left(15\right)\end{array}$

where t_cr is the time point that corresponds to the angle α_cr+π.

The angle α_cr can be calculated from

$\begin{array}{cc}{i}_{\mathrm{SC}}\left(t_{cr}\right)=e^{-\frac{R_{\mathrm{SC}}}{X_{\mathrm{SC}/\omega }}\left(t_{\mathrm{cr}}-\left(t_{\mathrm{cr}}-\pi /\omega \right)\right)}\left[\frac{2V_{\mathrm{SF}}}{R_{\mathrm{SC}}}-\frac{\sqrt{2}{V}_m\sin \left({\alpha }_{cr}-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left({\alpha }_{cr}-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}-\frac{2V_{SF}}{R_{\mathrm{SC}}}=0,& \left(16\right)\end{array}$

that is simplified to

$\begin{array}{cc}{e}^{-\frac{R_{\mathrm{SC}}}{X_{\mathrm{SC}}}\pi }\left[\frac{2V_{SF}}{R_{\mathrm{SC}}}-\frac{\sqrt{2}{V}_m\sin \left({\alpha }_{cr}-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}\right]+\frac{\sqrt{2}{V}_m\sin \left({\alpha }_{cr}-{\theta }_{SC}\right)}{❘Z_{\mathrm{SC}}❘}-\frac{2V_{SF}}{R_{\mathrm{SC}}}=0.& \left(17\right)\end{array}$

FIG. 15 shows an example where IGBTs turn-on angle is higher than the critical angle α=100°>α_cr and IGBTs are turned off long after the short circuit current elapses β=255°.

Comparison of the Proposed Phase Control Approach with Existing Solutions

In this chapter, the proposed phase-controlled FCL is compared to other types of non-superconducting FCLs. The comparison focuses on Series Dynamic Braking Resistor (SDBR) and conventional diode bridge type FCLs. The comparison is based on the line current's Root Mean Square (RMS) value because each FCL provides different waveforms of the limited current.

A principal scheme of SDBR 70 is shown in FIG. 16A. According to an embodiment of the invention, SDBR 70 comprises a control 71, a switch 72, and a braking resistor 72. During normal operation, the switch 72 is closed, and the braking resistor 73 is bypassed. During fault operation, the switch 72 is opened, and the braking resistor 73 limits the fault current.

FIG. 16B shows the conventional bridge type FCL, which is comprised of diodes bridge (diodes D1-D4 from the bridge) and inductor L_d with small internal resistance R_d. During normal operation, the inductor is charged to the peak value of the line current and does not affect the system except small voltage drop and power losses across the R_d resistance. During fault operation, the fault current is limited by the impedance of the inductor L_d.

In order to compare the proposed phase-controlled FCL to SDBR and conventional diode bridge type FCLs, they are simulated under similar conditions-they have similar supply voltage, load, and short circuit impedance. The simulation parameters of the proposed phase-controlled FCL are detailed in Table 1 hereinabove. The diode bridge FCL reactor inductance and resistance are similar to the phase-controlled FCL reactor. The value of the SDBR breaking resistor was chosen to be 2.25Ω in order to ensure similar RMS values of the short circuit current for SDBR and the proposed phase-controlled FCL.

FIG. 17 shows a comparison of simulated line currents without FCL, standard diode bridge Fa, SDBR, and proposed phase-controlled FCL, under normal and fault conditions. The operation is normal until the time point of 0.04 sec. After 0.04 sec, the fault operation begins.

In modern networks, there is a massive integration of distributed generation and renewable energy sources. The output power of the renewable energy sources depends on varying parameters such as solar irradiance (for PV) and wind speed (for wind turbine). Therefore, the amplitude of the short circuit current may change during the fault state. This issue is also considered in the comparison example—at the time point of 0.12 sec, the fault current increases by 20%.

During the time period between 0.04 sec to 0.12 sec, turn on and off angles of the proposed FCL are set to α=40°, β=94°. For these settings, the proposed FCL and SDBR both limit the fault current from 2160 A (RMS) to 1410 A (RMS). The diode bridge FCL limits only the first few cycles of the fault current and afterwards (in the steady-state), while the RMS value of the fault current is 2160 A, similar to the value of the fault current obtained without FCL. After a time point of 0.12 sec, the unlimited short circuit current increases from 2160 A to 2592 A (RMS). As a result, the steady-state fault current of the diode bridge FCL also increases to 2592 A. Because the resistance of the braking resistor is constant (2.25Ω), the RMS value of the SDBR limited fault current jumps from 1410 A to 1690 A. Unlike SDBR and diode bridge FCL, the proposed FCL can keep the limited fault current constant despite the variations in short circuit current. This is achieved by decreasing the turn-off angle to β=83°. The turn-on angle remains unchanged α=40°. Therefore, the proposed FCL is better suited to the dynamic behavior of the fault currents than other conventional types of FCLs.

According to some embodiments of the invention, additional two semi-passive FCL topologies are presented in FIGS. 18 and 19. FIG. 18 presents IGBT/semi-passive topology. This topology reminds IGBT topology of FIG. 1. The difference between this topology and the circuit shown in FIG. 1 is the switch S3 that replaced by the diode 81 instead of IGBT in series with diode. The second GTO/semi-passive type topology is presented in FIG. 19.

These two topologies are equivalent and they have the same operation and control principles. The advantage of these two topologies is simpler structure which allows reduction of FCL's price. Their control and operation modes are very similar two IGBT and GTO based topologies shown in FIGS. 1 and 2.

According to some embodiments of the invention, additional eight IGBTs (four switches) bridge topology is presented in FIG. 20. This topology is almost similar to the topology shown in FIG. 1 with only difference that switches S2 and S3 are also obtained by pair of IGBTs instead of IGBT and diode. The advantages of this topology are higher flexibility of switching and division of normal current into two paths instead of one, which allows reduction of IGBTs nominal voltage rates.

According to some embodiments of the invention, additional IGBTs/Thyristors bridge topology is presented in FIG. 21. This topology is almost similar to the topology shown in FIG. 1 with only difference that switches S2 and S3 are obtained by thyristors instead of IGBT and diode. The advantage of this topology is the lower price.

According to some embodiments of the invention, additional GTOs/Thyristors bridge topology is presented in FIG. 22. This topology is almost similar to the topology shown in FIG. 2 with only difference that switches S2 and S3 are obtained by thyristors instead of GTOs. The advantage of this topology is the lower price.

According to some embodiments of the invention, additional bypassed thyristors bridge topology is presented in FIG. 23. In this topology, during normal operation, the bridge is bypassed by bi-directional IGBT switch S_BP. During fault operation, the bypass switch opens and the FCL can operate in operate only on modes B and E. The advantage of this topology is a lower price.

Control Unit

The control unit (i.e., such as control 11 of FIGS. 1 and 2) of the proposed bridge-type FCLs has to be able to detect transition between normal and fault operation modes, to calculate corresponding turn-on and turn-off angles of the IGBTs/GTOs, and to convert these angles into IGBTs/GTOs gating signals. The operation principle of the control unit is described below.

A process of the control unit's algorithm, may involve the followings steps:

• • 1. Input nominal current value i_nom (current below this value is considered normal).
  • 2. Input current value limited by FCL i_{lim_FCL} (the short circuit current will be limited to this value).
  • 3. Measure voltage V_line and current i_line at the input of FCL. (FCL constantly measures voltage and current at the FCL's terminals, as show in FIG. 1)
  • 4. Check if i_line>i_nom=?{No-Go to step 3.}
    • {Yes—
    • 5. Calculate the rising rate of the current.
    • 6. Calculate the maximum value of the expected short circuit current.
    • 7. Calculate turn on and turn off angles α, β that will limit the current to the value
    • i_{lim_FCL}. This step is implemented by using previously presented analytical equations.
  • 8. Generate synchronized gating signals for switches.
  • 9. Measure current i_line at the input of FCL.
  • 10. Check if i_line>i_{lim_FCL}=?{Yes—
    • This means that the conditions of fault are changing. Go to step 5.}
    • {No—
    • 11. Check if i>i_nom=? {Yes—Go to step 9.}
    • {No—The short circuit has ended. Go to step 3.}}

As will be appreciated by a person skilled in the art, the presented control unit is used in all presented FCL topologies.

All the above description and examples have been given for the purpose of illustration and are not intended to limit the invention in any way. Many different electronic and logical elements can be employed, all without exceeding the scope of the invention.

Claims

1. An IGBT and GTO bridge type Fault Current Limiters (FCLs) located between a power source and a load, comprising: a) a power circuit, constructed from topology of two bi-directional S1, S4 and two unidirectional fully controlled switches S2, S3, connected in a bridge form and a non-superconducting reactor being installed inside said bridge and having internal resistance RDC in series with damping resistor RD and in parallel to a bridge installed shunt capacitor Csh and shunt resistor Rsh; andb) a controller with precise phase control circuit for limiting the fault current to the desired value by: b1) calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;b2) converting the calculated turn ON and OFF angles to gating signals; andb3) supplying the gating signals to the switches.

2. The IGBT and GTO bridge type fault current limiter (FCL) according to claim 1, in which the reactor operates in a charging mode, during which the positive or negative current flows through the transmission line, corresponding pair of switches, reactor LDC, and the load, where at the end of the charging mode, the reactor is charged to the maximum absolute value of the line current.

3. The IGBT and GTO bridge type fault current limiter (FCL) according to claim 1, in which the topology is assembled from Mosfets or IGCTs, or Thyristors based switches.

4. The IGBT and GTO bridge type fault current limiter (FCL) according to claim 1, in which the bidirectional switches allow bypassing said FCL during normal operation by simultaneously turning them on at the beginning of the normal operation and their conducting state is preserved until the normal operation mode ends, such that the current that flows through reactor LDC is zero and the line current flows through switches S1, S4.

5. The IGBT and GTO bridge type Fault Current Limiter (FCL) according to claim 1, in which the reactor operates in a freewheeling mode following the charging mode, during which the polarity of the voltage drop on the reactor is reversed.

6. An IGBT/semi-passive and GTO/semi-passive bridge type Fault Current Limiters (FCLs) located between a power source and a load, comprising: a) a power circuit, constructed from two bi-directional fully controlled bidirectional switches S1, S4, one fully controlled unidirectional switch S2, and one diode switch S3, connected in a form of bridge, wherein a non-superconducting reactor is installed inside said bridge and having internal resistance RDC in series with damping resistor RD and in parallel to a bridge installed shunt capacitor Csh and shunt resistor Rsh; andb) a controller with precise phase control circuit for limiting the fault current to the desired value by: b1) calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;b2) converting the calculated turn on and off angles to gating signals; andb3) supplying the gating signals to the switches.

7. The IGBT/semi-passive and GTO/semi-passive bridge type Fault Current Limiters (FCLs) according to claim 6, in which the bidirectional switches allow bypassing said FCL during normal operation by simultaneously turning them on at the beginning of the normal operation and their conducting state is preserved until the normal operation mode ends, such that the current that flows through reactor LDC is zero and the line current flows through switches S1, S4.

8. The IGBT/semi-passive and GTO/semi-passive bridge type Fault Current Limiters (FCLs) according to claim 6, in which the reactor operates in a freewheeling mode following the charging mode, during which the polarity of the voltage drop on the reactor is reversed.

9. A thyristors bridge with bypass switch Fault Current Limiters (FCLs) located between a power source and a load, comprising: a) a power circuit, constructed from the topology of four thyristors S1-S4 and connected in a bridge form with a bypass switch SBP in parallel, and a non-superconducting reactor being installed inside said bridge and having internal resistance RDC in series with damping resistor RD and in parallel to a bridge installed shunt capacitor Csh and shunt resistor Rsh; andb) a controller with precise phase control circuit for limiting the fault current to the desired value by: b1) calculating turn ON and OFF angles of the switches according to the measured current and voltage and by using the analytical equations presented earlier;b2) converting the calculated turn ON and OFF angles to gating signals; andb3) supplying the gating signals to the switches.