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43 26 062.4 | Aug 1993 | DEX |
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4489342 | Gollinger et al. | Dec 1984 | |
4806804 | O'Leary | Feb 1989 | |
4899070 | Ou et al. | Feb 1990 | |
5036528 | Costantino et al. | Jul 1991 | |
5285483 | Ogawa et al. | Feb 1994 | |
5319680 | Port et al. | Jun 1994 | |
5363419 | Ho | Nov 1994 | |
5375148 | Parker et al. | Dec 1994 |
Number | Date | Country |
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0235303 | Sep 1987 | EPX |
0329418 | Aug 1989 | EPX |
Entry |
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IEEE Journal of Solid-State Circuits, vol. 21, No. 5 Oct. 1988 (Johnson et al.) pp. 1218-1223, "A Variable Delay Line PLL for CPU-Coprocessor Synchronization". |
Australian Patent Abstract No. AU-A-24503/84, Backes et al., Aug. 23, 1984. |