Claims
- 1. A circuit for stripping a synchronizing component from a composite video signal, the circuit comprising:a phase-locked loop comprising: a clock which runs at 10 MHz, phase-locked with a leading edge of a video sync signal, the video sync signal is incorporated into the composite video signal; and a signal generating means that outputs a signal which begins one clock oscillation period before the leading edge of the video sync signal is detected and ends approximately 50 clock oscillation periods after a trailing edge of the video sync signal is detected; and an analog switch comprising a switchable input operational amplifier controlled by said signal for switching the blank level voltage onto the composite video signal.
- 2. A circuit for stripping a synchronization component from a composite video signal, the circuit comprising:a phase-locked loop comprising: a 10 MHZ clock phase-locked with a leading edge of a video sync signal; and a signal generating means that outputs a signal that encompasses the video sync signal, said signal begins one clock oscillation period before the leading edge of the video sync and ends approximately 50 clock oscillation thereafter; and an analog switch comprising a switchable input operational amplifier controlled by said signal for switching a blank level voltage onto the composite video signal.
GOVERNMENT RIGHTS
The U.S. Government has a paid-up license in this invention and the right in limited circumstances to require the patent owner to license others on reasonable terms as provided for by the terms of Contract No. F33657-89-C-0009 awarded by the Department of the Air Force.
US Referenced Citations (10)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0219273 |
Sep 1988 |
JP |
0192971 |
Jul 1992 |
JP |