This application claims the benefit of Taiwan application Serial No. 106140779, filed on Nov. 23, 2017, and Taiwan application Serial No. 107106736, file on Mar. 1, 2018, the subjects matter of which are incorporated herein by reference.
The invention relates to a phase recovery device and a phase recovery method, and more particularly to a phase recovery device and a phase recovery method capable of accurately estimating a phase error.
In general, a phase recovery device at a receiving terminal of a digital communication system performs phase error detection (PED) on a received signal, and performs phase compensation on the received signal according to the estimated phase error to output a phase recovered signal, so as to reduce a symbol error rate (SER) or a bit error rate (BER) of the receiving terminal to improve system performance.
However, in the prior art, a phase recovery device performs only one-time phase recovery, and a phase recovered signal outputted therefrom still contains a residual phase error.
Therefore, it is a primary object of the present invention to provide a phase recovery device and a phase recovery method capable of reducing a residual phase error to improve issues of the prior art.
A phase recovery device is disclosed according to an embodiment of the present invention. The phase recovery device includes: a phase recovery module, performing a first-stage phase recovery on a received signal to generate a first phase recovered signal; and a residual phase recovery module, performing a second-stage phase recovery on the first phase recovered signal to generate a second phase recovered signal.
A phase recovery method is further disclosed according to an embodiment of the present invention. The phase recovery method includes: performing a first-stage phase recovery on a received signal to generate a first phase recovered signal; and performing a second-stage phase recovery on the first phase recovered signal to generate a second phase recovered signal.
The above and other aspects of the invention will become better understood with regard to the following detailed description of the non-limiting embodiments. The following description is made with reference to the accompanying drawings.
In one embodiment, the multiple phase errors x are a linear combination of the multiple pilot phase errors θ. More specifically, again referring to
In one embodiment, the residual phase recovery device 12 may perform preliminary phase estimation on multiple first phase recovered signals q1 by using a phase error detector (PED) having a simple circuit structure or a low computation complexity, and then statistically calculate the results of the preliminary phase estimation to generate multiple residual phase errors. More specifically,
In one embodiment, the residual phase estimator 16 may perform principle component analysis (PCA) on the phase error g; that is, the residual phase estimator 16 calculates one or more eigenbases most significant in an eigen space associated with the phase error g and one or more corresponding eigenvalues, and constructs the residual phase error p according to the one or more most significant eigenbases and eigenvalues.
The characteristics unit 162 calculates at least one eigenbasis δ associated with the phase error average vector y and at least one eigengain G corresponding to the at least one eigenbasis δ, wherein the at least one eigengain G is each associated with at least one eigenvalue λ corresponding to the at least one eigenbasis δ. It should be noted that, the characteristics unit 162 implements a pre-processing phase (also referred to as a training phase or a learning phase) of the phase recovery method 20 to calculate the eigenbasis δ and the eigengain G in advance.
yjyjH according to the phase error average vectors y0 to yL of the pre-processing phase, where (·)H represents conjugate transpose. The decomposing unit 1622 performs eigenvalue decomposition (EVD) or singular value decomposition (SVD) on the covariance matrix Ky to generate multiple eigenvectors δ0 to δk-1 and multiple eigenvalues λ0 to λK-1 of the covariance matrix Ky. The selecting unit 1624 selects n eigenvalues from the multiple eigenvalues λ0 to λK-1, and selects n eigenvectors from the multiple eigenvectors δ0 to δK-1 as the eigenbasis δ, wherein the n eigenvectors are the eigenvectors corresponding to the n eigenvalues. Preferably, the n eigenvalues selected by the selecting unit 1624 are n largest eigenvalues among the multiple eigenvalues λ0 to λK-1. The quantity n of eigenvectors selected by the selecting unit 1624 may be adjusted according to actual conditions, where n is any positive integer between 1 and K. Taking n=2 for instance, the selecting unit 1624 selects two largest eigenvalues λ0 and λ1 among the multiple eigenvalues λ0 to λK-1, and selects the eigenvectors δ0 and δ1 corresponding to the eigenvalues λ0 and λ1 as the eigenbasis δ. The gain unit 1626 calculates an eigengain Gk according to the eigenvalue λK. In one embodiment, Gk=λk/(λk+σ2), where σ is a constant associated with noise energy or an SNR, and may be adjusted according to actual conditions. When n=2, the gain unit 1626 outputs the eigengains G0 and G1 corresponding to the eigenvalues λ0 and λ1 as the eigengain G.
The estimating unit 164, coupled to the averaging unit 160 and the characteristics unit 162, calculates the residual phase error p according to the phase error average vector y, the at least one eigenbasis δ and the at least one eigengain G.
In one embodiment, the component unit 1640 includes an inner product unit IP0, a scalar multiplier MPS0 and a vector multiplier MPV0. The inner product unit IP0 calculates an inner product δ0Ty of the phase error average vector y and the eigenbasis δ0. In one embodiment, the inner product unit IP0 includes a multiplier MP0, an adder ADD0 and a register Q0. The multiplier MP0 multiplies the multiple phase error averages y0 to yK-1 in the phase error average vector y sequentially by multiple eigenbasis elements in the eigenbasis δ0. The adder ADD0 and the register Q0 accumulate the sequential multiplication results of the multiple phase error averages y0 to yK-1 and the multiple eigenbasis elements to generate the inner product δ0Ty. The scalar multiplier MPS0 performs a multiplication calculation between a scalar and a scalar, namely, multiplying the inner product δ0Ty by the eigengain G0 to generate a multiplication result G0(δ0Ty). The vector multiplier MPV0 performs a multiplication calculation between a scalar and a vector, namely, multiplying the multiplication result G0(δ0Ty) by the eigenbasis δ0 to generate the component c0, which may be represented as c0=G0(δ0Ty)·δ0. The component unit 1641 has a circuit structure identical to that of the component unit 1640, and associated details are omitted herein. The component unit 1641 may output the component c1, which may be represented as c1=G1(δ1Ty)·δ1. The summing unit ADD3 sums up the components c0 and c1 to output a vector c0+c1, which is the residual phase error p.
In conclusion, in the present invention, a residual phase recovery device is used to perform a second-stage phase recovery on a phase recovered signal outputted by a phase recovery device so as to reduce the residual phase error, thereby lowering an SER or BER and achieving enhanced system performance.
While the invention has been described by way of example and in terms of the embodiments, it is to be understood that the invention is not limited thereto. On the contrary, it is intended to cover various modifications and similar arrangements and procedures, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
Number | Date | Country | Kind |
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106140779 | Nov 2017 | TW | national |
107106736 | Mar 2018 | TW | national |