This application is a translation of and claims the priority benefit of French patent application number 10/60569, filed on Dec. 15, 2010, which is hereby incorporated by reference to the maximum extent allowable by law.
The present invention relates in general to the field of RF transmitters and receivers, and more particularly to phase shifters and methods of phase shifting quadrature components of RF signals.
Amplitude shift keying (ASK) and phase-shift keying (PSK) modulation schemes are based on the transmission and reception of quadrature components, generally labelled I and Q, which are waveforms that are out of phase by 90 degrees and represent data based on their phase. Examples of such schemes include 4-QAM (quadrature amplitude modulation), 8-QAM etc., QPSK (quadrature PSK), 8-PSK, differential PSK and Offset PSK. The transmission of such quadrature components generally involves modulating them by mixing them with an in quadrature carrier frequency signal.
In certain applications, such as in beam-forming applications, an antenna array is provided on the transmitter side for transmitting phase-shifted versions of the modulated signal. In particular, phase shifters are provided for phase-shifting the modulated signal by different amounts for transmission by corresponding antenna.
On the receive side, a plurality of receive antennas is provided, a corresponding phase shift being applied to the signal received from each antenna. Then, after demodulation by mixing with the in quadrature carrier frequency signal, the original quadrature components may be retrieved.
There are difficulties in implementing such QSK or PSK transmission and reception circuits. In particular, while it would be desirable to provide a system supporting high bandwidths, a difficulty occurs with accurately controlling the amplitudes of the transmitted signals, which can easily be distorted by the phase shifters at high frequencies of the modulation signal. Furthermore, it is difficult to precisely control the phase variation or group delay variation across the frequency bandwidth, particularly at high frequencies.
Embodiments of the present invention at least partially address one or more difficulties in the prior art.
According to one aspect of the present invention, phase shifting circuitry is provided for phase shifting at least one of first and second quadrature components of a data signal. The circuitry comprises a first phase shifter adapted to phase shift, by a first phase angle, the first quadrature component by adding together weighted versions of the first and second quadrature components.
According to one embodiment, the phase shifting circuitry further comprises a second phase shifter adapted to phase shift, by the first phase angle, the second quadrature component by adding together weighted versions of the first and second quadrature components.
According to another embodiment, the first and second phase shifters each comprise at least one transistor for converting each of the first and second quadrature components into a current signal, and at least one resistor for adjusting each current signal to apply the weighting.
According to another embodiment, the first phase shifter is adapted to apply a weighting of cosφ to the first quadrature component and a weighting −sinφ to the second quadrature component, and the second phase shifter is adapted to apply a weighting of sinφ to the first quadrature component and a weighting cosφ to the second quadrature component, where φ is the first phase angle.
According to another embodiment, each of the first and second quadrature components is a differential signal comprising first and second differential components. The phase shifted first and second quadrature components each comprise first and second differential components generated based on the following formulas: Iout+=Iin+.cosφ+Qin−.sinφ; Iout−=Iin−.cosφ+Qin+.sinφ; Qout+=Qin+.cosφ+Iin+.sinφ; and Qout−=Qin−.cosφ+Iin−.sinφ.
According to another embodiment, the phase shifting circuitry further comprises a third phase shifter adapted to phase shift, by a second phase angle, the first quadrature component by adding together weighted versions of the first and second quadrature components, and a fourth phase shifter adapted to phase shift, by the second phase angle, the second quadrature component by adding together weighted versions of the first and second quadrature components.
According to another embodiment, each of the first and second quadrature components is a differential signal comprising first and second differential components. The first and second phase shifters each comprise first, second, third and fourth current branches each respectively comprising first, second, third and fourth transistors each coupled between an intermediate node and a corresponding current source. The first and second transistors are respectively controlled by the first and second differential components of the first quadrature component and the third and fourth transistors are respectively controlled by the first and second differential components of the second quadrature component. A first resistor is coupled between the first and second branches and a second resistor is coupled between the third and fourth branches. The resistance values of the first and second resistors determine the weighting values applied to first and second quadrature components respectively.
According to another embodiment, the first and second resistors are variable resistors controllable by a control signal.
According to another embodiment, the first and second resistors of the first phase shifter have resistances of Rcosφ and Rsinφ respectively, and the first and second resistors of the second phase shifter have resistances of Rsinφ and Rcosφ respectively, where R is a constant.
According to another embodiment, the first and second quadrature components represent data modulated based on phase shift keying or amplitude shift keying.
According to another embodiment, the first and second quadrature components represent data modulated based on quadrature phase shift keying.
According to another aspect of the present invention, RF transmission circuitry comprises the above phase shifting circuitry. A first mixer is adapted to multiply the phase shifted first quadrature component by a first carrier frequency signal. A second mixer is adapted to multiply the phase shifted second quadrature component by a second carrier frequency signal. The output of the first and second mixers are summed to provide a first phase shifted signal. An antenna is adapted to transmit the first phase shifted signal.
According to one embodiment, the RF transmission circuitry comprises the above first and second phase shifters, wherein the first mixer is coupled between a supply voltage and the first, second, third and fourth current branches of the first phase shifter. The second mixer is coupled between the supply voltage and the first, second, third and fourth current branches of the second phase shifter.
According to another aspect of the present invention, RF reception circuitry comprises the above phase shifting circuitry. An antenna is adapted to receive a first input signal. A first mixer adapted to multiply the first input signal by a first carrier frequency signal to generate the first quadrature component. A second mixer adapted to multiply the second input signal by a second carrier frequency signal to generate the second quadrature component.
Another aspect of the present invention provides a method of phase shifting at least one of first and second quadrature components of a data signal. The method comprises phase shifting, by a first phase angle, the first quadrature component by adding together weighted versions of the first and second quadrature components.
The foregoing and other purposes, features, aspects and advantages of the invention will become apparent from the following detailed description of embodiments, given by way of illustration and not limitation with reference to the accompanying drawings, in which:
Throughout the following, only features useful for the understanding of the invention will be described in detail. In particular, the systems that could comprise the phase shifter of the present invention have not been described in detail, the embodiments described herein being applicable to a wide range of systems in which quadrature signals are received and/or transmitted. These include systems employing any form of vectorial modulation. Furthermore, while in the following a phase shifter is described in the particular case of phase shifting both the I and Q components for multiple signals, it will be apparent to those skilled in the art that in certain applications such a phase shifter could be used to phase shift just one of the I and Q components of a single signal.
Furthermore, in the following, the term “quadrature components” will be used to designate a pair of wave forms, for example, sinusoids, that are out of phase by 90 degrees. For example, the “Q” component is 90 degrees behind the “I” component, although the contrary could be true. Furthermore, these quadrature components modulate at least one data signal, for example, based on an amplitude shift keying (ASK) or phase shift keying (PSK) modulation scheme.
The term “quadrature phase shift keying” (QPSK) refers to a modulation scheme that not only generates quadrature components, but in which the quadrature components represent a data signal modulated based on four phase values.
The signal on each input line 102 and 104 is filtered by a respective low pass filter 106 and 108, before being supplied to each of a pair of combined phase shifting and mixing modules 110 and 112.
Module 110 comprises phase shifting circuitry 110A and mixing circuitry 110B. The phase shifting circuitry 110A comprises phase shifters 114 and 116, each of which receive both the input signals Iin and Qin, and each introduces a phase shift of φ1. In particular, phase shifter 114 generates a phase-shifted signal Iout1, which corresponds to the quadrature component Iin with a phase delay of φ1, while phase shifter 116 generates a phase-shifted signal Qout1, which corresponds to the quadrature component Qin with a phase delay of φ1. The signals Iout1 and Qout1 are provided to the mixer circuitry 110B, and in particular to mixers 118 and 120 respectively. Mixers 118 and 120 multiply the signals Iout1 and Qout1 by respective carrier frequencies LOi and LOq provided by a frequency synthesizer 119 to generate signals I′out1 and Q′out1 at the output of the module 110. The signals I′out1 and Q′out1 are added together and provided to the input of an amplifier 122, which generates a signal Sout1 for transmission on an antenna 123 of an antenna array.
Similarly, module 112 comprises phase shifting circuitry 112A and mixing circuitry 112B. The phase shifting circuitry comprises phase shifters 124 and 126, which each receive the signals Iin and Qin, and each introduce a phase shift of φ2. In particular, phase shifter 124 generates a phase-shifted signal Iout2, which corresponds to the signal Iin with a phase delay of φ2, while phase shifter 126 generates a phase-shifted signal Qout2, which corresponds to the signal Qin with a phase delay of φ2. The signals Iout2 and Qout2 are provided to mixers 128 and 130 respectively, which multiply these signals by the carrier frequencies LOi and LOq respectively to generate the signals I′out2 and Q′out2 at the output of module 112. The signals I′out2 and Q′out2 are added together and provided to the input of an amplifier 132, which generates a signal Sout2 for transmission on an antenna 133 of an antenna array. Thus Sout2 is phase-shifted with respect to Sout1 by φ2−φ1.
The antenna array for example comprises two antennas. Alternatively, the antenna array could comprise N antennas, where N is, for example, equal to between 2 to several hundred, each antenna n, for n from 1 to N, receiving via a corresponding amplifier a signal Sn generated by a corresponding combined phase shifting and mixing module that introduces a corresponding phase shift φn.
The phase shift angle φ1 introduced by the phase shifters 114, 116, phase shift angle φ2 introduced by the phase shifters 124, 126 and more generally the phase shift angle φn, will depend of the particular application. In one example, φ2=2φ1 and more generally φn=nφ1. However, this is but one example, and in alternative implementations there could be a non-linear progression in the phase shift for each antenna, for example, to provide second order lobe rejection.
In this example, the bits “11” are encoded by in-phase versions of I and Q, the bits “10” are encoded by an in-phase version of I, and a version of Q out of phase by 180 degrees, the bits “00” are encoded by versions of both I and Q out of phase by 180 degrees, and bits “01” are encoded by a version of I out of phase by 180 degrees and an in-phase version of Q. The four constellation points encoding these four 2-bit values fall in a circle, implying that the amplitudes of the I and Q values remain constant.
It will be apparent to these skilled in the art that the embodiments described herein could be applied to a wide range of modulation schemes, including but not limited to 4-QAM, 8-QAM, 16-QAM, 32-QAM, 64-QAM, QPSK, 8-PSK, differential PSK, and Offset PSK.
In alternative embodiments, the values of φ1 and φ2 could be greater than 90°, for example, anywhere up to 360°.
The phase shifters 114 and 116 phase shift each of the differential components Iin+, Iin−, Qin+ and Qin− counter-clockwise in the Argand plane by the angle φ1, and from the diagram of
Iout1+=Iin+.cosφ1+Qin−.sinφ1
Iout1−=Iin−.cosφ1+Qin+.sinφ1
Qout1+=Qin+.cosφ1+Iin+.sinφ1
Qout1−=Qin−.cosφ1+Iin−.sinφ1
Similarly, the phase shifters 124 and 126 phase shift each of the differential components Iin+, Iin−, Qin+ and Qin− anti-clockwise in the Argand plane by the angle φ2, by performing the following calculations:
Iout2+=Iin+.cosφ2+Qin−.sinφ2
Iout2−=Iin−.cosφ2+Qin+.sinφ2
Qout2+=Qin+.cosφ2+Iin+.sinφ2
Qout2−=Qin−.cosφ2+Iin−.sinφ2
Thus, in general, to apply a phase shift of φ, it can be determined that:
Iout=Iin.cosφ−Qin.sinφ and
Qout=Iin.cosφ+Iin.sinφ
Thus, with reference again to
It will be apparent to those skilled in the art that the combined phase shifting and mixing modules 110 and 112 of
The phase shifting circuitry 110A comprises a current branch 402 comprising a transistor 402A and current source 402B coupled in series between an intermediate node 403 and a ground voltage, a current branch 404 comprising a transistor 404A and current source 404B coupled in series between the intermediate node 403 and the ground voltage, a current branch 406 comprising a transistor 406A and current source 406B coupled in series between an intermediate node 407 and the ground voltage, and a current branch 408 comprising a transistor 408A and current source 408B coupled in series between the intermediate node 407 and the ground voltage.
The current sources 402B to 408B all, for example, conduct an equal current. The transistors 402A, 404A, 406A and 408A are, for example, n-type bipolar transistors receiving at their control terminals the differential components Iin+, Qin−, Qin+ and Iin− respectively, and transistors 402A and 404A have their collectors coupled to the intermediate node 403, while transistors 406A and 408A have their collectors coupled to the intermediate node 407. The emitters of transistors 402A and 408A are coupled together via a variable resistor 410 having a resistance Ra, while the emitters of transistors 404A and 406A are coupled together via a variable resistor 411 having a resistance Rb.
The mixing circuitry 110B comprises a pair of transistors 412 and 414, in this example bipolar transistors, having their emitters coupled together to the intermediate node 403, and a pair of transistors 416 and 418, in this example also bipolar transistors, having their emitters coupled together to the intermediate node 407. Transistors 412 to 418 have their control terminals coupled to receive differential components LOi+, LOi−, LOi− and LOi+ respectively of the carrier frequency signal LOi. The collectors of transistors 412 and 416 are coupled to an output node 420, which is in turn coupled to a supply voltage VDD via a resistor 422. The collectors of transistors 414 and 418 are coupled to an output node 424, which is in turn coupled to a supply voltage VDD via a resistor 426. The output nodes 420 and 424 provide respectively the differential components I′out1+ and I′out1− of the quadrature output component I′out1.
The resistances Ra and Rb of resistors 410 and 411 have the effect of reducing the differential between the corresponding signals, and thus apply weightings to the signals Iin and Qin respectively. In one example, Ra=Rcosφ and Rb=Rsinφ, where R is a constant resistance value, for example, equal to between several tens and several thousand ohms. By providing these resistors as variable resistors, their resistance values may be tuned. Alternatively, fixed resistance resistors could be used.
As illustrated in
Furthermore, in the mixing circuitry 112B the collectors of transistors 412 and 414 are coupled to node 420, while the collectors of transistors 416 and 418 are coupled to node 424. The nodes 420 and 424 respectively provide the output signals Q′out1− and Q′out+ of the output signal Q′out1. Also, the transistors 412, 414, 416 and 418 receive at their control terminals the differential components LOq+, LOq−, LOq− and LOq+ respectively of the carrier frequency signal LOq.
With reference again to
Each circuit 480, 482 comprises a four-input multiplexer 484 receiving at its inputs the signals Iin+, Iin−, Qin+ and Qin−. A control input 486 of each multiplexer allows one of these I or Q input signals to be selected by each multiplexer, in order to switch between a phase shift of between 0 and 90°, 90° and 180°, 180° and 270° or 270° and 360°.
An example of a single-ended implementation of the combined mixing and phase shifting modules 110 and/or 112 will now be described with reference to
The variable resistors 502C and 504C perform a similar role to resistors 410 and 411 of
The circuitry 100 of
Both the signals Iin1 and Qin1 are provided to each of a pair of phase shifters 616 and 618 of phase shifting circuitry 605B, while both the signals Iin2 and Qin2 are provided to each of a pair of phase shifters 620 and 622 of phase shifting circuitry 609B.
The phase shifting circuitry 605B and 609B is for example identical to that of
As illustrated, the outputs Iout1 and Iout2 from the phase shifters 616 and 620 are for example added by coupling the lines together to generate an output quadrature component Iout, while the outputs Qout1 and Qout2 from the phase shifters 618 and 622 are for example added by coupling the lines together to generate an output quadrature component Qout.
An example of the implementation of the phase shifting circuits 616 and 618 will now be described with reference to
As with the circuits of
The device 800 is for example a mobile telephone or base station, wireless LAN (local area network) interface, radar transmitter/receiver or other wireless transmission/reception device having multiple antennas.
An advantage of the embodiments described herein is that, by performing a phase shift of a quadrature component by adding weighted values of each quadrature component, the phase shift may be performed accurately, in particular allowing relatively precise control of the amplitudes of the signals for a broad range of frequencies. Furthermore, it is possible to accurately control the phase variation and group delay variation across the frequency bandwidth.
Furthermore, using resistors to determine the weightings leads to particularly accurate amplitude control, and by making these resistors variable, amplitude and phase imbalance correction can be provided.
The combined phasing shifting and mixing circuitry of
Having thus described at least one illustrative embodiment of the invention, various alterations, modifications and improvements will readily occur to those skilled in the art.
For example,
Furthermore, it will be apparent to those skilled in the art that while the circuits of
Furthermore, the embodiments described herein could be applied to a wide range of PSK or ASK modulation techniques.
It will be apparent to those skilled in the art that the ground voltage described herein could be at 0 V or at any other supply voltage level VSS.
Number | Date | Country | Kind |
---|---|---|---|
10/60569 | Dec 2010 | FR | national |