Implementations and embodiments relate to phased array antennas and methods.
A phased array antenna includes a matrix of elementary antennas whereon signals the phase of which is adjusted according to the various elementary antennas are applied so as to obtain a desired radiation pattern for the entire phased array antenna. A phased array antenna is thus configured to perform beamforming making it possible to transmit directional beams by adapting the phase of the signals feeding the elementary antennas.
The elementary antennas are controlled by radio frequency power amplifiers. These radio frequency power amplifiers are configured to amplify a low-power radio frequency signal into a higher power signal.
Phased array antennas may be used to communicate with various types of users. For example, phased array antennas may communicate with mobile phones, vehicles, connected objects, moving satellites, etc. Phased array antennas may be configured to communicate according to fifth generation (5G) standards.
In order to communicate with a plurality of user devices, the phased array antenna is configured to generate a plurality of simultaneous beams directed towards the various devices.
In particular, the power amplifiers are configured to generate a plurality of useful signals intended for various users. When a power amplifier generates a plurality of useful signals, it also generates interfering signals.
For example, if the power amplifier generates two useful signals of different frequencies f1 and f2, it also generates third-order intermodulation products. These third-order intermodulation products are subsequently radiated by the phased array antenna.
The radiated third-order intermodulation products may be present in a bandwidth of the devices of the users. The third-order intermodulation products may thus come to interfere with an existing communication with the phased array antenna or a communication that is not even initiated by the phased array antenna generating third-order intermodulation products.
For example,
The phased array antenna PANT also transmits beams IBM1, IBM2 corresponding to the third-order intermodulation products generated by the power amplifier of the phased array antenna PANT. Here, the beam IBM1 is oriented towards another user U3. The third-order intermodulation products may then interfere with the communications of this other user U3.
The third-order intermodulation products are on frequencies close to the frequencies of the useful signals. The third-order intermodulation products therefore may not be filtered easily.
Pre-distortion and linearization techniques may be implemented to reduce the third-order intermodulation products. Nevertheless, these techniques are expensive to implement, occupy a large amount of space in the electronic circuits of the antenna and are energy consuming.
Therefore, there is a need to propose a simple, low-cost and low energy-consuming solution that makes it possible to reduce the impact of third-order intermodulation products.
According to one aspect, a phased array antenna is proposed comprising:
By controlling the orientation of the radiation of the third-order intermodulation products, the amplifier circuit makes it possible to perform a spatial filtering of the third-order intermodulation products.
Such an amplifier circuit thus makes it possible to reduce the impact of third-order intermodulation products that may be generated by the power amplifier.
Such an amplifier circuit therefore makes it possible to reduce, or even prevent, an interference of the communications of third-party devices. Furthermore, the third-order intermodulation product control circuit has the advantage of consuming little energy.
In an advantageous embodiment, the third-order intermodulation product control circuit comprises:
Acting on the second-order harmonics makes it possible to generate third-order intermodulation products without impacting the useful signals.
Such a third-order intermodulation product control circuit is not very expensive, consumes little energy and occupies a relatively small space in the amplifier circuit.
Preferably, the power amplifier is a differential amplifier.
Advantageously, the second-order harmonic injection circuit includes two push-push differential amplifiers.
Preferably, the differential power amplifier includes two cascodes configured to amplify the at least two useful signals of different frequencies to be transmitted by the elementary antenna. Advantageously, the second-order harmonic injection circuit includes a first push-push differential amplifier comprising two cascodes connected as output to an output of a first cascode of the differential power amplifier and a second push-push differential amplifier comprising two other cascodes connected as output to an output of the second cascode of the differential power amplifier, the first push-push differential amplifier and the second push-push differential amplifier being configured to receive the at least two useful signals of different frequencies to be transmitted by the elementary antenna.
Preferably, the phase of the third-order intermodulation products is controlled so as to deviate a radiation of the intermodulation products according to an angle of a plurality of degrees in relation to its initial direction according to which the third-order intermodulation products would be transmitted without phase control of the third-order intermodulation products. The deviation angle may be determined according to the initial direction angle of the third-order intermodulation products, the number of elementary antennas and their spacing in the phased array antenna.
According to another aspect, a method for transmitting useful signals by a phased array antenna including a plurality of elementary antennas is proposed, the method including, before the transmission of at least two useful signals by each elementary antenna:
In an advantageous implementation, for each elementary antenna, the control of the third-order intermodulation products comprises:
In an advantageous implementation, the phase of the third-order intermodulation products is adapted so as to deviate a radiation of the intermodulation products according to an angle of a plurality of degrees in relation to an initial direction according to which the third-order intermodulation products would be transmitted without phase control of the third-order intermodulation products.
Other advantages and features of the invention will become apparent upon examining the detailed description of non-limiting embodiments, and from the accompanying drawings wherein:
The base station BS includes a phased array antenna PANT. The phased array antenna PANT comprises a plurality of elementary antennas ANTE. The elementary antennas ANTE are grouped by groups of four elementary antennas ANTE. The elementary antennas ANTE of the same group are associated with the same transceiver circuit TRC.
Each transceiver circuit TRC includes a beamformer BFRM. The beamformer BFRM is used to control a phase and an amplitude of the signals to be transmitted by each elementary antenna ANTE, so as to be able to adapt the orientation of the beams radiated by the phased array antenna PANT.
The transceiver circuit TRC also includes for each elementary antenna ANTE an amplifier circuit AMPC configured to amplify the signals to be transmitted by the elementary antenna ANTE. Such an amplifier circuit AMPC particularly includes a power amplifier PA (visible particularly in
The transceiver TRC also includes for each elementary antenna ANTE a low noise amplifier LNA configured to amplify the signals received by the elementary antenna ANTE. The transceiver circuit TRC also includes switches SW making it possible to perform either a transmission or a reception.
The amplifier circuit AMPC includes a power amplifier PA configured to receive as input a two-tone signal TN1 and TN2.
The two-tone signal received as input of the power amplifier PA thus has a first tone TN1 at a frequency f1 and having a phase ϕ1 and an amplitude a1, and a second tone TN2 at a frequency f2 and having a phase ϕ2 and an amplitude a2. The power amplifier is configured to deliver as output a two-tone amplified signal.
The two-tone signal delivered as output of the power amplifier PA thus has a first tone TN1 at a frequency f1 and having a phase ϕ1 and an amplitude A1, greater than a1, and a second tone TN2 at a frequency f2 and having a phase ϕ2 and an amplitude A2, greater than a2.
The amplifier circuit AMPC further comprises a third-order intermodulation product controller ICTRL. The third-order intermodulation product controller ICTRL is configured to modify the orientation of the beams of the third-order intermodulation products and/or the amplitude of the third-order intermodulation products.
In particular, as illustrated in the radiation diagram shown in
To modify the orientation of the radiation of the third-order intermodulation products, the third-order intermodulation product controller ICTRL is configured to modify the phase ϕctrl of the third-order intermodulation products.
The phase of the third-order intermodulation products is controlled so as to direct a radiation of the intermodulation products according to an angle of a plurality of degrees in relation to its initial direction. The deviation angle may be determined according to the initial direction angle of the third-order intermodulation products, the number of elementary antennas and their spacing in the phased array antenna.
In particular,
The third-order intermodulation product controller ICTRL includes a second-order harmonic injection circuit IH2. This second-order harmonic injection circuit IH2 is configured to receive the two-tone signal as input and to generate as output a signal including second-order harmonics. The signal generated as output of the harmonic injection circuit is then on the frequencies 2f1 and 2f2.
The output of the second-order harmonic injection circuit IH2 is connected to the output of the power amplifier PA so as to obtain as output of the amplifier circuit AMPC a signal combining the signal amplified by the power amplifier and the signal generated by the second-order harmonic injection circuit.
The output signal of the amplifier circuit AMPC then includes the two tones TN1, TN2 of the signal amplified on the frequencies f1 and f2 and the third-order intermodulation products IMD3-1, IMD3-2 obtained from the second-order harmonic injection circuit IH2 on the frequencies 2f1-f2 and 2f2-f1.
The third-order intermodulation product controller PCTRL also includes a phase controller PCTRL configured to control the phase of the signals generated by the second-order harmonic injection circuit IH2.
The phases ϕα and ϕβ of the third-order intermodulation products IMD3-1 and IMD3-2 then depend on the phases ϕ1 and ϕ2 of the two-tone signal and on the phase ϕctrl of the signal generated by the harmonic injection circuit.
The amplifier circuit AMPC has an input IN configured to receive a two-tone signal, and an output OUT configured to deliver an amplified signal from the two-tone signal received as input.
The amplifier circuit AMPC includes a single input separator circuit SIS configured to receive as input the two-tone signal and to deliver this two-tone signal by two outputs O1, O2.
In particular, the amplifier circuit AMPC includes a first input balun BLIN1 of the asymmetric to differential type connected as input to a first output O1 of the single input separator circuit SIS.
As seen previously, the amplifier circuit AMPC includes a power amplifier PA and a second-order harmonic injection circuit IH2.
The power amplifier PA is connected to the input IN so as to be able to receive the two-tone signal by means of the input balun BLIN1 and of the single input separator circuit SIS. The power amplifier PA is connected to the output OUT so as to be able to transmit the two-tone signal by means of an output balun BLOUT of the differential-to-asymmetric type.
The power amplifier PA comprises a differential cascode of transistors of the NMOS type. The power amplifier thus includes two positive/negative amplification branches connected as input to the first input balun BLIN1, and connected as output to the output balun BLOUT.
Each amplification branch includes a cascode CAS1, CAS2 of NMOS transistors. In particular, each branch has a first transistor M1, M3 of the NMOS type and a second transistor M2, M4 of the NMOS type mounted in cascode.
These first transistors M1, M3 each include a gate controlled by the various signals delivered by the various outputs of the input balun BLIN1. The first transistor M1, M3 of each branch further includes a source connected to a cold point, particularly to a ground GND, and a drain connected to a source of the second transistor M2, M4 of the same branch.
The second transistors M2, M4 each further include a gate, the gates of the second transistors M2, M4 of each branch being connected to a first terminal of a resistive element R1. This resistive element R1 has a second terminal configured to receive a voltage VGC. The first terminal of the resistive element R1 is also connected to the cold point, particularly to the ground GND, by means of a capacitive element C1.
The amplifier circuit AMPC also includes a second input balun BLIN2 of the asymmetric to differential type connected as input to a second output O2 of the single input separator circuit SIS by means of the phase controller PCTRL of the third-order intermodulation product controller ICTRL.
The phase controller PCTRL is configured to modify the phase of the signal delivered by the second output O2 of the single input separator circuit SIS. The phase applied by the phase controller is defined by the beamformer BFRM and transmitted to the phase controller by the latter by means of an input INϕctrl of the amplifier circuit AMPC.
The second-order harmonic injection circuit IH2 includes two push-push type differential amplifiers. Each push-push amplifier includes two cascodes CAS3, CAS6, for the first and CAS4 and CAS5 for the second.
A first cascode CAS3 includes a first transistor M5 of the NMOS type having a gate connected to a first output of the second input balun BLIN2. This first transistor M5 also has a source connected to the cold point, particularly to the ground GND.
The first cascode CAS3 also includes a second transistor M6 of the NMOS type having a gate connected to a first terminal of a resistive element R2. This resistive element R2 has a second terminal configured to receive a voltage VGC. The first terminal of the resistive element R2 is also connected to the cold point, particularly to the ground GND, by means of a capacitive element C2. The second transistor M6 also includes a source connected to a drain of the first transistor M5 of the same cascode CAS3.
A second cascode CAS4 includes a first transistor M7 of the NMOS type having a gate connected to a first output of the second input balun BLIN2. This first transistor M7 also has a source connected to the cold point, particularly to the ground GND.
The second cascode CAS4 also includes a second transistor M8 of the NMOS type having a gate connected to a first terminal of a resistive element R3. This resistive element R3 has a second terminal configured to receive a voltage VGC. The first terminal of the resistive element R3 is also connected to the cold point, particularly to the ground GND, by means of a capacitive element C3. The second transistor M8 also includes a source connected to a drain of the first transistor M7 of the same cascode CAS4.
A third cascode CAS5 includes a first transistor M9 of the NMOS type having a gate connected to a second output of the second input balun BLIN2. This first transistor M9 also has a source connected to the cold point, particularly to the ground GND.
The third cascode CAS5 also includes a second transistor M10 of the NMOS type having a gate connected to the first terminal of the resistive element R3. The second transistor M10 also includes a source connected to a drain of the first transistor M9 of the same cascode CAS5.
A fourth cascode CAS6 includes a first transistor M11 of the NMOS type having a gate connected to a first output of the second input balun BLIN2. This first transistor also has a source connected to the cold point, particularly to the ground GND.
The fourth cascode CAS6 also includes a second transistor M12 of the NMOS type having a gate connected to the first terminal of the resistive element R2. The second transistor M12 also includes a source connected to a drain of the first transistor M11 of the same cascode CAS6.
The drains of the second transistors M6 and M12 of the first and fourth cascodes CAS3 and CAS6 of the first push-push amplifier are connected to the drain of the second transistor M2 of the cascode CAS1 of the power amplifier PA.
The drains of the second transistors M8 and M10 of the second and third cascodes CAS4 and CAS5 of the second push-push amplifier for their part are connected to the drain of the second transistor M4 of the cascode CAS2 of the power amplifier PA.
Thus, the drain currents of the power amplifier and of the push-push amplifiers are combined on the same node for each positive/negative branch.
By combining the drain currents of the power amplifier PA and of the push-push amplifiers of the second-order harmonic injection circuit IH2, the signal delivered by the output OUT includes the useful signals on the fundamental frequencies f1 and f2 according to the respective phases ϕ1 and ϕ2. The signal delivered by the output OUT also includes third-order intermodulation products IMD3-1 and IMD3-2 on the frequencies 2f1-f2 and 2f2-f1 and having for respective phases ϕα and ϕβ.
As previously indicated, the phases of the intermodulation products IMD3-1 and IMD3-2 depend on the phase ϕctrl defined by the phase controller PCTRL.
The phase controller PCTRL thus makes it possible to modify the orientation of the radiations BM1, BM2 of the third-order intermodulation products IMD3-1 and IMD3-2. The push-push amplifiers also make it possible to modify the amplitude, or even reduce it, Aα and Aβ of the third-order intermodulation products IMD3-1 and IMD3-2.
The fact of acting on the second-order harmonics makes it possible to generate third-order intermodulation products IMD3-1 and IMD3-2 without impacting the useful signals.
By controlling the orientation of the radiation of the third-order intermodulation products, the amplifier circuit AMPC makes it possible to perform a spatial filtering of the third-order intermodulation products.
Such an amplifier circuit AMPC thus makes it possible to reduce the impact of third-order intermodulation products that may be generated by the power amplifier.
Such an amplifier circuit AMPC makes it possible to reduce, or even eliminate, a risk of disturbing third-party device communications.
Furthermore, such an amplifier circuit AMPC has the advantages of being not very expensive, consuming little energy and occupying a relatively small space in the phased array antenna.
The method thus includes receiving 70 the useful signals to be transmitted by the amplifier circuit AMPC associated with the elementary array antenna ANTE.
The method subsequently includes amplifying 71 the useful signals received by the amplifier circuit AMPC.
At the same time, the method includes a step 72 of generating a second-order harmonic signal. In this step 72, the second-order harmonic signal is generated from the useful signals to be transmitted by the array antennas. This step 72 also includes controlling a phase of the second-order harmonic signal.
Subsequently, the method includes combining 73 the amplified useful signals with the second-order harmonic signal.
Finally, the method includes transmitting 74 the combined signal to the elementary antenna associated with the amplifier circuit in order to carry out its transmission.
This application is a national stage application of International Application No. PCT/FR2022/050560, filed on Mar. 25, 2022, which application is hereby incorporated herein by reference.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/FR2022/050560 | 3/25/2022 | WO |