Patent Application
20250118903
The specification relates generally to wireless communications, and specifically to phased-array antenna assemblies and elements thereof.
Wireless antenna assemblies such as phased arrays are subject to competing constraints, such as performance targets and cost and/or complexity of manufacturing.
Examples disclosed herein are directed to radiofrequency (RF) module, comprising: a primary board; a controller supported by the primary board; and an antenna assembly supported by the primary board and connected with the controller, the antenna assembly including: an array of antenna elements, each antenna element having: an active patch; and a passive patch separated from the active patch by a slot; wherein one of the active patch and the passive patch has a greater surface area than the other of the active patch and the passive patch.
Embodiments are described with reference to the following figures.
Antenna assemblies for wireless communications may be subject to competing constraints. For example, although wireless communications using frequencies around 60 GHz may permit significantly higher throughput than communications using lower frequencies, WiGig-based communications are also subject to greater signal losses due to environmental obstacles, transmission distance, and the like.
To realize the theoretical performance gains of WiGig relative to lower-frequency wireless communications, antenna assemblies may be required to provide higher gain that antenna assemblies used for other wireless communication standards. Further, antenna assemblies used for WiGig communications that cannot provide sufficient gain over the significant channel bandwidth of the 60 GHz band (e.g., about 12 GHz of bandwidth across six channels) may provide suboptimal performance, potentially obviating the theoretically increased throughput of WiGig communications.
Achieving the above design goals (e.g., high gain, and wide band coverage) may increase the complexity of antenna elements. Increased complexity, particularly when antenna elements are integrated into printed circuit board (PCB) stack-ups, may involve increase the number of layers in a board, which can increase the cost of fabrication. Wireless communication modules may produced in large volume and may be highly cost sensitive, and the additional layers and/or tight manufacturing tolerances involved in producing antenna assemblies with acceptable performance parameters may therefore be untenable.
As discussed below, the module 100 includes an antenna assembly that provides sufficient gain over a sufficient portion of the 60 GHz frequency band to realize at least a portion of the potential improvements in throughput contemplated by the standards mentioned above. As will be apparent, the antenna assembly described herein may also be used for other forms of wireless communication, e.g., at frequencies around 2.4 GHz, 5 GHZ, or the like. Further, the antenna assemblies described herein can be accommodated in a relatively small number of PCB layers (e.g., one or two layers for the radiative elements), and may therefore mitigate some of the cost and/or complexity issues noted above.
The module 100 can be integrated with a computing device, or in other examples as shown in
The module 100 includes a primary board 108, which may also be referred to as a primary support. In the present example, the primary board 108 is a printed circuit board (PCB), for example fabricated with FR4 material, carrying either directly or via additional boards, the remaining components of the module 100. In particular, the primary board 108 carries, e.g. on an upper surface 110 thereof, the above-mentioned communications interface 104. The upper surface 110 is referred to as “upper” to distinguish from the opposing surface, to be discussed below, and does not indicate a required orientation of the module 100 in use.
The primary board 108 also carries, on the upper surface 110, a baseband controller 112. The baseband controller 112 is implemented as a discrete integrated circuit (IC) in the present example, such as a field-programmable gate array (FPGA). In other examples, the baseband controller 112 may be implemented as two or more discrete components. In further examples, the baseband controller 112 can be integrated within the primary board 108 (i.e. be defined within the conductive layers of the primary board 108) rather than carried on the upper surface 110.
In the present example, the baseband controller 112 is connected to the primary board 108 via any suitable surface-mount package, such as a ball-grid array (BGA) package that electrically couples the baseband controller 112 to signal paths (also referred to as leads, traces and the like) formed within the primary board 108 and connected to other components of the module 100. For example, the primary board 108 defines signal paths (not shown) between the baseband controller 112 and the communications interface 104. Via such signal paths, the baseband controller 112 transmits data received at the module 100 to the communications interface for delivery to a host computing device, and also receives data from the host computing device for wireless transmission by the module 100 to another computing device. Further, the primary board 108 defines additional signals paths extending between the baseband controller 112 and further components of the module 100, to be discussed below.
The module 100 further includes an interposer 120 carrying a radiofrequency (RF) controller 124. The interposer 120 is a discrete component mounted on the first surface 110 via a suitable surface-mount package (e.g., BGA). The interposer 120 carries the RF controller 124, and contains signal paths (also referred to as feed lines) for connecting control ports of the RF 124 to the baseband controller 112, and for connecting further control ports of the RF controller 124 to antenna elements to be discussed in greater detail below. The RF controller 124 may, for example, be placed onto or into the interposer 120 via a pin grid array or other suitable surface-mount package. In other examples, the RF controller 124 may be mounted directly on the first surface 110, e.g., via a BGA package, rather than being supported by the interposer 120.
The module 100 may include a heatsink (not shown) placed over the baseband controller 112, the interposer 120 and the RF controller 124, and in contact with upper surfaces of those components, e.g. to exhaust heat generated by the components. In other examples, separate heat sinks may be placed over the baseband controller 112, and the combination of the interposer 120 and RF controller 124.
The RF controller 124 includes a transmitting port and a receiving port for connection, via the interposer 120 and traces defined by the primary board 108, to the baseband controller 112. The RF controller 124 also includes a plurality of antenna ports for connection, via the interposer 120, to corresponding radio control contacts on the upper surface 110 of the primary board 108. Those contacts, in turn, are connected to elements on the opposing lower surface of the primary board 108, to carry signals between the RF controller 124 and the above-mentioned antenna elements.
Turning to
Turning to
The assembly 150 includes a plurality of antenna elements 300, e.g., arranged in grid-like array. In this example, the array includes sixty-four antenna elements 300, e.g., in an 8×8 configuration. A wide variety of other array configurations can also be employed, e.g., depending on the performance parameters targeted by the assembly 150, and/or the physical space available for the assembly 150. The structural features of the antenna elements 300 are discussed in further detail in connection with
The assembly 150 also includes a plurality of subarray dividers 304, each including four terminals or excitation points 308. Each excitation point 308 is configured to connect (e.g., with a via or the like) to one of the antenna elements 300. Each subarray divider 304, in this example, connects to four antenna elements 300 (e.g., in a 2×2 subarray). The use of the subarray dividers 304 permits the RF controller 124 to control a plurality of antenna elements 300 simultaneously. That is, the RF controller 124 in this example can implement sixteen control ports, each driving four antenna elements 300. Simultaneously controlling a group of antenna elements 300 may reduce the degree to which the array as a whole can be steered, but also mitigates the complexity of controlling the antenna elements 300 individually. In other examples, the subarrays can include more than four antenna elements 300. In further examples, the subarray dividers 304 can be omitted, and the RF controller 124 can be configured to control each antenna element 300 individually.
The assembly 150 further includes a plurality of subarray signal lines 312. The subarray signal lines 132 can be terminal components of the feed network 216, for example, and carry control signals between the RF controller 124 and the antenna elements 300 (via the subarray dividers 304, in this example). Each signal line 312 includes a first end 316, configured to connect to a portion of the feed network 216, and a second end 320 configured to connect to an excitation point 324 of a corresponding subarray divider 304.
Turning to
The patches 400 and 404 are unequally sized. As shown in this example, the active patch 400 has a larger surface area than the passive patch 404. In other examples, as discussed further below, the passive patch can have a larger surface area than the active patch.
The active patch 400 and the passive patch 404 are separated by a slot 412. The slot 412, and the shapes of the patches 400 and 404, can have various configurations. The patches 400 and 404 define a rectangular perimeter that encompasses both patches 400 and 404, e.g., having a perimeter length 416 and a perimeter width 420. The patches 400 and 404 have at least one colinear edge. That is, the patch 400 has at least one edge that is colinear with a corresponding edge of the patch 404. In this example, the patches 400 and 404 each have two colinear edges (the upper and lower, edges, in the orientation shown in
In the example shown in
A width 436 of the central portion 424, a width 440 of the outer portions 428, the perimeter width 420 and perimeter length 416, can be tuned according to the performance demands of the application(s) in which the assembly 150 is to be deployed. Other parameters that can be tuned for a given implementation include a length of the central portion 412, a distance between the contact region 408 and an edge 444 of the patch 400. The assembly 150 can also include vias surrounding the antenna elements 300 and/or the subarray dividers 304 and/or the subarray signal lines 312, as seen in
The scope of the claims should not be limited by the embodiments set forth in the above examples, but should be given the broadest interpretation consistent with the description as a whole.
This application claims priority from U.S. provisional patent application No. 63/588,064, filed Oct. 5, 2023 and entitled “Wide-Band MM-Wave Low Profile PCB Integrated Phased Array Antenna”, the contents of which is incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 63588064 | Oct 2023 | US |
