Embodiments of the present invention relate to a photodiode and in particular to a photodiode having an orthogonal layer structure with respect to a photon entry area. Further embodiments relate to a method for producing a photodiode. Some embodiments relate to an orthogonal arrangement for avalanche photodiodes (APD) in silicon photomultipliers (SiPM) with high red sensitivity.
For detection systems, such as LIDAR (Light Detection and Ranging), highly sensitive photo detectors with high spectral sensitivity in the near infrared range (NIR) are needed. However, in the near infrared range, the absorption coefficient of photons for silicon significantly decreases, such that a large volume is needed for a suitable number of generated electron-hole pairs. To obtain a high electric amplification factor, diodes are operated in the breakdown range of the reverse direction, which results in an avalanche effect. The problem of conventional detectors is that for a vertical structure with increasing absorption volume, the electric voltages needed for the avalanche effect also have to increase, as will be discussed below.
Conventionally, planar avalanche photodiodes (APD) or silicon photomultipliers (SiPM) generated on a silicon substrates have a vertical layer structure. The structure of a vertical avalanche photodiode is exemplarily illustrated in
In detail,
The diodes are operated in the breakdown region of the reverse direction. When absorbing photons in the active region, electron-hole pairs are generated resulting in an avalanche effect during operation allowing a strong/high/large amplification of the signal.
In common planar photodiodes, electric field and direction of light run parallel. With decreasing absorption ability, this is equal to a decrease of the sensitivity in the long-wave range. This sensitivity loss can be compensated by a long absorption path (=large space-charge zone (SCR).
For generating a deep space-charge zone, high operating voltage and low-doped silicon material are needed. If amplifying photo receivers, such as avalanche photodiodes or silicon photomultipliers are used, which are operated at very high internal field strengths, so-called guard structures are needed that prevent an undesired lateral breakdown.
With increasing voltage (=deep SCR=increasing red sensitivity), these guard structures become larger and larger.
These guard structures occupy regions of the photon entry area that are not available for detecting photons. Therefore, during operation with higher voltages, the area efficiency of the diode decreases (efficiency of the diode across the overall area).
In [3], a lateral avalanche photodiode formed in an SOI layer is described, where the doping for the multiplication layer is generated by surface implantation and a subsequent diffusion, wherein the same takes place across the entire depth of the SOI layer. Here, the concentration of dopants is greater at the surface than at the bottom of the SOI layer. This causes a depth-dependent change in the breakdown voltage, which is why functioning avalanche photodiodes can only be generated up to a depth of several μm. Only after this diffusion, trench etching is performed to realize the cathode electrode.
Thus, it is the object of the present invention to provide a photodiode with high sensitivity in the long-wave range comprising improved area efficiency.
According to an embodiment, a method for producing a photodiode may have the steps of: providing a semiconductor substrate, providing at least two electrodes in or on the semiconductor substrate, wherein, starting from a surface of a semiconductor substrate of the photodiode, the two electrodes essentially extend orthogonally to the surface in the depth direction of the semiconductor substrate, providing a diode layer stack between the at least two electrodes, wherein layers of the diode layer stack essentially run orthogonally to a surface of the semiconductor substrate, forming, in the semiconductor substrate, at least one guard structure below at least one of the at least two electrodes, wherein the at least two electrodes, the guard structure and the diode layer stack are provided in the semiconductor substrate by forming, starting from the surface of the semiconductor substrate, at least two spaced-apart recesses in the semiconductor substrate, forming a guard structure recess below one of the at least two electrodes, doping the semiconductor substrate between the at least two recesses, starting from the at least two recesses and partially starting from the guard structure recess, to obtain the guard structure and the diode layer stack between the at least two recesses, wherein layers of the diode layer stack essentially run orthogonally to the surface of the semiconductor substrate, providing the at least two electrodes in the at least two recesses.
Embodiments provide a photodiode having two electrodes [e.g. an anode and a cathode] in an absorption volume for absorbing photons, wherein the absorption volume comprises a photon entry area, wherein the two electrodes are configured to generate, when a reverse voltage is applied, an electric field in an active region [e.g. the absorption volume] between the two electrodes, wherein the electric field runs parallel to the photon entry area [e.g. wherein field lines of the electric field run parallel to the photon entry area].
In embodiments, starting from a surface of a semiconductor substrate of the photodiode, the two electrodes can essentially extend orthogonally to the surface in the depth direction of the semiconductor substrate, wherein the photodiode comprises at least one guard structure formed in the semiconductor substrate that is disposed below at least one of the at least two electrodes.
In embodiments, the at least one guard structure can be enclosed by the semiconductor substrate in the lateral direction and in the depth direction.
In embodiments, a lateral extension of the at least one guard structure can be two to five times a lateral extension of the corresponding electrode.
In embodiments, the at least one guard structure can be spherical, cube-shaped or cuboid-shaped, each with strongly rounded corners or edges.
In embodiments, the semiconductor substrate is a continuous silicon semiconductor substrate.
In embodiments, the two electrodes can essentially run orthogonally [e.g. at an angle of 90° or at an angle of 70° to 110° ] to the photon entry area.
In embodiments, starting from the surface of the semiconductor substrate, the two electrodes can extend into the semiconductor substrate in the depth direction at least to a depth of 5 μm or more [e.g., 10 μm to 30 μm].
In embodiments, starting from a surface of a semiconductor substrate (101) of the photodiode, the two electrodes can extend essentially orthogonally [e.g. at an angle of 90° or at an angle of 70° to 110° ] to the surface in depth direction of the semiconductor substrate 101 [e.g. where the surface runs parallel to the photon entry area].
In embodiments, the absorption volume can be arranged between the two electrodes.
In embodiments, layers [e.g. semiconductor layers] of a diode layer stack between the two electrodes can essentially run orthogonally [e.g. at an angle of 90° or at an angle of 70° to 110° ] to the photon entry area.
In embodiments, the diode layer stack can comprise the following layers:
In embodiments, the diode layer stack can comprise the following layers:
In embodiments, the diode layer stack can alternatively also comprise the following layers:
In embodiments, the diode layer stack can alternatively also comprise the following layers:
In embodiments, the photodiode can comprise at least one guard structure arranged [e.g. in depth direction of the semiconductor substrate of the photodiode] [e.g. immediately] below at least one of the at least two electrodes [e.g. to concentrate the electric field in the area of the absorption volume [e.g. and to reduce the same in edge areas]].
In embodiments, the photodiode can be an avalanche photodiode or a photoelectron multiplier.
Further embodiments provide a method for producing a photodiode. The method includes a step of providing a semiconductor substrate. Further, the method includes a step of providing at least two electrodes [e.g. anode and cathode] in or on the semiconductor substrate. Further, the method includes a step of providing a diode layer stack between the at least two electrodes, wherein layers of the diode layers stack essentially run orthogonally [e.g. at an angle of 90° or at an angle of 70° to 110° ] to a surface of the semiconductor substrate.
In embodiments, the at least two electrodes and the diode layer stack can be provided in the semiconductor substrate by forming, starting from the surface of the semiconductor substrate, at least two spaced-apart recesses [e.g. trenches] in the semiconductor substrate [e.g. in depth direction of the semiconductor substrate, i.e. orthogonally to the surface of the semiconductor substrate]; doping the semiconductor substrate between the at least two recesses to obtain the diode layer stack [e.g. diode layer structure] between the at least two recesses, wherein layers of the diode layer stack essentially run orthogonally [e.g. at an angle of 90° or at an angle of 70° to 110° ] to the surface of the semiconductor substrate; and providing the at least two electrodes [e.g. anode and cathode] in the at least two recesses.
In embodiments, starting from a surface of a semiconductor substrate of the photodiode, the two electrodes can essentially extend orthogonally to the surface in a depth direction of the semiconductor substrate, the method further comprising forming at least one guard structure below at least one of the at least two electrodes in the semiconductor substrate.
In embodiments, the at least two electrodes, the guard structure, and the diode layer stack can be provided in the semiconductor substrate by forming, starting from the surface of the semiconductor substrate, at least two spaced-apart recesses in the semiconductor substrate; forming a guard structure recess below one of the at least two electrodes; doping the semiconductor substrate between the at least two recesses starting from the at least two recesses and partially starting from the guard structure recess to obtain the guard structure and the diode layer stack between the at least two recesses, wherein layers of the diode layer stack essentially run orthogonally to the surface of the semiconductor substrate; providing the at least two electrodes in the at least two recesses.
In embodiments, the at least two recesses can be formed by etching or by local oxidation of the semiconductor substrate and subsequent removal of the oxide or by growing by selective deposition.
In embodiments, the semiconductor substrate can be doped at least partly starting from the at least two recesses.
In embodiments, the semiconductor substrate can be doped by means of coating with a dopant-containing layer by chemical vapor deposition or by means of doping from the gas phase.
In embodiments, the at least two electrodes and diode layer stack can be provided on the semiconductor substrate by layer-by-layer growth [e.g. epitaxy] of the at least two electrodes and layer-by-layer growth [e.g. epitaxy] and local doping of the diode layer stack.
In embodiments, the diode layer stack can be doped by ion implantation in connection with photolithography.
In embodiments, the diode layer stack can comprise the following layers:
In embodiments, the diode layer stack can comprise the following layers:
In embodiments, the diode layer stack can alternatively also comprise the following layers:
In embodiments, the diode layer stack can alternatively also comprise the following layers:
In embodiments, the at least two electrodes can be formed by providing and structuring a metallization layer and/or heavily doped layer.
In embodiments, the method can further comprise a step of forming at least one guard structure [e.g. immediately] below at least one of the at least two electrodes [e.g. to concentrate the electric field in the area of the absorption volume [e.g. and to reduce the same in edge areas or to suppress current paths/leaking currents]].
In embodiments, the photodiode can be an avalanche photodiode or a photoelectron multiplier.
Further embodiments provide an orthogonal arrangement for avalanche photodiodes (APD) and silicon photomultipliers (SiPM) with high red sensitivity.
Embodiments of the present invention will be discussed below in more detail with reference to the accompanying drawings, in which:
In the subsequent description of the embodiments of the present invention, the same or equal elements are provided with the same reference numbers in the figures such that their description is inter-exchangeable.
As can be seen in
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the photodiode can be an avalanche photodiode or a photoelectron multiplier.
In the following, detailed embodiments of the photodiode 100 will be described in more detail.
In detail,
Embodiments of the present invention allow preventing the dependency between absorption capacity and high operating voltage, since electric field and light incidence (optical absorption) run orthogonally to each other.
The electric field or the operating voltage of the photodiode is specified by the distance of cathode and anode. The absorption through the depth of the active field in silicon. By the orthogonal arrangement, operating voltage and absorption depth can be decoupled. The operating voltage can be adapted by the lateral dimensions.
Vertical photodiodes (c.f.
Preventing breakdowns at undesired locations by local reduction of the electric field strength can be obtained by the following measures (guard structures):
Embodiments have the advantage that theoretically an absorption volume of any depth can be generated with the orthogonal structure, independent of the configuration of the electric operating voltage.
Embodiments have the advantage that in orthogonal photodiodes, (in contrary to vertical photodiodes), the guard structures can be structured such that the same do not reduce the photon entry area, by attaching, for example, the guard structures to the bottom end of the electrodes.
Embodiments of the present invention are used in cost-effective components having higher absorption and higher area efficiency for improving systems using avalanche photodiodes or silicon photomultipliers, such as:
Two embodiments of the method 200 shown in
As can be seen in
In embodiments, the at least two recesses 103 can be formed by etching.
Alternatively, the at least two recesses 103 can be formed by local oxidation of the semiconductor substrate and subsequent removal of the oxide or by growth by selective deposition.
As can be seen in
Here, it should be noted that the layers 120, 122, 124, 126 in
In embodiments, the semiconductor substrate 101 can be doped at least partly starting from the at least two recesses 103.
In embodiments, the semiconductor substrate 101 can be doped by means of coating with a dopant-containing layer by chemical vapor deposition or by means of doping from the gas phase.
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the diode layer structure 128 of the photodiode 100 can comprise the following layers:
In embodiments, the at least two electrodes can be formed by providing and structuring a metallization layer and/or heavily doped layer.
In embodiments, the semiconductor substrate 101 can be a silicon semiconductor substrate.
In embodiments, the first layer 130_1 can be an intrinsic layer.
In embodiments, the first layer 130_1 can be grown by epitaxy such that the first layer 130_1 can be a first epitaxy layer.
As can be seen in
In embodiments, doping can be performed, for example by ion implantation in connection with photolithography.
In embodiments, the second layer 130_2 can be an intrinsic layer.
In embodiments, the second layer 130_2 can be grown by epitaxy, such that the second layer 130_2 can be a second epitaxy layer.
As can be seen in
In embodiments, doping can take place, for example by ion implementation in connection with photolithography.
Optionally, a guard layer 129, such as an oxide layer (e.g. SiO2) can be provided on the grown layers.
In embodiments, the photodiode can be an avalanche photodiode or a photoelectron multiplier.
In embodiments, as mentioned above (cf. e.g.
Through this, as this has been explained in detail above, when a reverse voltage is applied between the two electrodes 102 and 104, an electric field is generated between the two electrodes 102 and 104 that runs parallel to the photon entry area 106 of the photodiode 100 or the surface 105 of the semiconductor substrate 101.
The diode layer stack 128 can include a p+-doped layer 120, an intrinsic or p−-doped layer 122, a p-doped layer 124, and an n+-doped layer 126, as exemplified in
In embodiments, the semiconductor substrate 101 can be a continuous semiconductor substrate, such as a continuous silicon semiconductor substrate. Here, the photodiode 100 can be formed in this continuous semiconductor substrate 101. In embodiments, therefore, no silicon on insulator (SOI) substrate is needed, as is the case, for example, in [3].
In embodiments, starting from the surface 105 of the semiconductor substrate 101, the two electrodes 102 and 104 can extend at least to a depth of 5 μm (e.g., 10 μm to 20 μm, or 10 μm to 30 μm) into the semiconductor substrate 101.
Here, the two electrodes 102 and 104 can be formed in the semiconductor substrate 101 in two spaced-apart trenches. Prior to filling the two trenches with electrode material (e.g. a metallization layer or a heavily doped layer), the layers 120, 124 and 126 of the diode layer stack 128 can be generated by coating the walls of the two trenches with respective dopants and diffusing them, resulting in the shapes of the layers 120, 124 and 126 around the respective trenches or electrodes 102 and 104 shown in
For geometric reasons, a field enhancement occurs at the lower end of one of the trenches filled with conductive material, such as the trench forming electrode 104 in
Therefore, in embodiments, a guard structure 130 is formed below at least one of the two electrodes 102 and 104, such as below the electrode 104 in
In embodiments, this guard structure 130 can be generated by reducing the dopant concentration of avalanche zone 124 and cathode 104 at the bottom end of the trench.
Alternatively, in embodiments, this guard structure 130 can be generated by suitably increasing the electrode radius at the bottom end of the trench. This can be achieved, for example, by a spherical extension during trench etching. As a result, this breakdown voltage can be adjusted independently of the lateral breakdown voltage.
In embodiments, a lateral extension of the guard structure 130 (e.g., in the lateral direction of the semiconductor substrate or parallel to the surface 105 of the semiconductor substrate) can be two to five times a lateral extension (e.g., diameter) of the corresponding trench or electrode.
In embodiments, an extension of the guard structure 130 can be limited in the lateral direction and/or in the depth direction, for example, to two to five times a lateral extension (e.g., diameter) of the corresponding trench or electrode.
In embodiments, the guard structure 130 can be spherical, cube-shaped, or cuboid-shaped, each with strongly rounded corners.
If the corresponding electrode (e.g., cathode) is formed as a (essentially) circular rod or closed rotation-symmetric locus, lateral guard structures are unnecessary. For example, the corresponding electrode (e.g., cathode) can be located in the center of the cell or as a frame of the cell.
In the following, an embodiment of a method for producing a photodiode 101 with such a guard structure 130 below at least one of the two electrodes is described in more detail with reference to
Embodiments of the present invention allow the generation of an orthogonal avalanche photodiode (APD) with depths of 10 μm and significantly more. In embodiments, the breakdown voltage and thus the APD gain is depth-independent. This is achieved by the following measures. First, trench etching and then coating of the trench sidewall with dopants (e.g. coating from the gas phase: CVD, epitaxy, doped oxides, etc.). Then lateral diffusion of the dopants to generate the “avalanche layer” (marked by reference sign 124 in
Although some aspects have been described in the context of an apparatus, it is obvious that these aspects also represent a description of the corresponding method, such that a block or device of an apparatus also corresponds to a respective method step or a feature of a method step. Analogously, aspects described in the context of a method step also represent a description of a corresponding block or detail or feature of a corresponding apparatus. Some or all of the method steps can be performed by a hardware apparatus (or using a hardware apparatus), such as a microprocessor, a programmable computer or an electronic circuit. In some embodiments, some or several of the most important method steps can be performed by such an apparatus.
While this invention has been described in terms of several embodiments, there are alterations, permutations, and equivalents which will be apparent to others skilled in the art and which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and compositions of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and equivalents as fall within the true spirit and scope of the present invention.
Number | Date | Country | Kind |
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102021200828.3 | Jan 2021 | DE | national |
This application is a continuation of copending International Application No. PCT/EP2022/051728, filed Jan. 26, 2022, which is incorporated herein by reference in its entirety, and additionally claims priority from German Application No. 102021200828.3, filed Jan. 29, 2021, which is also incorporated herein by reference in its entirety.
Number | Date | Country | |
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Parent | PCT/EP2022/051728 | Jan 2022 | US |
Child | 18360934 | US |