Patent Application
20230215959
The present disclosure relates to a photoelectric conversion apparatus, a photoelectric conversion system, and a moving body.
A photoelectric conversion apparatus having a reflecting plate in the wiring layer improves the quantum conversion efficiency. The reflecting plate reflects incident light that has penetrated a semiconductor substrate to extend the optical path length of the incident light in a photoelectric conversion element. United States Patent Application Publication No. 2020/0286946 discusses a single-photon avalanche diode (SPAD) having an anode wiring used as a reflecting plate. Likewise, United States Patent Application Publication No. 2019/0181177 discusses a single-photon avalanche diode (SPAD) having an extended anode wiring.
In a structure discussed in United States Patent Application Publication No. 2020/0286946, a cathode wiring exists right above the guard ring region. Accordingly, there has been an issue that, if a hot carrier is trapped in the vicinity of the cathode region, the potential around an intense electric field region changes to change the breakdown voltage over time. In a structure discussed in United States Patent Application Publication No. 2019/0181177, an anode wiring exists right above the guard ring region. Accordingly, there has been a concern that the electric field concentrates at the edge of the cathode region to increase the Dark Count Rate (DCR).
There is a need in the art to reduce the breakdown voltage variation over time by the injection of the hot carrier into the semiconductor substrate boundary surface while restraining the DCR.
According to an aspect of the present disclosure, a photoelectric conversion apparatus comprising an avalanche diode disposed in a semiconductor layer having a first surface and a second surface facing the first surface, wherein the avalanche diode includes a first semiconductor region of a first conductivity type disposed at a first depth, a second semiconductor region of a second conductivity type disposed at a second depth deeper from the second surface than the first depth, a third semiconductor region disposed at an edge of the first semiconductor region in a planar view, a first wiring connected to the first semiconductor region, a second wiring connected to the second semiconductor region, and a third wiring not connected to the semiconductor layer, at least a part of the third wiring overlapping with the third semiconductor region in a planar view, and wherein a third voltage to be supplied to the third wiring is a value between a first voltage to be supplied to the first wiring and a second voltage to be supplied to the second wiring.
Further features of the present disclosure will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
The following exemplary embodiments are not intended to limit the present disclosure but intended to embody the technical concepts of the present disclosure. In each drawing, the sizes and positional relations of members may be emphasized to clarify the descriptions. In the following descriptions, identical components are assigned the same reference numerals, and redundant descriptions thereof may be omitted.
Exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In the following descriptions, terms indicating a specific direction or position (e.g., “upper”, “lower”, “right”, “left”, and other terms including these terms) are used as required. The use of these terms is intended to facilitate the understanding of exemplary embodiments to be described below with reference to drawings, and the technical scope of the present disclosure is not to be limited by the meanings of these terms.
According to the present disclosure, a planar view refers to viewing from a direction perpendicular to the light incidence surface of a semiconductor layer. A cross-sectional view refers to a plane perpendicular to the light incidence surface of the semiconductor layer. If the light incidence surface of the semiconductor layer is a coarse surface when microscopically viewed, a planar view is defined with reference to the light incidence surface of the semiconductor layer when macroscopically viewed.
In the following discussions, the anode of an avalanche photodiode (APD) is set to a fixed potential and a signal is taken out from the cathode side. Therefore, a semiconductor region of the first conductivity type including electric charges, as the major carrier, having the same polarity as signal electric charges is an N-type semiconductor region, and a semiconductor region of the second conductivity type including electric charges, as the major carrier, having the different polarity from signal electric charges is a P-type semiconductor region. The present disclosure is implemented even in a case where the cathode of the APD is set to a fixed potential and a signal is taken out from the anode side. In this case, a semiconductor region of the first conductivity type including electric charges, as the major carrier, having the same polarity as signal electric charges is a P-type semiconductor region, and a semiconductor region of the second conductivity type including electric charges, as the major carrier, having the different polarity from signal electric charges is an N-type semiconductor region. Although, in the following descriptions, one node of the APD is set to a fixed potential, the potential of the two nodes may vary.
According to the present disclosure, the term “impurity density” simply used means the net impurity density after the deduction of the value compensated by the impurity of the opposite conductivity type. More specifically, the term “impurity density” refers to the net doping density. A region where the P-type additive impurity density is higher than the N-type additive impurity density is a P-type semiconductor region. Conversely, a region where the N-type additive impurity density is higher than the P-type additive impurity density is an N-type semiconductor region.
Configurations common to each exemplary embodiment of a photoelectric conversion apparatus and a method for driving the apparatus according to the present disclosure will be described below with reference to
The photoelectric conversion apparatus 100 includes a sensor substrate 11 and a circuit substrate 21 which are stacked in layers and electrically connected with each other. The sensor substrate 11 includes a first semiconductor layer having a photoelectric conversion element 102 (described below) and a first wiring structure. The circuit substrate 21 includes a second semiconductor layer having such a circuit as a signal processing unit 103 (described below) and a second wiring structure. The photoelectric conversion apparatus 100 includes the second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer stacked in layers in this order. The photoelectric conversion apparatus 100 according to each exemplary embodiment is a rear surface irradiation photoelectric conversion apparatus where light is incident on a first surface and the circuit substrate 21 is disposed on a second surface.
Although the sensor substrate 11 and the circuit substrate 21 will be described below as diced chips, the configuration is not limited to chips. For example, each substrate may be a wafer. These substrates may be stacked in a wafer state and then diced, or may be chipped and then bonded in a state where chips are stacked.
The sensor substrate 11 is provided with a pixel region 12, and the circuit substrate 21 is provided with a circuit region 22 for processing signals detected in the pixel region 12.
Although the pixels 101 are typically pixels for forming an image, the pixels 101 do not necessarily need to form an image when used in Time of Flight (ToF). More specifically, the pixels 101 may be pixels for measuring the arrival time of light and the light quantity.
The photoelectric conversion element 102 in
The vertical scanning circuit unit 110 receives a control pulse supplied from the control pulse generation unit 115 and supplies the control pulse to each pixel 101. Logic circuits such as a shift register and an address decoder are used as the vertical scanning circuit unit 110.
The signal output from the photoelectric conversion element 102 of each pixel 101 is processed by the signal processing unit 103. The signal processing unit 103 includes a counter and a memory that stores a digital value.
The horizontal scanning circuit unit 111 inputs a control pulse for sequentially selecting each column to the signal processing unit 103 to read the signal from the memory of each pixel 101 storing a digital signal.
For a selected column, the signal processing unit 103 of the pixel 101 selected by the vertical scanning circuit unit 110 outputs a signal to the signal line 113.
The signal output to the signal line 113 is output to a recording unit or a signal processing unit outside the photoelectric conversion apparatus 100 via an output circuit 114.
Referring to
As illustrated in
The photoelectric conversion elements 102 each having an APD 201 are disposed on the sensor substrate 11 in
The APD 201 generates a charge pair corresponding to incident light through the photoelectric conversion. The anode of the APD 201 is supplied with a voltage VL (first voltage). The cathode of the APD 201 is supplied with a voltage VH (second voltage) that is higher than the voltage VL supplied to the anode. The anode and the cathode are supplied with reverse bias voltages so that the APD 201 performs the avalanche multiplication operation. Supplying such voltages causes the avalanche multiplication of electric charges generated by incident light, and generates an avalanche current.
When a reverse bias voltage is supplied, the APD 201 is operated in the Geiger or linear mode. In the Geiger mode, the APD 201 is operated with a potential difference between the anode and the cathode larger than the breakdown voltage. In the linear mode, the APD 201 is operated with a potential difference between the anode and the cathode close to, or equal to or less than the breakdown voltage.
An APD 201 operated in the Geiger mode is referred to as a single-photon avalanche diode (SPAD). For example, the voltage VL (first voltage) is −30 V, and the voltage VH (second voltage) is 1 V. The APD 201 may be operated in either the linear or the Geiger mode. It is desirable that the APD 201 is a SPAD having a larger potential difference and providing a more remarkable effect of the withstand voltage than the APD 201 in the linear mode.
A quench element 202 is connected to the power source for supplying the voltage VH and the APD 201. The quench element 202 functions as a load circuit (quench circuit) during signal multiplication by the avalanche multiplication. More specifically, the quench element 202 has a function of restraining the voltage to be supplied to the APD 201 to restrain the avalanche multiplication (quench operation). The quench element 202 also has a function of returning the voltage to be supplied to the APD 201 to the voltage VH by applying a current corresponding to the voltage drop in the quench operation (recharge operation).
The signal processing unit 103 includes a waveform shaping unit 210, a counter circuit 211, and a selection circuit 212. According to the present disclosure, the signal processing unit 103 needs to include any one of the waveform shaping unit 210, the counter circuit 211, and the selection circuit 212.
The waveform shaping unit 210 shapes the potential variation of the cathode of the APD 201 obtained in photon detection, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping unit 210. Although, in the example in
The counter circuit 211 counts the pulse signal output from the waveform shaping unit 210 and holds the count value. When a control pulse pRES is supplied via a drive line 213, the signal held by the counter circuit 211 is reset.
The selection circuit 212 is supplied with a control pulse pSEL from the vertical scanning circuit unit 110 in
A switch such as a transistor may be disposed between the quench element 202 and the APD 201 and between the photoelectric conversion element 102 and the signal processing unit 103 to change the electrical connection. Likewise, the supply of the voltage VH or VL to the photoelectric conversion element 102 may be electrically changed by using a switch such a transistor.
The present exemplary embodiment has been described above centering on a configuration using the counter circuit 211. However, instead of using the counter circuit 211, the photoelectric conversion apparatus 100 may acquire the pulse detection timing by using a Time to Digital Converter (hereinafter referred to as a TDC) and a memory. In this case, the generation timing for the pulse signal output from the waveform shaping unit 210 is converted into a digital signal by the TDC. For the measurement of the timing for the pulse signal, the TDC is supplied with a control pulse pREF (reference signal) from the vertical scanning circuit unit 110 in
Referring to
The arrangements of the signal lines 113, the column circuit 112, and the output circuit 114 are not limited to the circuit in
The photoelectric conversion apparatus 100 according to each exemplary embodiment will be described below.
The photoelectric conversion apparatus 100 according to a first exemplary embodiment will be described below with reference to
The structure and function of the photoelectric conversion element 102 will be described below. The photoelectric conversion element 102 includes a first semiconductor region 311, a third semiconductor region 313, a fifth semiconductor region 315, and a sixth semiconductor region 316 which are of the N type. The photoelectric conversion element 102 further includes a second semiconductor region 312, a fourth semiconductor region 314, a seventh semiconductor region 317, and a ninth semiconductor region 319 which are of the P type.
According to the present exemplary embodiment, in the cross section illustrated in
The first semiconductor region 311 has a higher N-type impurity density than the third semiconductor region 313 and the fifth semiconductor region 315. A PN junction is formed between the P-type second semiconductor region 312 and the N-type first semiconductor region 311. All regions overlapping with the center of the first semiconductor region 311 in a planar view, out of the second semiconductor region 312, are formed as depletion regions by making the impurity density of the second semiconductor region 312 lower than the impurity density of the first semiconductor region 311. In this case, the potential difference between the first semiconductor region 311 and the second semiconductor region 312 is larger than the potential difference between the second semiconductor region 312 and the fifth semiconductor region 315. Further, this depletion region extends to a part of the first semiconductor region 311, and an intense electric field is induced in the extended depletion region. This intense electric field causes the avalanche multiplication in the depletion region extending to a part of the first semiconductor region 311, and a current based on amplified electric charges is output as signal electric charges. When the light incident on the photoelectric conversion element 102 is photoelectrically converted, and the avalanche multiplication takes place in the depletion region (avalanche multiplication region), generated electric charges of the first conductivity type are collected in the first semiconductor region 311.
Although, referring to
The third semiconductor region 313 may be a P-type semiconductor region, not an N-type semiconductor region.
In this case, the impurity density of the third semiconductor region 313 is set to be lower than the impurity density of the second semiconductor region 312. If the impurity density of the third semiconductor region 313 is too high, an avalanche multiplication region is formed between the third semiconductor region 313 and the first semiconductor region 311, resulting an increase in the Dark Count Rate (DCR).
A trench-based concavo-convex structure 325 is formed on the front surface on the light incidence side of the semiconductor layer. The concavo-convex structure 325 surrounded by the P-type fourth semiconductor region 314 scatters the light incident on the photoelectric conversion element 102. Since the incident light obliquely advances through the photoelectric conversion element 102, an optical path length equal to or larger than the thickness of a semiconductor layer 301 can be secured. This makes it possible to photoelectrically convert light with a longer wavelength than in a case where the concavo-convex structure 325 is not provided. The concavo-convex structure 325 prevents the incident light reflection in the substrate, making it possible to obtain an effect of improving the photoelectric conversion efficiency for incident light. Further, by combining the concavo-convex structure 325 with a third wiring 331C having a shape to cover the surface facing the light incidence surface of the semiconductor substrate which characterizes the present disclosure of the present application, the third wiring 331C efficiently reflects light obliquely diffracted by the concavo-convex structure 325, thus further improving the near-infrared sensitivity. The concavo-convex structure 325 is not an indispensable component to the present disclosure of the present application. The effect of the present disclosure of the present application can be obtained even with a photoelectric conversion element in which the concavo-convex structure 325 is not formed.
The fifth semiconductor region 315 and the concavo-convex structure 325 are formed to overlap with each other in a planar view. The area of the portion of the fifth semiconductor region 315 overlapping with the concavo-convex structure 325 in a planar view is larger than the area of the portion of the fifth semiconductor region 315 not overlapping with the concavo-convex structure 325. The moving time until electric charges generated at far positions from the avalanche multiplication region formed between the first semiconductor region 311 and the fifth semiconductor region 315 reach the avalanche multiplication region is longer than the moving time until electric charges generated at near positions from the avalanche multiplication region reach the avalanche multiplication region. Therefore, the timing jitter may possibly increase. Disposing the fifth semiconductor region 315 and the concavo-convex structure 325 at positions where they overlap with each other in a planar view enables increasing the electric field at the deep portion of the photodiode. This enables reducing the time for collecting electric charges generated at far positions from the avalanche multiplication region, thus reducing the timing jitter.
The fourth semiconductor region 314 that three-dimensionally covers the concavo-convex structure 325 enables restraining the generation of thermal excitation electric charges at the boundary portion of the concavo-convex structure 325. This restrains the DCR of the photoelectric conversion element 102.
Pixels are separated by a pixel separation portion 324 having a trench structure. The P-type seventh semiconductor region 317 formed around the pixel separation portion 324 separates adjacent photoelectric conversion elements 102 by a potential barrier. Since the photoelectric conversion elements 102 are also separated by the potential of the seventh semiconductor region 317, such a trench structure as the pixel separation portion 324 has is not essential for pixel separation portions. When disposing the pixel separation portion 324 having the trench structure, the depth and position thereof are not limited to the configuration in
The distance from the pixel separation portion 324 of a pixel to the pixel separation portion 324 of an adjacent pixel or the pixel disposed at the closest position can also be recognized as the size of one photoelectric conversion element 102. When one photoelectric conversion element 102 has a size L, a distance d from the light incidence surface to the avalanche multiplication region satisfies L√2/4<d<L*√2. When the size and depth of the photoelectric conversion element 102 satisfy this relational expression, the electric field intensity in the depth direction is almost the same as the electric field intensity in the planer direction in the vicinity of the first semiconductor region 311. The above-described configuration can restrain variations of the time for collecting electric charges, making it possible to improve the timing jitter.
A pinning film 321, a planarizing film 322, and a microlens 323 are further formed on the light incidence surface side of the semiconductor layer. A filter layer (not illustrated) may be further disposed on the light incidence surface side. Various types of optical filters such as a color filter, an infrared cut filter, and a monochromatic filter can be used as the filter layer. Examples of color filters include a red, green, and blue (RGB) color filter and a read, green, blue, and white (RGBW) color filter.
The surface facing the light incidence surface of the semiconductor layer is provided with a wiring structure including a conductor and an insulation film. The photoelectric conversion element 102 illustrated in
Although it is common to use SiN as a nitride film, SiON, SiC, or SiCN are also applicable.
A cathode wiring 331A (first wiring) is connected to the first semiconductor region 311 to supply a cathode voltage (first voltage). An anode wiring 331B (second wiring) supplies an anode voltage (second voltage) to the seventh semiconductor region 317 via the ninth semiconductor region 319 as an anode contact. The third wiring 331C is disposed between the cathode wiring 331A and the anode wiring 331B, and is supplied with a third voltage that is higher than the anode voltage and lower than the cathode voltage. More specifically, the third voltage is set to a value between the cathode voltage (first voltage) and the anode voltage (second voltage). When the first semiconductor region 311 is a P-type semiconductor region, and the second semiconductor region 312 is an N-type semiconductor region, the third wiring 331C is supplied with the third voltage that is higher than the anode voltage and lower than the cathode voltage.
According to the present exemplary embodiment, the cathode wiring 331A, the anode wiring 331B, and the third wiring 331C are formed in the same wiring layer. The wiring includes conductors containing metals such as Cu and Al. This cross-section includes a cathode wiring outer periphery portion 332A and an inner periphery portion 332B of the third wiring 331C facing the cathode wiring outer periphery portion 332A. A dotted line 332C is a virtual line that internally equally divides the distance between the cathode wiring outer periphery portion 332A and the inner periphery portion 332B of the third wiring 331C. Further, a dotted line 332D is the outer periphery portion of the third wiring 331C facing the anode wiring 331B.
Referring to
The dotted lines on the first semiconductor region 311 and the third semiconductor region 313 indicate ranges where the cathode wiring 331A and the third wiring 331C are disposed in a planar view. The shape of the cathode wiring 331A is a circle in a planar view. The inner periphery portion of the third wiring 331C is a surface having a circular hole. At least a part of the third wiring 331C overlaps with the third semiconductor region 313 in a planar view. Although, referring to
An avalanche multiplication region is formed in the depth direction between the first semiconductor region 311 and the second semiconductor region 312. An electric field relief region is disposed so as to surround this avalanche multiplication region.
The electric field relief region only needs to cover a part of the circumference of the avalanche multiplication region, not the entire circumference of the avalanche multiplication region. The boundary between the anode wiring 331B and the insulation film facing the cathode wiring 331A overlaps with the electric field relief region in a planar view. Alternatively, it can be said that the virtual line 332C equally dividing between the cathode wiring outer periphery portion 332A and the anode wiring inner periphery portion 332B overlaps with the electric field relief region.
Referring to
Referring to
Referring to
Referring to
Referring to
Referring to the dotted line 70 in
On the other hand, referring to the solid line 71, the potential gradually decreases from the depth D to the depth C and from the depth C to the depth B and then falls to the level B1 at the depth B. Then, the potential steeply decreases from the depth B to the depth A and then falls to the level A1 at the depth A. At the depth D, the dotted line 70 and the solid line 71 reach almost the same potential height, and provide a potential gradient that gently decreases toward the second surface side of the semiconductor layer 301 in the regions indicated by the E-E′ and F-F lines. Therefore, electric charges generated in an optical detection apparatus move into the second surface side by the gentle potential gradient.
In the avalanche diode according to the present exemplary embodiment, the P-type second semiconductor region 312 provides a lower impurity density than the N-type first semiconductor region 311, and the N-type first semiconductor region 311 and the P-type second semiconductor region 312 are supplied with such potentials that provide reverse biases. Accordingly, a depletion region is formed toward the side of the second semiconductor region 312. In this structure, the second semiconductor region 312 serves as a potential barrier against electric charges generated through the photoelectric conversion in the fourth semiconductor region 314, making it easier for electric charges to be collected in the first semiconductor region 311.
Although the second semiconductor region 312 is formed in the entire range of the photoelectric conversion element 102 in
Electric charges that has moved to the vicinity of the second semiconductor region 312 are accelerated by a steep potential gradient, i.e., an intense electric field, ranging from the depth B to the depth A along the solid line 71 in
On the other hand, in the region between the fifth semiconductor region 315 and the P-type second semiconductor region 312 in
Electric charges generated through the photoelectric conversion in the second semiconductor region 312 flow into the fourth semiconductor region 314 by the potential gradient ranging from the depth B to the depth C along the dotted line 70 in
The dotted line 70 in
The electric charges generated in the vicinity of the boundary between the third semiconductor region 313 and the sixth semiconductor region 316 in
Then, the electric charges that have been subjected to the avalanche multiplication pass through the first semiconductor region 311 and then are detected as signal electric charges.
Since an intense electric field is applied around the first semiconductor region 311, imbalance occurs in the thermal condition of the sensor substrate and the carrier, resulting in a hot carrier. The hot carrier is trapped by a trap site around the cathode region close to the wiring layer. Since the hot carrier to be trapped increases with time, the potential in the vicinity of the cathode region and the electric field intensity of the intense electric field region also changes over time, resulting in a concern that the breakdown voltage changes over time.
To restrain the breakdown voltage variation over time, it is desirable that the potential at height A is higher than the minimum potential between the height A and the height Z on the Z-Z′ cross section in the third semiconductor region 313. More specifically, it is desirable that a potential barrier is formed at the height A with respect to the height, where the potential is minimized, between the height A and the height Z. The potential difference between the minimum potential from the height A to the height Z and the potential at the height A is referred to as a potential barrier ΔV.
As illustrated in
A preferred voltage setting on the third wiring 331C will be more specifically described below with reference to
As described above with reference to
For example, the anode voltage is around −30 V and the cathode voltage is around 1V at a height of about 0.1 μm from the boundary surface of the semiconductor layer of the third wiring 331C. In this case, the range from −10 V to −20 V is a preferred voltage of the third wiring 331C according to the recommended values in
When the voltage supplied to the third wiring 331C becomes higher than the voltage supplied to the cathode wiring, the potential barrier ΔV becomes negative, and a potential gradient in the electron acceleration direction is formed. Therefore, the voltage supplied to the third wiring 331C needs to be lower than Vdd supplied to the cathode wiring or the voltage that can be applied to the cathode wiring, Vdd−Vex, when the SPAD is driven, where Vdd denotes the drain voltage of the metal oxide semiconductor (MOS) transistor on the bottom substrate side, and Vex denotes the excessive excess bias voltage exceeding the breakdown voltage of the SPAD.
The voltage to be supplied to the third wiring 331C may be set to a ground (GNR) voltage that is lower than Vdd. The GND potential refers to the reference potential of the pixel circuit, for example, the ground potential. In this case, the PAD for externally supplying a voltage to the sensor is not required, achieving a simplified design and a reduced area of the entire chip.
The voltage to be supplied to the third wiring 331C, Vmid, may be Vmid=(Van−Vca)/2 that minimizes the voltage differences from the cathode voltage Vca and the anode voltage Van. The above-described value is most suitable to ensure the withstand voltage of the third wiring 331C. However, the voltage difference between wires can be sufficiently reduced within a range {(Van−Vca)/2}*0.8≤Vmid≤{(Van−Vca)/2}*1.2. This enables improving the degree of freedom of the wiring layout since the wiring arrangement is limited by the withstand voltage between wires.
Thus, by supplying a preferred voltage larger than the anode voltage and smaller than the cathode voltage to the third wiring 331C, the breakdown voltage variation over time can be reduced while restraining the DCR. Further, to improve the effect of restraining the breakdown voltage variation over time, it is desirable to minimize the distance between the semiconductor layer and the third wiring 331C in the depth direction. More specifically, the third wiring 331C needs to be disposed in a layer as close to the semiconductor layer as possible, or desirably disposed in the layer closest thereto out of a plurality of wiring layers. The plurality of wiring layers refers to the wiring layers disposed above the upper surface of the contact plug that connects the anode wiring 331B and the first semiconductor region 311. More specifically, in the direction perpendicular to the in-plane direction of the second surface of the semiconductor layer, the distance between the wiring layer configuring a plurality of wiring layers and the second surface is longer than the distance between the portion farthest from the second surface of the contact plug (upper surface of the contact plug) and the second surface of the semiconductor layer.
A photoelectric conversion apparatus according to a second exemplary embodiment will be described below with reference to
Descriptions duplicated with the first exemplary embodiment will be omitted, and portions different from those of the first exemplary embodiment will be mainly described below. According to the second exemplary embodiment, the cathode wiring 331A, the anode wiring 331B, and the third wiring 331C are formed at different heights with respect to the semiconductor layer.
According to the first exemplary embodiment, the cathode wiring 331A, the anode wiring 331B, and the third wiring 331C are formed in the same wiring layer. According to the present exemplary embodiment, the cathode wiring 331A, the anode wiring 331B, and the third wiring 331C are formed at different positions with respect to the semiconductor layer in the depth direction. This makes it easier to ensure a distance between the cathode wiring 331A, the anode wiring 331B, and the third wiring 331C, increasing the degree of freedom of the wiring layout.
Disposing the third wiring 331C at a position closer to the front surface of the semiconductor layer than the cathode wiring 331A and the anode wiring 331B increases the contribution of the voltage of the third wiring 331C to the potential and the electric field inside the semiconductor layer. Therefore, the range of the preferred voltage setting illustrated in
This further decreases the voltage difference between the cathode voltage and the voltage to be applied to the third wiring 331C. The third wiring 331C is closer to the cathode wiring than the anode wiring on the planar layout. Therefore, reducing the voltage difference between the voltage to be applied to the third wiring 331C and the cathode voltage enables increasing the degree of freedom of the wiring layout.
A photoelectric conversion apparatus according to a third exemplary embodiment will be described below with reference to
Descriptions duplicated with the first and second exemplary embodiments will be omitted, and portions different from the first exemplary embodiment will be mainly described below. According to the third exemplary embodiment, the third wiring 331C overlaps with the cathode wiring on a plane.
This configuration enables utilizing the third wiring 331C as a light-reflective structure. Part of the light incident from the rear surface of the substrate passes through the semiconductor layer and transmits to the front surface side of the substrate. An effect of sensitivity improvement can be obtained when the light is effectively reflected by the third wiring 331C.
According to the first exemplary embodiment, part of the light that has penetrated the substrate can be reflected. However, according to the first exemplary embodiment, since the third wiring 331C is disposed at the same height as the anode wiring 331B and the cathode wiring 331A, the position enabling wire arrangement is limited from the viewpoint of the withstand voltage. On the other hand, the configuration according to the present exemplary embodiment enables the third wiring 331C to cover a larger area and therefore reflect light at a position closer to the semiconductor layer. This configuration returns a larger amount of light to the pixels, making it possible to obtain an effect of higher sensitivity improvement.
Further sensitivity improvement can be expected by overlapping the third wiring 331C with the anode wiring 331B in a planar view.
A fourth exemplary embodiment will be described below with reference to
According to the fourth exemplary embodiment, there is provided an extension portion (fourth wiring) 331D of the third wiring 331C, connected to the third wiring 331C. The material of the fourth wiring 331D may be polysilicon or a metal such as tungsten.
This configuration enables directly arranging wires on the semiconductor layer, resulting in a shorter distance between the semiconductor layer and the fourth wiring 331D in the depth direction than in the above-described exemplary embodiments. The configuration enables effectively applying the voltage supplied to the third wiring 331C to the semiconductor layer, making it possible to improve the effect of restraining the breakdown voltage variation over time. The configuration enables obtaining the effect of restraining the breakdown voltage variation over time by supplying a smaller voltage, thus reducing the restrictions on the wiring layout due to the withstand voltage of the wiring.
A photoelectric conversion system according to a fifth exemplary embodiment will be described below with reference to
The photoelectric conversion apparatuses 100 according to the first to fourth exemplary embodiments are applicable to various types of photoelectric conversion systems. Examples of applicable photoelectric conversion systems include digital still cameras, digital camcorders, monitoring cameras, copying machines, facsimiles, portable telephones, on-vehicle cameras, and observation satellites. A camera module including an optical system such as a lens and an imaging apparatus is also included in the photoelectric conversion system.
The example of a photoelectric conversion system illustrated in
The photoelectric conversion system includes a signal processing unit 1007 as an image generation unit that generates an image by processing the output signal output from the imaging apparatus 1004. The signal processing unit 1007 performs various kinds of correction and compression as required and outputs image data. The signal processing unit 1007 may be formed on a semiconductor substrate provided with the imaging apparatus 1004 thereon, or on a semiconductor substrate different from the substrate of the imaging apparatus 1004.
The photoelectric conversion system further includes a memory unit 1010 that temporarily stores image data, and an external interface (I/F) unit 1013 that communicates with an external computer. The photoelectric conversion system further includes a recording medium 1012, such as a semiconductor memory, used to record and read imaging data, and a recording medium control I/F unit 1011 used to record and read imaging data to/from the recording medium 1012. The recording medium 1012 may be built in the photoelectric conversion system, or may be attachable to and detachable from the photoelectric conversion system.
The photoelectric conversion system further includes an overall control/calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the imaging apparatus 1004 and the signal processing unit 1007. The timing signals may be input from the outside. The photoelectric conversion system needs to include at least the imaging apparatus 1004 and the signal processing unit 1007 that processes the output signal output from the imaging apparatus 1004.
The imaging apparatus 1004 outputs an image capture signal to the signal processing unit 1007. The signal processing unit 1007 subjects the image capture signal output from the imaging apparatus 1004 to predetermined signal processing and outputs image data. The signal processing unit 1007 generates an image by using the image capture signal.
The present exemplary embodiment makes it possible to implement a photoelectric conversion system to which the photoelectric conversion apparatus 100 (imaging apparatus) according to any one of the above-described exemplary embodiments is applied.
A photoelectric conversion system and a moving body according to a sixth exemplary embodiment will be described below with reference to
The distance information acquisition units may also be implemented by a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), or a combination of both.
The photoelectric conversion system 2300 is connected with a vehicle information acquisition apparatus 2320 to acquire vehicle information such as the vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is connected with a control Electronic Control Unit (ECU) 2330 as a control apparatus that outputs control signals for generating a braking force on a vehicle based on the determination result by the collision determination unit 2318. The photoelectric conversion system 2300 is also connected with an alarm apparatus 2340 that generates an alarm to the driver based on the determination result by the collision determination unit 2318. For example, if the possibility of collision is high based on a determination result by the collision determination unit 2318, the control ECU 2330 performs vehicle control to avoid a collision and reduce damages, for example, by applying brakes, releasing the accelerator, or restraining the engine power. The alarm apparatus 2340 warns the driver by generating an alarm sound, displaying alarm information on the screen of the car navigation system, or applying a vibration to the seat belt or steering wheel.
According to the present exemplary embodiment, the photoelectric conversion system 2300 captures images of the surrounding of the vehicle, for example, images ahead of or behind the vehicle.
Although the present exemplary embodiment has been described above centering on control for avoiding a collision with other vehicles, the present exemplary embodiment is also applicable to automatic driving control for following another vehicle and automatic driving control for retaining the vehicle within the lane. The photoelectric conversion system is applicable not only to vehicles such as automobiles but also to moving bodies (moving apparatuses) such as vessels, airplanes, and industrial robots. In addition, the photoelectric conversion system is applicable not only to moving bodies but also to intelligent transport systems (ITS's) and a wide range of apparatuses utilizing object recognition.
A photoelectric conversion system according to a seventh exemplary embodiment will be described below with reference to
As illustrated in
The optical system 402 including one or a plurality of lenses guides the image light (incident light) from the subject to the photoelectric conversion apparatus 403 to form an image on the light-receiving surface (sensor unit) of the photoelectric conversion apparatus 403.
The photoelectric conversion apparatus 100 according to each of the above-described exemplary embodiments is applied to the photoelectric conversion apparatus 403. The image processing circuit 404 is supplied with a distance signal indicating the distance acquired from a light receiving signal output from the photoelectric conversion apparatus 403.
The image processing circuit 404 performs image processing for distance image configuration based on the distance signal supplied from the photoelectric conversion apparatus 403. The distance image (image data) obtained by the image processing is supplied to the monitor 405 for display and to the memory 406 for storage (recording).
The distance image sensor 401 configured in this way applies the above-described photoelectric conversion apparatus 403 to enable acquiring, for example, a more accurate distance image with the improvement of the pixel characteristics.
A photoelectric conversion system according to an eighth exemplary embodiment will be described below with reference to
Referring to
The endoscope 1100 includes a lens barrel 1101 of which a region of a predetermined length from the tip is to be inserted into the body cavity of the patient 1132, and a camera head 1102 connected to the base end portion of the lens barrel 1101. Referring to the example illustrated in
An opening with a fitted-in object lens is disposed at the tip of the lens barrel 1101. The endoscope 1100 is connected with a light source apparatus 1203. Light generated by the light source apparatus 1203 is guided to the tip of the lens barrel 1101 by a light guide extended inside the lens barrel 1101, and then is radiated toward the object under observation in the body cavity of the patient 1132 via the object lens. The endoscope 1100 may be a direct view mirror, an oblique view mirror, or a side view mirror.
An optical system and a photoelectric conversion apparatus 100 are disposed inside the camera head 1102. Reflected light (observation light) from the object under observation is condensed into the photoelectric conversion apparatus 100 by the optical system. The photoelectric conversion apparatus 100 photoelectrically converts the observation light to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observation image. As the photoelectric conversion apparatus 100, the photoelectric conversion apparatus 100 according to each of the above-described exemplary embodiments can be used. The image signal is transmitted to a camera control unit (CCU) 1135 as RAW data.
The CCU 1135 configured by a Central Processing Unit (CPU) or a Graphics Processing Unit (GPU) totally controls the operations of the endoscope 1100 and a display apparatus 1136. The CCU 1135 further receives the image signal from the camera head 1102 and subjects the image signal to various kinds of image processing for displaying an image based on the image signal, such as development processing (demosaic processing).
The display apparatus 1136 displays an image based on the image signal having been subjected to the image processing by the CCU 1135 under the control of the CCU 1135.
The light source apparatus 1203 includes, for example, a light source such as a Light Emitting Diode (LED) and supplies irradiation light for capturing an image of the operation portion to the endoscope 1100.
An input apparatus 1137 is an input interface to the endoscopic surgery system 1150. The user can input various kinds of information and instructions to the endoscopic surgery system 1150 via the input apparatus 1137.
A processing tool control apparatus 1138 controls the drive of an energy processing tool 1112 for cautery and incision of tissues and sealing of blood vessels.
The light source apparatus 1203 for supplying irradiation light for capturing an image of the operation portion to the endoscope 1100 can include a white light source including, for example, an LED, a laser light source, or a combination of both. When a white light source is configured by a combination of RGB laser light sources, it is possible to control the output intensity and output timing for each color (each wavelength) with high accuracy and hence to subject a captured image to white balance adjustment by the light source apparatus 1203. In this case, it is also possible to capture an image corresponding to each of RGB on a time-sharing basis by irradiating the object under observation with a laser beam from each of the RGB laser sources on a time-sharing basis, and controlling the drive of the image sensor of the camera head 1102 in synchronization with the irradiation timing. This method enables obtaining a color image even without disposing color filters in the image sensor.
The drive of the light source apparatus 1203 may be controlled to change the intensity of the output light at predetermined time intervals. It is possible to generate an image with a wide dynamic range, free from underexposure and overexposure, by controlling the drive of the image sensor of the camera head 1102 in synchronization with the timing of changing the light intensity to acquire images on a time-sharing basis and then combining the images.
The light source apparatus 1203 may be configured to be able to supply light in a predetermined wavelength band conforming to special light observation. The special light observation utilizes, for example, the wavelength dependence of absorption of light in a body tissue. More specifically, by irradiating the object under observation with narrower-band light than irradiation light used in normal observation (i.e., white light), an image of a predetermined tissue such as blood vessels in the superficial portion of the mucous membrane is captured with high contrast.
Alternatively, in the special light observation, fluorescence observation may be performed to capture an image through fluorescence generated by exciting light irradiation. The fluorescence observation enables irradiating a body tissue with exciting light to observe the fluorescence from the body tissue, or enables locally injecting a reagent such as indocyanine green (ICG) into the body tissue, and irradiating the body tissue with exciting light corresponding to the fluorescence wavelength of the reagent to obtain a fluorescence image. The light source apparatus 1203 can be configured to be able to supply narrow-band light and/or exciting light conforming to such special light observation.
A photoelectric conversion system according to a ninth exemplary embodiment will be described below with reference to
The glasses 1600 further include a control apparatus 1603. The control apparatus 1603 functions as a power source that supplies power to the photoelectric conversion apparatus 1602 and the above-described display apparatus. The control apparatus 1603 controls the operations of the photoelectric conversion apparatus 1602 and the display apparatus. An optical system for condensing light to the photoelectric conversion apparatus 1602 is formed on the lens 1601.
The user's line-of-sight to the display image is detected based on the captured image of the eyeballs obtained by infrared imaging. An arbitrary known technique is applicable to line-of-sight detection using a captured image of the eyeballs. Examples of applicable techniques include a line-of-sight detection method based on a Purkinje image by the reflection of irradiation light on the cornea.
More specifically, line-of-sight detection processing based on the pupil cornea reflection method is performed. The use of the pupil cornea reflection method detects the user's line-of-sight by calculating a line-of-sight vector representing the orientation (rotational angle) of the eyeballs based on a pupillary image and a Purkinje image included in a captured image of the eyeballs.
The display apparatus according to the present exemplary embodiment may include a photoelectric conversion apparatus 1602 having a light receiving element, and the display image of the display apparatus may be controlled based on line-of-sight information about the user from the photoelectric conversion apparatus 1602.
More specifically, for the display apparatus, a first visual range to be gazed by the user and a second visual range other than the first visual range are determined based on the line-of-sight information. The first and second visual ranges may be determined by the control apparatus of the display apparatus, or received from an external control apparatus that has determined these visual ranges. In the display region of the display apparatus, the display resolution of the first visual range may be controlled to be higher than that of the second visual range. More specifically, the resolution of the second visual range may be lower than that of the first visual range.
The display region includes a first display region and a second display region different from the first display region. The region having a higher priority may be determined from the first and second display regions based on the line-of-sight information. The first and second visual ranges may be determined by the control apparatus of the display apparatus, or received from an external control apparatus that has determined these visual ranges. The resolution of the region having a higher priority may be controlled to be higher than that of the region other than the region having a higher priority. More specifically, the region having a relatively lower priority may have a low resolution.
The first visual range and the region having a higher priority may be determined by using an Artificial Intelligence (AI). The AI may be a model configured to estimate the angle of the line of sight and the distance to the target objective on the line of sight based on an image of the eyeballs by using the image of the eyeballs and the direction in which the eyeballs in the image actually watch, as teacher data. An AI program may be held by the display apparatus, the photoelectric conversion apparatus 1602, or an external apparatus. When the AI program is held by the external apparatus, the AI program is transmitted to the display apparatus through communication.
When performing display control based on visual recognition detection, the present disclosure is preferably applicable to smart glasses further including a photoelectric conversion apparatus 1602 that captures an image of the outside. The smart glasses can display captured external information in real time.
The present disclosure is not limited to the above-described exemplary embodiments but can be modified in diverse ways.
For example, the exemplary embodiments of the present disclosure also include an example case where a part of the configuration of any one exemplary embodiment is appended to another exemplary embodiment, and an example case where a part of the configuration of any one exemplary embodiment is replaced with a part of the configuration of another exemplary embodiment.
The photoelectric conversion systems according to the fifth and sixth exemplary embodiments are examples of photoelectric conversion systems to which the photoelectric conversion apparatus of the present disclosure is applicable. Photoelectric conversion systems to which the photoelectric conversion apparatus of the present disclosure is applicable is not limited to the configurations illustrated in
The above-described exemplary embodiments are to be considered as illustrative in embodying the present disclosure, and are not to be interpreted as restrictive on the technical scope of the present disclosure. More specifically, the present disclosure may be embodied in diverse forms without departing from the technical concepts or essential characteristics thereof.
The present disclosure makes it possible to reduce the breakdown voltage variation over time by the injection of hot carriers into the semiconductor substrate boundary surface restraining the DCR.
While the present disclosure has been described with reference to exemplary embodiments, it is to be understood that the present disclosure is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2022-000315, filed Jan. 5, 2022, which is hereby incorporated by reference herein in its entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2022-000315 | Jan 2022 | JP | national |
