Patent Application
20150221791
The present invention relates to a photoelectric conversion element and a manufacturing method of the photoelectric conversion element.
Recently, expectations for a solar cell capable of directly converting solar energy into electric energy have increased rapidly as an energy source of the next generation, in particular, from a viewpoint of global environmental problems. As the solar cell, various solar cells such as a solar cell using a compound semiconductor or an organic material are included, and currently, a solar cell using silicon crystal is mainly being used.
Currently, a solar cell which has been manufactured and sold most commonly is a solar cell having a structure where electrodes are respectively formed on a light receiving surface on a side on which solar light is incident and on a back surface on an opposite side of the light receiving surface.
However, when the electrode is formed on the light receiving surface, the amount of solar light to be incident is decreased by the area of the electrode due to reflection and absorption of the solar light in the electrode. Therefore, for example, a solar cell in which the electrode is formed only on the back surface as illustrated in Japanese Unexamined Patent Application Publication No. 2010-80887 (PTL 1) has been developed.
PTL 1: Japanese Unexamined Patent Application Publication No. 2010-80887
Hereinafter, an example of a manufacturing method of the solar cell in which the electrode is formed only on the back surface will be described with reference to schematic cross-sectional views of
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However, in the manufacturing method of a solar cell described above, it is necessary to apply the photoresist, and to perform a complicated patterning process with respect to the photoresist by using the photolithography technology and the etching technology, and thus a manufacturing process of the solar cell in which the electrode is formed only on the back surface is extremely complicated. In addition, conversion efficiency of the solar cell in which the electrode is formed only on the back surface is also required to be improved.
The present invention is made in consideration of the circumstances described above, and is to provide a photoelectric conversion element which is able to improve power generation efficiency and is able to be manufactured by a simple manufacturing process.
A photoelectric conversion element of the present invention includes both p-type and n-type semiconductor films on a back surface of a semiconductor substrate, and an intermetallic compound layer is formed on the semiconductor film. Then, the intermetallic compound layer formed on the p-type semiconductor film and the intermetallic compound layer formed on the n-type semiconductor film are separated from each other by a space.
That is, the photoelectric conversion element of the present invention includes a semiconductor substrate of a first conductivity type, a first semiconductor film of the first conductivity type disposed on one surface of the semiconductor substrate, a second semiconductor film of a second conductivity type disposed on the one surface to be independent from the first semiconductor film, and a dielectric film disposed between the semiconductor substrate and the first semiconductor film and/or between the semiconductor substrate and the second semiconductor film, and an intermetallic compound layer is formed on the first semiconductor film and on the second semiconductor film.
Here, it is preferable that a groove is formed in the one surface of the semiconductor substrate, and the second semiconductor film is disposed on a bottom surface of the groove.
Further, it is preferable that at least a part of a side wall of the groove is covered with an insulating film.
In addition, the first semiconductor film and the second semiconductor film may be disposed on the one surface of the semiconductor substrate to be separated from each other, and an insulating film may be disposed between the first semiconductor film and the second semiconductor film.
In addition, it is preferable that the intermetallic compound layer is a metal silicide layer and/or a metal germanide layer. Here, it is preferable that the metal silicide layer is a compound layer formed of silicon and at least one metal selected from a group consisting of nickel, cobalt, and titanium, and it is preferable that the metal germanide is a compound layer formed of germanium and at least one metal selected from a group consisting of nickel, cobalt, and titanium.
In addition, it is preferable that the insulating film is a thermally oxidized silicon film and/or a silicon nitride film, and when the insulating film is a silicon nitride film, it is preferable that the silicon nitride film is formed by using a plasma CVD method.
In addition, the present invention relates to a manufacturing method of the photoelectric conversion element, and the manufacturing method includes a step of forming a metal layer on the entire surface on one surface side of a semiconductor substrate of a first conductivity type including a first semiconductor film of the first conductivity type and a second semiconductor film of a second conductivity type which are exposed on the one surface, and a step of forming an intermetallic compound layer by allowing the first semiconductor film and the second semiconductor film to react with the metal layer due to a heat treatment.
Here, it is preferable that the step of forming the intermetallic compound layer is a step of forming a metal silicide layer, and it is preferable that the step of forming the intermetallic compound layer further includes a step of removing an unreacted metal layer after the step of forming the metal silicide layer.
In addition, the step of forming the intermetallic compound layer may be a step of forming a metal germanide layer, and the step of forming the intermetallic compound layer may further include a step of removing an unreacted metal layer after the step of forming the metal germanide layer.
Further, it is preferable that the metal layer is a layer formed of at least one metal selected from a group consisting of nickel, cobalt, and titanium.
Furthermore, herein, “first conductivity type” indicates “n-type” or “p-type”, and “second conductivity type” indicates “p-type” or “n-type” different from the first conductivity type.
According to the present invention, it is possible to provide a photoelectric conversion element which is able to improve power generation efficiency and is able to be manufactured by a simple manufacturing process.
Hereinafter, embodiments of the present invention will be described. Furthermore, in the drawings of the present invention, the same reference numerals indicate the same parts or the corresponding parts.
In
A first dielectric film 7 formed of i-type amorphous silicon is disposed on a region of the back surface of the semiconductor substrate 3 other than the groove, and a first semiconductor film 8 formed of n-type amorphous silicon is disposed on the first dielectric film 7. Then, an intermetallic compound layer 15 is formed on the entire back surface of the first semiconductor film 8.
Herein, the “semiconductor film” indicates a film formed of a material which is able to impart conductivity by being doped with impurities. As such a semiconductor film, for example, a silicon film, a germanium film, a gallium arsenide film, and the like are able to be included.
In addition, “i-type” indicates that n-type or p-type impurities are not intentionally doped, and for example, may indicate n-type or p-type of the conductivity type due to inevitable spread of the n-type or the p-type impurities or the like after preparing the photoelectric conversion element.
In addition, in the “amorphous silicon”, amorphous silicon in which a dangling bond of a silicon atom in amorphous silicon hydride or the like is terminated with hydrogen is also included. Similarly, in the “amorphous germanium”, amorphous germanium hydride and the like are included.
A second dielectric film 12 formed of i-type amorphous silicon is disposed on the bottom surface 11a of the groove 11 in the back surface of the semiconductor substrate 3, and a second semiconductor film 13 formed of p-type amorphous silicon is disposed on the second dielectric film 12. Then, an intermetallic compound layer 15 is formed on the entire back surface of the second semiconductor film 13.
An insulating film 16 may be disposed on at least a part of the side wall 11b of the groove 11. In this case, the insulating film 16 is disposed between the second dielectric film 12 and the second semiconductor film 13, and the side walls 11b of the groove 11, and thus the second dielectric film 12 and the second semiconductor film 13 are not in contact with the side wall 11b.
In addition, a third dielectric film 4 formed of i-type amorphous silicon is disposed on the entire light receiving surface (a surface opposite to the back surface) which is the other surface of the semiconductor substrate 3, and a third semiconductor film 5 formed of n-type amorphous silicon is disposed on the entire surface of the third dielectric film 4. Further, an antireflective film 6 is disposed on the entire surface of the third semiconductor film 5.
In the photoelectric conversion element 1 having the structure described above, the first dielectric film 7 is disposed between the back surface of the semiconductor substrate 3 and the back surface of the first semiconductor film 8, and the second dielectric film 12 is disposed between the bottom surface 11a of the groove 11 and the back surface of the second semiconductor film 13.
Therefore, in the photoelectric conversion element 1, a dielectric film is disposed in an entire region between the back surface of the semiconductor substrate 3 and the back surface of the first semiconductor film 8 and between the bottom surface 11a of the groove 11 and the back surface of the second semiconductor film 13.
In addition, in the photoelectric conversion element 1, the intermetallic compound layer 15 is disposed on the entire back surface of the first semiconductor film 8 and on the entire back surface of the second semiconductor film 13, and thus both the first semiconductor film 8 and the second semiconductor film 13 are covered with the intermetallic compound layer 15.
Furthermore, in the photoelectric conversion element 1, a configuration in which the first semiconductor film 8 is of the n-type and the second semiconductor film 13 is of the p-type is exemplified, and even when the first semiconductor film is of the p-type and the second semiconductor film is of the n-type, effects of the present invention are obtained.
In addition, in the photoelectric conversion element 1, a configuration in which the third semiconductor film 5 is disposed on the light receiving surface is exemplified, but the third semiconductor film 5 is not a mandatory component, and even when the third semiconductor film 5 is not included, the effects of the present invention are obtained.
Hereinafter, each component configuring the photoelectric conversion element of this embodiment will be described.
As the semiconductor substrate 3, a substrate formed of n-type single crystal silicon is able to be typically used, but the material is not limited thereto, and a known material of the related art is able to be widely used. For example, a substrate formed of germanium or a gallium arsenic compound may be used, and not only a single crystal substrate but also a polycrystalline substrate or an amorphous substrate may be used. In addition, for example, a semiconductor substrate or the like in which a textured structure (not illustrated) is formed on the light receiving surface and/or the back surface of the semiconductor substrate 3 in advance may be used.
It is preferable that a thickness of the semiconductor substrate 3 is greater than or equal to 50 μm and less than or equal to 300 μm. By setting the thickness of the semiconductor substrate 3 to be in the range described above, it is possible to prevent a recombination of an electron-hole pair generated in the semiconductor substrate 3, and it is possible to decrease power attenuation. Here, a more preferable range of the thickness of the semiconductor substrate 3 is greater than or equal to 100 μm and less than or equal to 200 μm.
In addition, an impurity concentration of the semiconductor substrate 3 is not particularly limited, and for example, is able to be greater than or equal to 5×1014 units/cm3 and less than or equal to 2×1016 units/cm3. As the impurities included in the semiconductor substrate 3, for example, phosphorus, boron, and the like are able to be used.
In addition, a depth D of the groove 11 is not particularly limited, and for example, the depth D is able to be less than or equal to 10 μm, and preferably is able to be less than or equal to 5 μm.
The insulating film 16 is not particularly limited insofar as a film has insulation properties in which insulation resistivity is greater than or equal to 1×104 Ω·cm, and a known insulating film of the related art is able to be used. For example, as the insulating film 16, a silicon oxide film, a silicon nitride film, an aluminum nitride film, an aluminum oxide film, a titanium oxide film, or a combination thereof is able to be included.
Among them, a silicon oxide film formed by thermal oxidization (herein, referred to as a thermally oxidized silicon film) is particularly preferable. The thermally oxidized silicon film is formed at a high temperature of approximately 1000° C., and thus properties thereof are not changed even in a high temperature process of approximately 250° C. of a manufacturing process of a solar cell, and a preferred passivation effect is obtained. Then, more preferably, it is preferable that the thermally oxidized silicon film is subjected to a hydrogen annealing treatment in addition to a thermal oxidation treatment. According to the hydrogen annealing treatment, it is possible to terminate a dangling bond of an interfacial surface between the semiconductor substrate 3 and the thermally oxidized silicon film by hydrogen.
In addition, an aspect in which the insulating film 16 is a silicon nitride film formed by a plasma Chemical Vapor Deposition (CVD) method is one of preferred aspects. When the silicon nitride film is formed by a plasma CVD method, mixed gas formed of silane gas (SiH4), ammonia gas (NH3), and the like is used as raw material gas, and hydrogen derived from the raw material gas remains in the insulating film after being formed.
In general, it is not preferable that the hydrogen remains in the insulating film from a viewpoint of impurities. However, the present inventors have newly found that when hydrogen in amorphous silicon is detached due to light degradation or the like in the photoelectric conversion element having the configuration of the present invention, the hydrogen remaining in the insulating film has a function of compensating a hydrogen defect. Therefore, hydrogen is contained in the insulating film, and thus it is possible to have a long life duration of the photoelectric conversion element.
Here, it is preferable that a content of hydrogen in the insulating film is greater than or equal to 0.005 at % and less than or equal to 0.03 at %. When the content exceeds 0.03 at %, in the manufacturing process of a solar cell after forming the insulating film, hydrogen is easily detached, and the insulating film is easily distorted or peeled out, and thus it is not preferable. In addition, when the content is less than 0.005 at %, the effect described above may not be sufficiently obtained, and thus it is not preferable.
Furthermore, the content of hydrogen, for example, is able to be estimated by integrating signals derived from N—H or Si—H using an FT-IR method. In addition, “at %” indicates an “atomic percentage”, that is, a concentration of the number of atoms.
In addition, the insulating film 16 may be a single layer film, or may be a laminated film. That is, it is preferable that the insulating film of the present invention is a thermally oxidized silicon film and/or a silicon nitride film.
Further, it is preferable that the insulating film 16 covers at least a part of the side wall 11b of the groove 11, it is more preferable that a length of the insulating film 16 which is in contact with the side wall 11b of the groove 11 is longer than a summation of thicknesses of the second dielectric film 12 and the second semiconductor film 13, and it is most preferable that the insulating film 16 covers an entire surface of the side wall 11b of the groove 11. In addition, it is preferable that a length of a portion of the insulating film 16 which is in contact with the bottom surface 11a of the groove 11 is greater than or equal to 1 nm and less than or equal to 500 nm in an arbitrary vertical section with respect to the front surface of the semiconductor substrate 3. When the length described above is less than 1 nm, an effect in which a p-type electrode and an n-type electrode are electrically separated from each other may not be sufficiently obtained, and when the length exceed 500 nm, the insulating film 16 may be peeled off at the time of being etched, and thus it is not preferable.
In the present invention, it is preferable that the first semiconductor film, the second semiconductor film, and the third semiconductor film are amorphous films, and typically, are films formed of amorphous silicon and/or amorphous germanium exhibiting p-type or n-type conductivity. Hereinafter, each semiconductor film will be described.
The first semiconductor film 8 is not limited to a film formed of n-type amorphous silicon, and as the first semiconductor film 8, for example, a known n-type amorphous semiconductor film of the related art, or the like may be used. In addition, as the first semiconductor film 8, for example, a film formed of n-type amorphous germanium may be included. A thickness of the first semiconductor film 8 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm. Here, as n-type impurities included in the first semiconductor film 8, for example, phosphorus is able to be used, and an n-type impurity concentration of the first semiconductor film 8, for example, is able to be approximately 5×1019 units/cm3.
The second semiconductor film 13 is not limited to a film formed of p-type amorphous silicon, and as the second semiconductor film 13, for example, a known p-type amorphous semiconductor film of the related art, or the like may be used. In addition, as the second semiconductor film 13, for example, a film formed of p-type amorphous germanium may be included. A thickness of the second semiconductor film 13 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm. Here, as p-type impurities included in the second semiconductor film 13, for example, boron is able to be used, and a p-type impurity concentration of the second semiconductor film 13, for example, is able to be approximately 5×1019 units/cm3.
The third semiconductor film 5 is not particularly limited insofar as a film exhibits light transmittance, and as the third semiconductor film 5, for example, a known n-type amorphous semiconductor film of the related art, or the like may be used. A thickness of the third semiconductor film 5 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm. A n-type impurities included in the third semiconductor film 5, for example, phosphorus is able to be used, and an n-type impurity concentration of the third semiconductor film 5, for example, is able to be approximately 5×1019 units/cm3.
In the present invention, the dielectric film is formed between the semiconductor substrate and each semiconductor film, is a film which passivates an interfacial surface between the semiconductor substrate and each of the semiconductor films without obstructing electric conduction between the semiconductor substrate and each of the semiconductor films. As such a dielectric film, an i-type non-doped film is preferable, and for example, a film formed of i-type amorphous silicon or the like is able to be preferably used. Hereinafter, each dielectric film will be described.
The first dielectric film 7 is formed between the semiconductor substrate 3 and the first semiconductor film 8. The first dielectric film 7 is not limited to a film formed of i-type amorphous silicon, and as the first dielectric film 7, for example, a known i-type amorphous semiconductor film of the related art, or the like may be used. A thickness of the first dielectric film 7 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm.
The second dielectric film 12 is formed between the semiconductor substrate 3 and the second semiconductor film 13. The second dielectric film 12 is not limited to a film formed of i-type amorphous silicon, and as the second dielectric film 12, for example, a known i-type amorphous semiconductor film of the related art, or the like may be used. A thickness of the second dielectric film 12 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm.
The third dielectric film 4 is formed between the semiconductor substrate 3 and the third semiconductor film 5. The third dielectric film 4 is not limited to a film formed of i-type amorphous silicon, and as the third dielectric film 4, for example, a known i-type amorphous semiconductor film of the related art, or the like may be used. A thickness of the third dielectric film 4 is not particularly limited, and for example, is able to be greater than or equal to 1 nm and less than or equal to 20 nm.
The intermetallic compound layer 15 of the present invention has a function of a p-type electrode or an n-type electrode. As the intermetallic compound layer 15, a layer exhibiting metallic electric conductivity is preferable, and a metal silicide layer and/or a metal germanide layer are more preferable.
Here, as metal silicide, for example, nickel silicide (NiSi), cobalt silicide (CoSi2), titanium silicide (TiSi2), molybdenum silicide (MoSi2), palladium silicide (PdSi), platinum silicide (PtSi), manganese silicide (MnSi1.7), tungsten silicide (WSi2), and the like are able to be included. Then, among them, nickel silicide, cobalt silicide, titanium silicide, and a combination thereof are able to be preferably used. That is, it is preferable that the metal silicide layer of the present invention is a compound layer formed of silicon and at least one metal selected from a group consisting of nickel (Ni), cobalt (Co), and titanium (Ti).
In addition, as metal germanide, for example, nickel germanide (NiGe, NiGe2), cobalt germanide (CoGe2), titanium germanide (TiGe2), molybdenum germanide (MoGe2), palladium germanide, platinum germanide (PtGe), manganese germanide (Mn5Ge3), tungsten germanide (WGe2), and the like are able to be included. Then, among them, nickel germanide, cobalt germanide, titanium germanide, and a combination thereof are able to be preferably used. That is, it is preferable that the metal germanide layer of the present invention is a compound layer formed of germanium and at least one metal selected from a group consisting of nickel (Ni), cobalt (Co), and titanium (Ti).
Furthermore, an intermetallic compound of the present invention may be a compound in which the compound described above is doped with a trace amount of other elements. In addition, in a composition thereof, each atom ratio follows the general expression described above. Furthermore, in the present invention, when the compound as described above is denoted by a chemical formula, all known atom ratios of the related art are included insofar as the atom ratio is not particularly limited, and are not necessarily limited only to a stoichiometric range. For example, when it is simply referred to as “NiSi”, an atom ratio of “Ni” to “Si” is not limited only to a case of 50:50, and all known atom ratios of the related art are included.
Further, the intermetallic compound layer 15 may be a single layer, or may be a laminated layer. In addition, the intermetallic compound layer 15 may include a silicon germanide layer.
In addition, a thickness of the intermetallic compound layer 15 is able to be greater than or equal to 0.1 μm and less than or equal to 1.0 μm, and more preferably is greater than or equal to 0.5 μm and less than or equal to 0.8 μm.
As antireflective film 6, for example, a silicon oxide film, a silicon nitride film, and the like are able to be used, and a thickness of the antireflective film 6, for example, is able to be greater than or equal to 10 nm and less than or equal to 200 nm. When the thickness of the antireflective film 6 is less than 10 nm, an effect as an antireflective film may not be sufficiently obtained, and when the thickness exceeds 200 nm, it is difficult for solar light to transmit the antireflective film 6, and thus it is not preferable.
This photoelectric conversion element of this embodiment is manufactured by the following manufacturing method. In other words, the photoelectric conversion element manufactured by the following manufacturing method exhibits the properties described above. Therefore, the photoelectric conversion element of this embodiment is a photoelectric conversion element which is able to improve power generation efficiency and is able to be manufactured by a simple manufacturing process.
Hereinafter, an example of a manufacturing method of the photoelectric conversion element 1 which is the first embodiment will be described with reference to schematic cross-sectional views of
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Here, the resist film 9 is not particularly limited, and as the resist film 9, for example, a film formed by printing alkali-tolerant resist ink in a portion other than a portion in which the opening portion 10 is formed using an ink jet method, and by drying the resist ink, or the like is able to be used.
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Next, the resist film 9 is removed and cleaned, and then as illustrated in
When the insulating film 16 is a silicon oxide film, the insulating film 16 is able to be formed by steam oxidization, an ordinary pressure CVD method, or the like, and it is preferable that the insulating film 16 is formed by a thermal oxidization method. Here, it is preferable that a treatment temperature of the thermal oxidization method is 800° C. to 1100° C. The thermal oxidization method is a simple method, improves properties of the silicon oxide film to be formed compared to other manufacturing methods, is precise, and has a high passivation effect, and thus it is preferable. Here, a thickness of the insulating film 16 to be formed is able to be adjusted according to a treatment time, and for example, is able to be greater than or equal to 1 nm and less than or equal to 500 nm. In addition, after the thermal oxidation treatment, a hydrogen annealing treatment may be performed. Here, a treatment temperature of the hydrogen annealing treatment, for example, is able to be 300° C. to 500° C.
In addition, when the insulating film 16 is a silicon nitride film, the insulating film 16 is able to be formed by a vapor deposition method or the like, and it is preferable that the insulating film 16 is formed by a plasma CVD method. When the silicon nitride film is formed by a plasma CVD method, mixed gas formed of silane (SiH4) gas and ammonia (NH3) gas, or the like is able to be used as raw material gas. Here, a thickness of the insulating film 16 to be formed is able to be adjusted according to a film forming time, a film forming pressure, or the like, and for example, is able to be greater than or equal to 1 nm and less than or equal to 500 nm.
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Here, the mask material 14 is not particularly limited insofar as a material functions as an etching mask of the second dielectric film 12 and the second semiconductor film 13, and among them, it is preferable to use a hot melt adhesive agent. Furthermore, the hot melt adhesive agent is in a solid state at normal temperature, and is a melted state by heating, and thus has properties in which ooze of the hot melt adhesive agent after being applied decreases.
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Thus, when in the first semiconductor film 8 and the second semiconductor film 13, the film formed of amorphous germanium is laminated on the film formed of amorphous silicon, the intermetallic compound layer 15 is able to be a metal germanide layer. When the intermetallic compound layer 15 is the metal germanide layer, it is preferable that the heat treatment temperature is greater than or equal to 100° C. and less than or equal to 500° C. Thus, the metal germanide layer is able to be formed at a low temperature compared to a metal silicide layer, and thus it is preferable.
This is because when a groove is formed in a semiconductor substrate as in this embodiment, the semiconductor substrate may be curved or the like due to the groove (that is, a portion in which a thickness of the semiconductor substrate is different) when a heat treatment is performed at a high temperature exceeding 600° C. Therefore, in order to prevent such a problem from occurring, it is necessary that the temperature at which the metal layer and the semiconductor film reacts with each other is less than or equal to 600° C. The metal germanide layer is able to be formed at less than or equal to 500° C., and the problem such as the curving of the semiconductor substrate does not occur, and thus it is particularly preferable.
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According to this embodiment, as the solar cell having the structure illustrated in
In addition, according to this embodiment, as the method illustrated in
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In addition, in this embodiment, the p-type electrode and the n-type electrode are formed in different positions in the thickness direction of the semiconductor substrate, and thus a gap between the p-type electrode and the n-type electrode on the back surface of the semiconductor substrate is able to be decreased, and it is not necessary to perform accurate patterning in order to form the p-type electrode and the n-type electrode having such a small gap. Here, it is difficult for a current to flow in a horizontal direction (a surface direction of a film) of an amorphous film (the first semiconductor film 8 and the second semiconductor film 13), and thus it is preferable that the gap between the p-type electrode and the n-type electrode on the back surface of the semiconductor substrate is as small as possible from a viewpoint of obtaining the photoelectric conversion element having high conversion efficiency. Then, in this embodiment, the p-type electrode and the n-type electrode are electrically separated from each other by the groove formed in the back surface and the insulating film formed on the side walls of the groove as described above, and thus a decrease in conversion efficiency which occurs when electric separation is not sufficient is prevented.
Further, in this embodiment, an entire flat surface of the back surface of the semiconductor substrate is able to be covered with the p-type electrode and the n-type electrode, and thus it is possible to reflect light transmitting the back surface side of the semiconductor substrate without being absorbed in light which is incident from the light receiving surface side of the semiconductor substrate by the p-type electrode and the n-type electrode. In addition, it is possible to reflect light transmitting the side wall of the groove by the insulating film formed on the side wall of the groove.
Further, in this embodiment, the entire flat surface of the back surface of the semiconductor substrate including the bottom surface of the groove of the semiconductor substrate is passivated by the i-type dielectric film, the n-type semiconductor film, and the p-type semiconductor film, and a part of the bottom surface of the groove and the side wall are also passivated by the insulating film. Therefore, excellent passivation properties are able to be obtained in the entire back surface of the semiconductor substrate, and it is possible to suppress a carrier recombination in the front surface of the semiconductor substrate.
According to the reasons described above, in this embodiment, it is possible to obtain the photoelectric conversion element having conversion efficiency which is higher than that of the solar cell having the structure illustrated in
In
In addition, an insulating film 116 is disposed between the first dielectric film 107 and the second dielectric film 112. Here, the insulating film 116 is formed in contact with side surface portions of the first dielectric film 107 and/or side surface portions of the second dielectric film 112. In addition, the insulating film 116 may be in contact with side surface portions of the first semiconductor film 108 and/or side surface portions of the second semiconductor film 113.
Similar to the photoelectric conversion element 1, a third dielectric film 104, a third semiconductor film 105, and an antireflective film 106 are disposed on a light receiving surface (a surface on an opposite side of the back surface) of the photoelectric conversion element 2. Here, as a semiconductor substrate, each film, a material and a thickness of each layer configuring the photoelectric conversion element 2, for example, the exemplifications described in the photoelectric conversion element 1 are able to be used.
Furthermore, in the photoelectric conversion element 2, a configuration in which the first semiconductor film 108 is n-type and the second semiconductor film 113 is p-type is exemplified, and even when the first semiconductor film p-type and the second semiconductor film is n-type, the effects of the present invention are obtained.
In addition, in the photoelectric conversion element 1, a configuration in which the third semiconductor film 105 is disposed on the light receiving surface is exemplified, but the third semiconductor film 105 is not a mandatory component, and even when the third semiconductor film 105 is not included, the effects of the present invention are obtained.
Such a photoelectric conversion element of this embodiment is manufactured by the following manufacturing method. In other words, the photoelectric conversion element manufactured by the following manufacturing method exhibits the properties described above. Therefore, the photoelectric conversion element of this embodiment is a photoelectric conversion element which is able to improve power generation efficiency and is able to be manufactured by a simple manufacturing process.
Hereinafter, an example of a manufacturing method of the photoelectric conversion element 2 which is the second embodiment will be described with reference to schematic cross-sectional views of
First, as illustrated in
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Next, the resist film 109 is removed and cleaned, and then, as illustrated in
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According to this embodiment, as the solar cell having the structure illustrated in
In addition, according to this embodiment, as the method illustrated in
Further, in this embodiment, an entire flat surface of the back surface of the semiconductor substrate is passivated by the i-type dielectric film, the n-type semiconductor film, the p-type semiconductor film, and the insulating film, and thus excellent passivation properties are able to be obtained in the entire back surface of the semiconductor substrate, and it is possible to suppress a carrier recombination in the front surface of the semiconductor substrate.
According to the reasons described above, in this embodiment, it is possible to obtain the photoelectric conversion element having conversion efficiency which is higher than that of the solar cell having the structure illustrated in
As described above, the embodiments of the present invention are described, and the configuration of respective embodiments described above is originally planned to be suitably changed.
It is able to be considered that the embodiments disclosed herein are examples in all respects, and are not limited. It is intended that the range of the present invention is indicated by Claims, but not by the above description, and includes all changes in the meaning equivalent to Claims and the range.
The present invention is able to be used in a photoelectric conversion element and a manufacturing method of a photoelectric conversion element.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2012-210904 | Sep 2012 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2013/075262 | 9/19/2013 | WO | 00 |
