Patent Application
20230417989
The present invention relates to photonic integrated circuit (PIC) structures and, more particularly, to embodiments of a PIC structure including a polarization device (e.g., a polarization splitter or a polarization combiner).
Photonic integrated circuit (PIC) structures often include polarization devices, such as polarization splitters or polarization combiners. Such polarization devices typically include a pair of waveguides with silicon (Si) cores. The main advantages associated with using Si cores in polarization devices are that they are compatible with complementary metal oxide semiconductor (CMOS) processing compatibility and that they can have a relatively small footprint. The main disadvantages associated with using Si cores in polarization devices are that they tend to exhibit significant power-dependent loss and they are not easily integrated with high-power photonic devices, such as high-power waveguides with silicon nitride (SiN) cores, because such integration requires the inclusion Si-to-SiN input and output transitions that tend to exhibit signal loss and increase area consumption.
In view of the foregoing, disclosed herein are embodiments of a PIC structure including a robust high-power polarization device (e.g., a high-power polarization splitter or a high-power polarization combiner). The polarization device can include a first waveguide and a second waveguide. The first waveguide can include a core (e.g., a SiN core) suitable for high-power applications. The second waveguide can be a stacked waveguide and can include: a primary core (e.g., another SiN core), which is positioned laterally adjacent to the core of the first waveguide and similarly suitable for high-power applications; and at least one secondary core, which is stacked vertically with the primary core (e.g., above and/or below) to steer the optical mode and ensure mode matching (e.g., TM-mode matching) occurs between adjacent first and second coupling sections of the first and second waveguides, respectively, in order to achieve high-power splitter and/or combiner functions. Optionally, the primary and secondary cores of the second waveguide can be tapered to increase the probability that mode matching will occur. Also, optionally, one or more input/output (I/O) ports of the core of the first waveguide and/or of the secondary core(s) of the second waveguide can be tapered to improve performance. Formation of such a polarization device is easily integrated with formation of other high-power photonic devices (e.g., SiN photonic devices).
Disclosed herein are embodiments of a structure including a first waveguide and a second waveguide. The first waveguide can have first end sections and a first coupling section between the first end sections. The first waveguide can include a first core. The second waveguide can have second end sections and a second coupling section, which is between the second end sections and which is further adjacent to the first coupling section. The second waveguide can be a stacked waveguide with multiple cores stacked vertically. Specifically, the second waveguide can include a second core (also referred to herein as a primary core), which is positioned laterally adjacent to the first core such that the first core and the second core are in the same horizonal plane (i.e., at the same level). The second waveguide can further include an additional second core (also referred to herein as a secondary core), which is stacked vertically with the second core (e.g., above or below).
In some embodiments of the structure, the second waveguide can include three or more cores stacked vertically. That is, some embodiments of the structure disclosed herein can include a first waveguide and a second waveguide. The first waveguide can have first end sections and a first coupling section between the first end sections. The first waveguide can include a first core. The second waveguide can have second end sections and a second coupling section, which is between the second end sections and which is further adjacent to the first coupling section. The second waveguide can be a stacked waveguide with multiple cores stacked vertically. Specifically, the second waveguide can include a second core (i.e., a primary core), which is positioned laterally adjacent to the first core such that the first core and the second core are in the same horizonal plane (i.e., at the same level). The second waveguide can further include multiple additional second cores (i.e., multiple secondary cores), which are stacked vertically with the second core (e.g., above and/or below).
In some embodiments of the structure, the cores of the second waveguide can be tapered at least within the second coupling section (e.g., to facilitate mode matching between the first and second coupling sections) and one or more input/output (I/O) ports of the first core within the first waveguide and/or of the additional second core(s) within the second waveguide can also be tapered for improved performance. That is, some embodiments of the structure disclosed herein can include a first waveguide and a second waveguide. The first waveguide can have first end sections and a first coupling section between the first end sections. The first waveguide can include a first core. The second waveguide can have second end sections and a second coupling section, which is between the second end sections and which is further adjacent to the first coupling section. The second waveguide can be a stacked waveguide with multiple cores stacked vertically. Specifically, the second waveguide can include a second core (also referred to herein as a primary core), which is positioned laterally adjacent to the first core such that the first core and the second core are in the same horizonal plane (i.e., at the same level). The second waveguide can further include an additional second core (also referred to herein as a secondary core), which is stacked vertically with the second core (e.g., above or below). Additionally, in these embodiments, the second core and the additional second core can be tapered at least within the second coupling section. Furthermore, at least one I/O port of the first core and/or the additional second core is also tapered.
The present invention will be better understood from the following detailed description with reference to the drawings, which are not necessarily drawn to scale and in which:
As mentioned above, photonic integrated circuit (PIC) structures often include polarization devices, such as polarization splitters or polarization combiners.
A polarization splitter includes a first waveguide and a second waveguide. The first waveguide has first end sections and a first coupling section, which extends between the first end sections. The second waveguide has second end sections and a second coupling section, which extends between the second end sections and is adjacent to the first coupling section. Both electric (TE)-mode light signals and transverse magnetic (TM)-mode light signals are received at a first input of a first end section and propagate toward a first output of the opposite first end section. However, prior to the light signals reaching the opposite first end section, some form of mode matching (e.g., TM-mode matching) occurs between the first coupling section and the second coupling section such that matched mode light signals pass from the first waveguide into the second waveguide and propagate toward a second output at a second end section of the second waveguide. Thus, light signals of one mode (e.g., TE-mode light signals) are output from the first output of the first waveguide and light signals of the other mode (e.g., TM-mode light signals) are output from the second output of the second waveguide.
A polarization combiner has essentially the same first and second waveguide configuration. However, in this case, light signals of one mode (e.g., TE-mode light signals) are received at a first input of a first end section of the first waveguide and propagate toward a first output of the opposite first end section. Light signals of the opposite mode (e.g., TM-mode light signals) are received at a second input of a second end section of the second waveguide and propagate toward a second output at the opposite second end section. However, prior to these light signals reaching the respective opposite end sections, some form of mode matching (e.g., TM-mode matching) occurs between the first coupling section and the second coupling section such that matched mode light signals pass from the second waveguide into the first waveguide and propagate toward the first output. Thus, light signals of both modes (i.e., TE-mode light signals and TM-mode light signals) are output from the first output of the first waveguide.
Typically, the first and second waveguides in a polarization device (i.e., in a polarization splitter or a polarization combiner) have silicon (Si) cores patterned from the same silicon layer within the PIC structure (e.g., the silicon layer of a silicon-on-insulator (SOI) substrate) such that these Si cores are essentially co-planar. The main advantages associated with using Si cores in polarization devices are that they are compatible with complementary metal oxide semiconductor (CMOS) processing compatibility and that they can have a relatively small footprint. The main disadvantages associated with using Si cores in polarization devices are that they tend to exhibit significant power-dependent loss and they are not easily integrated with high-power photonic devices, such as high-power waveguides with silicon nitride (SiN) cores, because such integration requires the inclusion Si-to-SiN input and output transitions that tend to exhibit signal loss and increase area consumption. Thus, there is a need in the art for polarization devices (e.g., polarization splitters and polarization combiners) that are easily integrated with high-power photonic device processing and that are more robust and exhibit improved performance in high-power applications.
In view of the foregoing, disclosed herein are embodiments of a PIC structure including a robust high-power polarization device (e.g., a high-power polarization splitter or a high-power polarization combiner). The polarization device can include a first waveguide and a second waveguide. The first waveguide can include a core (e.g., a SiN core) suitable for high-power applications. The second waveguide can be a stacked waveguide and can include: a primary core (e.g., another SiN core), which is positioned laterally adjacent to the core of the first waveguide and similarly suitable for high-power applications; and at least one secondary core, which is stacked vertically with the primary core (e.g., above and/or below) to steer the optical mode and ensure mode matching (e.g., TM-mode matching) occurs between adjacent first and second coupling sections of the first and second waveguides, respectively, in order to achieve high-power splitter and/or combiner functions. Optionally, the primary and secondary cores of the second waveguide can be tapered to increase the probability that mode matching will occur. Also, optionally, one or more I/O ports of the core of the first waveguide and/or of the secondary core(s) of the second waveguide can be tapered to improve performance. Formation of such a polarization device is easily integrated with formation of other high-power photonic devices (e.g., SiN photonic devices).
In each of these embodiments, the PIC structure can include a substrate 101. The substrate 101 can be, for example, a semiconductor substrate, such as a silicon substrate. The substrate can have a first surface (e.g., a bottom surface) and a second surface (e.g., a top surface) opposite the first surface. Optionally, the PIC structure can further include an insulator layer 104 on the second surface of the substrate 101. The insulator layer 104 can be, for example, a silicon dioxide layer (also referred to herein as a buried oxide (BOX) layer) or a layer of some other suitable insulator material.
As mentioned above, in each of these embodiments, the PIC structure can further include a polarization device (see polarization device 100.1 of
WG1 can have first end sections 111-112 and a first coupling section 113 extending laterally between the first end sections 111-112. Each first end section can have a corresponding I/O port distal to the first coupling section 113. WG1 can include a first core 110 and suitable cladding material (as discussed in greater detail below) surrounding the first core 110.
The first core 110 can have a strip/wire geometry, as illustrated. That is, first core 110 can be an elongated body and a vertical cross-sectional shape of this elongated body cutting across its width can be essentially rectangular with a planar bottom surface, a planar top surface opposite the planar bottom surface, and opposing sidewalls. Alternatively, the first core 110 could have some other suitable geometry (e.g., a rib geometry (not shown), etc.). The height of the elongated body of the first core 110 can be essentially uniform from one end to the other (as illustrated). The width of the elongated body of the first core 110 can also be essentially uniform (as illustrated). Alternatively, the width of the elongated body of the first core 110 could be tapered (e.g., within the first coupling section of WG) (not shown). Optionally, one or both of the I/O ports can also be tapered (as discussed in greater detail below with regard to
In any case, the first core 110 can be configured so that it is suitable for high-power applications. For example, the first core 110 can be made of SiN (i.e., can be a SiN core). Such a SiN core can be a MOL SiN core. That is, during processing, it can be formed in the MOL some distance above the level of any front end of the line (FEOL) active or passive semiconductor devices and below the level of any back end of the line (BEOL) metal levels.
WG2 can have second end sections 121-122 and a second coupling section 123, which extends laterally between the second end sections 121-122 and which is further adjacent to the first coupling section 113. At least the second end section 122 can have an I/O port distal to the second coupling section 123. WG2 can be a stacked waveguide including multiple cores and, particularly, a second core 120 (also referred to herein as a primary core) and one or more additional second cores 125 (also referred to herein as secondary core(s)) stacked vertically and suitable cladding material, as discussed in greater detail below, surrounding and physically separating each of the cores.
The second core 120 can be positioned laterally adjacent to the first core 110. The second core 120 can have a strip/wire geometry, as illustrated. That is, the second core 120 can be an elongated body and a vertical cross-sectional shape of this elongated body cutting across its width can be essentially rectangular with a planar bottom surface, a planar top surface opposite the planar bottom surface, and opposing sidewalls. Alternatively, the second core 120 could have some other suitable geometry (e.g., a rib geometry (not shown), etc.). The height of the elongated body of the second core 120 can be essentially uniform from one end to the other. As illustrated, the width of the elongated body of the second core 120 could be tapered at least within the second coupling section 123 of WG2 from a maximum width adjacent to the second end section 122 to a minimum width adjacent to the opposite second end section 121. Alternatively, the width of the elongated body of the second core 120 can be essentially uniform (not shown). However, it should be understood that tapering of the second core 120 in the second coupling section 123 of WG2 (as shown) and/or tapering of the first core 110 in the first coupling section 113 increases the probability that mode matching will occur between the first and second coupling sections in order to achieve the desired splitting and/or combining function. Within the second coupling section 123, the second core 120 can be essentially linear. Within one or both of the second end sections 121-122, the second core 120 can be curved. It should be understood that adjacent ends of the first core 110 and the second core 120 should include at least one curved end in order to ensure a smooth transition for splitting and/or combining operations.
In any case, the second core 120, like the first core 110, can be configured so as to be suitable for high-power applications. For example, the second core 120 can also be made of SiN (i.e., can also be a MOL SiN core). However, the second core 120 can have one or more dimensions that are smaller than the corresponding dimensions of the first core 110. For example, the width of the second core 120 in the second coupling section 123 can be less than the width of the first core 110 in the adjacent first coupling section 113. In some embodiments, as illustrated, the width of the second core 120 in the second coupling section 123 can be tapered from a maximum width adjacent to the second end section 122 to a minimum width adjacent to the opposite second end section 121 and the first core 110 can have an essentially uniform width that is approximately equal to or greater than the maximum width of the second core 112. As illustrated, the first core 110 and the second core 120 can have equal heights (e.g., co-planar bottom and top surfaces). Additionally or alternatively, the first core 110 and the second core 120 could have different heights (e.g., co-planar bottom surfaces but non-co-planar top surfaces).
As mentioned above, in some embodiments, as the width of the second core 120 in the second coupling section 123 can be tapered from a maximum width adjacent to the second end section 122 to a minimum width adjacent to the opposite second end section 121 and the first core 110 can have an essentially uniform width that is approximately equal to or greater than the maximum width of the second core 112. As illustrated in
As mentioned above, the second core 120 is only one of multiple cores, which are stacked vertically, in WG2. Each additional second core can be essentially center-aligned with the second core 120 either above or below. The structure embodiments can vary with regard to the total number additional second cores, the material(s) for the additional second core(s), the cladding material surrounding the stacked cores, the dielectric materials between the stacked cores, and/or the size(s) of the additional second core(s).
For example, in some embodiments, WG2 can include the second core 120 and a single additional second core.
The single additional second core can be, for example, a monocrystalline semiconductor core 125.1 (e.g., see the polarization device 100.1 of
Alternatively, the single additional second core can be a single polycrystalline semiconductor core 125.2 (e.g., see the polarization device 100.2 of
Alternatively, the single additional second core can be another MOL dielectric core 125.3 (e.g., see the polarization device 100.3 of
Alternatively, the single additional second core can be a BEOL core 125.4 (e.g., see the polarization device 100.4 of
In other embodiments, WG2 can include multiple additional second cores including, but limited to, any combination of the additional second cores described above and illustrated in
It should be understood that the FIGURES are not intended to be limiting. For example, for purposes of illustration only two additional second cores are shown in
It should be noted that, as illustrated in
As mentioned above, each of the cores within a polarization device (i.e., the first core 110 of WG1 and the second core 120 and additional second core(s) 125 of the WG2) will be surrounded by suitable cladding material. In order to facilitate and control optical signal propagation within and between these cores, the cladding material that is immediately adjacent to the core surfaces should have a smaller refractive index than the core material it clads. In each of the embodiments described above, the cladding material immediately adjacent to and surrounding the first core 110 and the second core 120 will be MOL dielectric material(s) 105. In embodiments where WG2 includes a monocrystalline Si core 125.1, the cladding material immediately adjacent to the bottom surface of the Si core 125.1 will be the dielectric material of the insulator 104 and the cladding material immediately adjacent to and surrounding the other surfaces will be MOL dielectric material(s) 105. In embodiments where WG2 includes a polySi core 125.2 and/or another MOL core 125.3, the cladding material immediately adjacent to and surrounding the polySi Core 125.2 will be MOL dielectric material(s) 105. In embodiments where WG2 includes a BEOL core 125.4, the cladding material immediately adjacent to and surrounding the polySi Core 125.2 will be BEOL dielectric material(s) 190. Thus, it should be understood that the insulator layer 104, MOL dielectric material(s) 105, and BEOL dielectric material(s) 190 should be selected in order to achieve the required refractive index differential between cladding and core.
For example, SiN can have a refractive index of approximately 2.0, Si can have a refractive index that varies from approximately 3.3 to approximately 3.6 and silicon dioxide (SiO2) can have a refractive index of less 1.6. So, in some embodiments, where the first core 110 and the second core 120 are SiN and where the additional second core(s) are any of Si, polySi and SiN, the insulator layer 104, MOL dielectric material 105, and BEOL dielectric material 190 cladding these cores could be SiO2. It should be noted that, since SiN has a refractive index that is lower than the refractive index of Si, the MOL dielectric material covering a Si core 125.1 and/or a polySi core 125.2 could include a thin conformal SiN layer (e.g., an etch stop layer) immediately adjacent to the core and a SiO2 layer on the SiN layer.
The exemplary cladding materials mentioned above are offered for illustration purposes. It should be understood that, alternatively, any other suitable cladding material could be used, depending upon the core material. The following is a list of exemplary materials (including the refractive indices (n) thereof) that could potentially be incorporated into the disclosed semiconductor structure as cladding material, depending upon the selected core materials as long as the desired refractive index differential is achieved (i.e., as long as the cladding material has a smaller refractive index than the core material it clads):
In operation, the polarization device 100.1-100.7 can function as a splitter or a combiner.
For example, in the case of a polarization splitter, electric (TE)-mode light signals and transverse magnetic (TM)-mode light signals can be received at the I/O in the first end section 111 of WG1 and can propagate toward the I/O in the opposite first end section 112. However, prior to the light signals reaching the opposite first end section 112, some form of mode matching (e.g., TM-mode matching) as a function of the stacked design of WG2 can occur between the first coupling section 113 of WG1 and the second coupling section 123 of WG2. Those skilled in the art will recognize that this mode matching will occur between the adjacent coupling sections 113, 123 at location where the two sections have the same propagation constant. Thus, matched mode light signals pass from WG1 into WG2 and propagate toward the I/O in the second end section 122 of WG2 and the remaining mode light signals within WG1 continue to the I/O of the first end section 112 of WG1 (e.g., TE-mode light signals are output at I/O of the first end section 112 of WG1 and TM-mode light signals are output at I/O of the second end section 122 of WG2).
Also for example, in the case of a polarization combiner, light signals of one mode (e.g., TE-mode light signals) are received at the I/O of the first end section 112 of WG1 and propagate toward the I/O of the opposite first end section 111 of WG1. Additionally, light signals of the opposite mode (e.g., TM-mode light signals) are received at the I/O of the second end section 122 of WG2 and propagate toward the opposite second end section 122 However, prior to these light signals reaching the respective opposite end sections in the WG1 and WG2, some form of mode matching (e.g., TM-mode matching) occurs between the first coupling section 113 and the second coupling section 123 as a function of the stacked design of the WG2 such that matched mode light signals (TM-mode light signals) pass from WG2 into WG1 and also propagate toward the I/O end of the first end section 111 of WG1. Thus, light signals of both modes (i.e., TE-mode light signals and TM-mode light signals) are output from the I/O of the first end section 111 of WG1.
Such polarization devices 100.1-100.7 (i.e., polarization splitters and/or polarization combiners) are easily integrated with high-power photonic device processing and are more robust and exhibit improved performance in high-power applications as compared to prior art Si-based polarization devices.
It should be understood that in the embodiments described above, a semiconductor material refers to a material whose conducting properties can be altered by doping with an impurity. Exemplary semiconductor materials include, for example, silicon-based semiconductor materials (e.g., silicon, silicon germanium, silicon germanium carbide, silicon carbide, etc.) and III-V compound semiconductors (i.e., compounds obtained by combining group III elements, such as aluminum (Al), gallium (Ga), or indium (In), with group V elements, such as nitrogen (N), phosphorous (P), arsenic (As) or antimony (Sb)) (e.g., GaN, InP, GaAs, or GaP). A pure semiconductor material and, more particularly, a semiconductor material that is not doped with an impurity for the purposes of increasing conductivity (i.e., an undoped semiconductor material) is referred to in the art as an intrinsic semiconductor. A semiconductor material that is doped with an impurity for the purposes of increasing conductivity (i.e., a doped semiconductor material) is referred to in the art as an extrinsic semiconductor and will be more conductive than an intrinsic semiconductor made of the same base material. That is, extrinsic silicon will be more conductive than intrinsic silicon; extrinsic silicon germanium will be more conductive than intrinsic silicon germanium; and so on. Furthermore, it should be understood that different impurities (i.e., different dopants) can be used to achieve different conductivity types (e.g., P-type conductivity and N-type conductivity) and that the dopants may vary depending upon the different semiconductor materials used. For example, a silicon-based semiconductor material (e.g., silicon, silicon germanium, etc.) is typically doped with a Group III dopant, such as boron (B) or indium (In), to achieve P-type conductivity, whereas a silicon-based semiconductor material is typically doped a Group V dopant, such as arsenic (As), phosphorous (P) or antimony (Sb), to achieve N-type conductivity. A gallium nitride (GaN)-based semiconductor material is typically doped with magnesium (Mg) to achieve P-type conductivity and with silicon (Si) or oxygen to achieve N-type conductivity. Those skilled in the art will also recognize that different conductivity levels will depend upon the relative concentration levels of the dopant(s) in a given semiconductor region.
It should further be understood that the terminology used herein is for the purpose of describing the disclosed structures and methods and is not intended to be limiting. For example, as used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, as used herein, the terms “comprises” “comprising”, “includes” and/or “including” specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Furthermore, as used herein, terms such as “right”, “left”, “vertical”, “horizontal”, “top”, “bottom”, “upper”, “lower”, “under”, “below”, “underlying”, “over”, “overlying”, “parallel”, “perpendicular”, etc., are intended to describe relative locations as they are oriented and illustrated in the drawings (unless otherwise indicated) and terms such as “touching”, “in direct contact”, “abutting”, “directly adjacent to”, “immediately adjacent to”, etc., are intended to indicate that at least one element physically contacts another element (without other elements separating the described elements). The term “laterally” is used herein to describe the relative locations of elements and, more particularly, to indicate that an element is positioned to the side of another element as opposed to above or below the other element, as those elements are oriented and illustrated in the drawings. For example, an element that is positioned laterally adjacent to another element will be beside the other element, an element that is positioned laterally immediately adjacent to another element will be directly beside the other element, and an element that laterally surrounds another element will be adjacent to and border the outer sidewalls of the other element. The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
