(A) Field of the Invention
The present invention relates to a photovoltaic cell structure, and more specifically, to a thin-film photovoltaic cell structure including Copper Indium Gallium Diselenide (CIGS).
(B) Description of the Related Art
Normally, copper Indium Gallium Diselenide thin-film solar cells are one of two types; one is comprised of copper, indium and selenium, and another is comprised of copper, indium, gallium and selenium. Because of the high photoelectrical efficiency and low material cost, solar cell development is expected to continue at a rapid pace. The photoelectrical efficiency of CIGS solar cells in the laboratory can reach around 19%, and 13% for related solar cell modules.
U.S. Pat. No. 6,258,620 disclosed a CIGS photovoltaic cell structure like that shown in
The present invention provides a photovoltaic cell structure using a high resistivity layer to prevent electrical shorts between the transparent conductive layer (e.g., cathode) and the conductive metal layer (e.g., anode), and to increase throughput and reduce manufacturing material consumption.
In accordance with an embodiment of the present invention, a photovoltaic cell structure includes a substrate, a metal layer, a high resistivity layer, a p-type semiconductor layer, an n-type semiconductor layer and a transparent conductive layer. The metal layer may include vanadium and may be formed on the substrate to be a back contact metal layer of the cell. The high resistivity layer (e.g., V2O5) is formed on the metal layer. The p-type semiconductor layer is formed on the high resistivity layer and may include a compound of copper indium gallium selenium sulfur (CIGSS), copper indium gallium selenium (CIGS), copper indium sulfur (CIS), copper indium selenium (CIS) or a compound of at least two of copper, selenium or sulfur. The n-type semiconductor layer (e.g., CdS) is formed on the p-type semiconductor layer, thereby forming a p-n junction therebetween. The transparent conductive layer is formed on the n-type semiconductor layer.
The high resistivity layer can be very thin, e.g., 25 to 2000 angstroms, to avoid shorts between the cathode and anode of the cell. The manufacturing of the present invention is simple, fast and throughput can be easily increased.
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
The metal layer 22 may be made of vanadium to comply with the chemical characteristics of CIS or CIGS and to withstand high temperature while the p-type semiconductor layer 24 (CIGS) is deposited. V2O5 exhibits high resistivity, so that it can be formed on the metal layer 22 as a carrier stop layer to avoid shorts.
As mentioned in the description of related art, the intrinsic ZnO layer for preventing shorts is conventionally formed by using physical sputtering. In sputtering, a ZnO target is bombarded with high energy and is ionized for film deposition. This process is complicated and is performed at a low temperature with a low deposition rate. Moreover, the intrinsic ZnO is a film to avoid shorts, and the surface of the CIGS layer is rough, so that the ZnO cannot be too thin and a thickness larger 600 angstroms is required; otherwise the prevention of shorts may be not effective. Moreover, ZnO film is difficult to be formed and is easily moisturized; the process control and device characteristics are limited.
According to the present invention, in contrast to the intrinsic ZnO layer, the high resistivity layer such as V2O5 can be formed by evaporation that is simple and can be performed at a high temperature to increase film deposition rate and throughput. In addition, the required thickness of a V2O5 layer, e.g., 25 to 2000 angstroms, is thinner than that of ZnO; thus in addition to the increase of process rate, the material consumption can be decreased. The thickness of the high resistivity layer between 25 and 2000 angstroms can effectively avoid shorts.
V2O5 is a p-type semiconductor, but other semiconductor compound of n-type or other insulation material having capacitive effect can also be used. In summary, the p-type or n-type semiconductor compound for the high resistivity layer 23 may be metal oxide or metal nitride. The metal oxide may be vanadium oxide, tungsten oxide, molybdenum oxide, copper oxide, iron oxide, tin oxide, titanium oxide, zinc oxide, zirconium oxide, lanthaium oxide, niobium oxide, indium tin oxide, strontium oxide, cadmium oxide, indium oxide or mixture or alloy thereof, and may further include insulation materials having capacitive effect such as silicon, aluminum oxide or the like.
In summary, the high resistivity layer 23 placed in the photovoltaic cell structure 20 can effectively prevent short occurrence between the metal layer 22 and the transparent conductive layer 26, and is thinner, thereby increasing throughput.
The above-described embodiments of the present invention are intended to be illustrative only. Numerous alternative embodiments may be devised by those skilled in the art without departing from the scope of the following claims.
Number | Date | Country | Kind |
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097147950 | Dec 2008 | TW | national |