Patent Application
20110240123
The present invention generally relates to the structure and production of photovoltaic cells. More particularly, the invention relates to structure of and production of CdS/CdTe thin-film photovoltaic cells.
Polycrystalline n-CdS/p-CdTe heterojunction solar cells are attractive for large-scale, terrestrial electricity generation. In order to achieve high efficiency in a solar cell, the CdS/CdTe heterojunction structure is often subjected to additional bulk and surface treatments subsequent to the deposition of the CdS and CdTe layers. These treatment steps are needed to improve the crystalline quality of the CdTe thin film and to produce a chemically modified CdTe surface for making ohmic or low-resistance electrical contact.
An established process suitable for the manufacture of high-efficiency CdS/CdTe solar cells is as follows: in sequence, CdS and CdTe layers are deposited in a vacuum chamber by a close-space sublimation method (CSS) on a transparent conducting oxide (TCO) substrate, such as tin oxide coated soda lime glass, which also forms the front contact electrode through which the solar cell is illuminated. Following the CdS/CdTe deposition, the substrate/TCO/CdS/CdTe structure is annealed in CdCl2 vapor at an elevated temperature. Following the CdCl2 vapor treatment, the exposed surface of the p-CdTe layer is treated in an etching solution to form a Te-rich surface, which is essential in forming low-resistance back contact to the p-CdTe. The cell is then completed with the deposition of the back electrode, which is typically an evaporated layer of metal or a screen-printed layer of a conductive paste.
Although it is expected that a high work function metal such as Au or Ni would be useful providing the low-resistance contact to the p-CdTe, in practice such metal/p-CdTe contacts are not useful because they can cause degradation in the solar cell during operation or at elevated temperature due to chemical reaction or metal diffusion. To address the instability of the p-CdTe/back electrode interface, the p-CdTe is subjected to a wet process, known as NP treatment, where the CdTe film is dipped in a mixture of nitric and phosphoric acid solutions. This process has been adopted as a standard process in CdS/CdTe solar cell fabrication, but again, it necessitates a wet processing step. (Tyan U.S. Pat. No. 4,319,063)
The solution etching step, which involves dipping the substrate/TCO/CdS/CdTe structure in a nitric/phosphoric acid bath (known as NP treatment) for a short time, necessitates its removal from the vacuum chamber and therefore can, cause process interruption and inefficiency in the cell fabrication. It would be advantageous to carry out the entire CdS/CdTe cell fabrication process from the beginning to the finish using an in-line physical vapor deposition process, and this would require the elimination of the solution NP treatment step and the development of a new CdTe surface treatment step that is compatible with the in-line process.
Based on the foregoing, there exists an ongoing and unmet need for a viable photovoltaic cell fabrication process which can be carried out without the need for wet processing steps.
The present invention provides a device structure for photovoltaic cells. The photovoltaic cells of the present invention have the advantages such as, for example, high efficiency, improved contact properties such as achieving low-resistance contact to the p-type semiconductor layer in photovoltaic cells (e.g., p-CdTe), eliminating a solution processing step in the cell fabrication process and improving the cell fabrication throughput by using a continuous dry process (e.g., in-line physical vapor deposition process) for all the cell layers.
In one embodiment, the present invention provides a device structure for CdS/CdTe photovoltaic cells. The device comprises a layer of metal oxide, MOx, as the back buffer layer in a device structure comprising, in sequence,
a) a semitransparent substrate,
b) a semitransparent front electrode,
c) a layer of CdS,
d) a layer of CdTe,
e) a layer of MOx, and
f) a back electrode.
The MOx buffer layer can be, for example, a metal oxide with a work function higher than 5.8 eV. The metal oxide can, for example, be a stoichiometric or non-stoichiometric metal oxide.
The present invention provides a device structure for photovoltaic cells. The present invention also provides a method for fabrication of such cells.
In one aspect, the present invention provides a device structure with a back buffer layer between the semiconductor and back electrode comprising a metal oxide, MOx. A metal oxide layer can be deposited by any method known in the art, such as, for example, vapor deposition.
Some of the advantages of this invention include: a) achieving high efficiency in photovoltaic (e.g., CdS/CdTe) cells, b) improved contact properties such as achieving low-resistance contact to the p-type semiconductor layer in photovoltaic cells (e.g., p-CdTe), c) eliminating a solution processing step in the cell fabrication process, and d) improving the cell fabrication throughput by using a continuous, dry process (e.g., in-line physical vapor deposition process) for all the cell layers.
In one embodiment the present invention provides a photovoltaic cell comprising: a) a transparent (or semitransparent) substrate, b) a semitransparent front electrode, c) a front buffer layer, d) a layer of n-type semiconductor, e) a layer of p-type semiconductor, f) a back buffer layer, and g) a back electrode.
For example, in general, a basic CdS/CdTe solar cell of the present invention comprises a layer of n-type semiconductor (e.g., CdS) and a layer of p-type semiconductor (e.g., CdTe). Sandwiching these two layers are the front electrode, which is in contact with the n-type semiconductor, and a back electrode, which is in contact with the p-type semiconductor. These layers are formed on a transparent substrate. Thus, in one embodiment, the present invention provides a CdS/CdTe photovoltaic cell with a device structure comprising, in sequence, a) a semitransparent substrate, b) a semitransparent front electrode, c) a layer of CdS, d) a layer of CdTe, e) a layer of MOx and f) a back electrode.
A substrate (e.g., substrate 10 of the CdS/CdTe photovoltaic cell depicted graphically in
A front electrode is in direct contact with the substrate (e.g., front electrode 20 of the CdS/CdTe photovoltaic cell depicted graphically in
A front buffer layer comprises a semi-insulating, wide-bandgap material. The front buffer layer is in contact with front electrode (e.g., front buffer layer (30) is deposited on top of the TCO layer 20 in
An n-type semiconductor layer, whose primary function is to form a heterojunction with the p-type semiconductor layer, e.g. CdTe layer 50, is in contact with the front buffer layer or front electrode. Any n-type semiconductor material with the appropriate band gap can be used. The n-type semiconductor should have a band gap greater than that of the p-type semiconductor layer. Also, the band gap should be such that the n-type semiconductor layer does not absorb incident light. The typical thickness of the n-type semiconductor layer, e.g., CdS layer, is about 100 nm or less. The thickness of the n-type semiconductor layer is usually kept as low as possible to permit maximum light transmission in this layer and therefore maximum light absorption in the n-type/p-type (e.g., CdS/CdTe) heterojunction region and in the bulk of the p-type (e.g., CdTe layer), where charge generation takes place.
In one embodiment, the n-type semiconductor is cadmium sulfide or an alloy of cadmium sulfide. For example, a cadmium sulfide alloy can be formed by at least partially replacing Cd with Zn, Mg, Mn, or the like. As another example, a cadmium sulfide alloy can be formed by at least partially replacing sulfide with Te, Se, O, or the like.
For example, in
It is preferable to use n-type and p-type semiconductors that have good lattice match. For example, CdS is the preferred material when CdTe is the p-type semiconductor because it has a better lattice match with CdTe.
A p-type semiconductor is in contact with the n-type semiconductor forming a p-n heterojunction. The function of the p-type semiconductor (e.g., CdTe layer) is to form a p-n heterojunction structure (e.g., CdS/CdTe structure) with the n-type semiconductor layer (e.g., CdS layer) and to serve as the active absorber layer in the solar cell for capturing sunlight. The p-type semiconductor layer can be any II-VI semiconductor. For example, in
In one embodiment, the p-type semiconductor is cadmium telluride or an alloy of cadmium telluride. For example, a cadmium telluride alloy can be formed by at least partially replacing Cd with Zn, Mg, Mn, or the like. As another example, a cadmium sulfide alloy can be formed by at least partially replacing telluride with S, Se, O, or the like.
Any of the methods known in the art can be used to deposit this layer, including, for example, sputtering and close-space sublimation. Close-space sublimation is preferred because it is capable of depositing a crystalline CdTe film at very high deposition rates. In one embodiment, close-space sublimation was used to deposit the p-type semiconductor layer (see Examples). To produce a p-type CdTe film using the close-space sublimation method, it is necessary to use oxygen as a carrier gas. Without intending to be bound by any particular theory, it is considered that the oxygen carrier gas acts as p-type dopant in CdTe.
To further improve the performance of CdS/CdTe photovoltaic cells, a CdCl2 treatment can, optionally, be applied after CdTe deposition. Such treatment can, for example, improve the film crystallinity, increase the grain size, introduce shallow dopants, and reduce lattice mismatch between CdS and CdTe.
The various layers can, optionally, be subjected to post-deposition processing. For example, in the case of the CdTe layer, after CdCl2 treatment, it is may be necessary to remove residual CdCl2 and other surface contaminants, e.g., by thermally annealing the CdS/CdTe film in vacuum or by cleaning with deionized water.
A back buffer layer is a metal oxide of suitable work function. In one embodiment, the back buffer layer comprises stoichiometric or non-stoichiometric metal oxide, e.g., molybdenum oxide, MoOx, (where x is equal to or less than 3), and has a work function of 10% or higher than that of the p-type semiconductor with which it makes contact.
The term work function, according to a standard text book, e.g., S. M. Sze, Physics of Semiconductor Devices, 2nd Edition, Wiley Science, 1981, pages 250-251, is the minimum energy necessary for an electron to escape into vacuum measured from the Fermi level of the material. For a metal oxide, the Fermi level resides in between the conduction band and valence band, and therefore could have a large range of values that depend on several factors, one factor being the specific stoichiometric composition of the metal oxide. The higher is the work function for the metal oxide, the lower is energy barrier for hole injection from the metal oxide to the valence band of the p-type semiconductor. Thus, the contact formed between a high work function metal oxide and a p-type semiconductor can in a limit become ohmic, i.e., possessing little electrical resistance, when the work function of the metal oxide is higher than that of the p-type semiconductor. Further, the work function of the metal oxides can be sensitive to the stoichiometric composition and surface contamination. For MoOx, for instance, the work function values can range from 4.9 to 6.8 eV, depending on the method of preparation and the history of MoOx film exposure to contaminating environments (e.g., atmosphere). It is understood that it is the alignment of the work function of the metal oxide with that of the p-type semiconductor, e.g., p-CdTe, that determines the contact energy barrier. This is to be distinguished from the use of very thin insulating film, including metal oxide films, for producing low-barrier contact, where the insulating film behaves as a tunneling channel for electrons or holes to pass from a contacting metal to the semiconductor or vice versa.
The function of this buffer layer is to provide an improved low-resistance contact between the p-type semiconductor, e.g., CdTe layer 50, and the back electrode, e.g., the back electrode 60 in
In the present invention, a class of metal oxides has been found to be useful as the back buffer layer material for the back electrode in photovoltaic cells, e.g., CdS/CdTe solar cells. These metal oxides generally include transition metal oxides, including, for example, molybdenum oxide, nickel oxide, tungsten oxide, vanadium oxide and tantalum oxide. Thus, in various embodiments, the metal oxide includes metal oxides including, for example, MoOx, WOx, VOx, TaOx, and NiOx, where the subscript x indicates either stoichiometric or nonstoichiometric composition for the metal oxides. A necessary criterion for these oxides is that they have a work function that matches that of the p-type semiconductor material, e.g., p-CdTe which has a work function of 5.8 eV.
In one embodiment, the metal oxide work function matches that of the p-type semiconductor when the metal oxide work function is equal to or greater than the work function of the p-type semiconductor. In various embodiments, the metal oxide work function matches that of the work function of the p-type semiconductor when the metal oxide work function is 1 to 10%, including all integers between 1 and 10%, or greater than the work function of the p-type semiconductor.
The thickness of the metal oxide back buffer layer is 1 to 100 nm, including all integers therebetween. In one embodiment, the thickness of a MoOx back buffer layer applied to p-CdTe can be 1 to 100 nm, including all integers therebetween, and the work function of the MoOx layer can be varied from 4.9 eV to 6.8 eV, depending on the deposition conditions. Generally, the work function is related to the oxygen content of the metal oxide. For example, for MoOx the work function increases with increasing oxygen content.
In one embodiment, the back buffer layer is amorphous. For example, amorphous MoOx can be used as a back buffer layer. In another embodiment, the back buffer layer is crystalline. For example, as-deposited amorphous MoOx can be annealed at a high temperature (>200° C.) such that it crystallizes.
Any of the deposition methods known in the art can be used to deposit the back buffer layer. Examples include, but are not limited to, physical vapor deposition and atomic layer epitaxy. A preferred deposition method for fabrication of the back buffer layer is physical vapor deposition, which includes, for example, sputtering, e-beam and resistive heating methods.
The present invention provides a desirable alternative to the NP treatment by using a metal oxide buffer layer that can be conveniently deposited by a variety of physical vapor deposition methods, including sputtering, e-beam and resistive heating. Thus, the process for the fabrication of the solar cell will not require a wet process, as in the NP treatment, and can therefore be streamlined to include only dry processes, e.g., vapor deposition, for all the layers.
A back electrode is in contact with the back buffer layer. For example, in
The present invention provides a system for generating electrical energy. In one embodiment, the present invention provides a solar cell comprising the photovoltaic cells of the present invention, a electrical connection connected to the front electrode and a electrical connection to the back electrode. In one embodiment, the system comprises a plurality of photovoltaic cells.
In another embodiment, the photovoltaic cells of the present invention are used to generate electricity by converting photons to electrical charge carriers. For example, a photovoltaic cell of the present invention can be used to generate electricity by impinging photons of the appropriate wavelength (e.g., sunlight) on the cell resulting in the generation of charge carriers and thus, electrical current.
Devices fabricated according to the present invention exhibit improved performance. For example, devices with a metal oxide back buffer layers exhibit improved performance relative to devices fabricated without such back buffer layers or devices fabricated using wet-processing methods, such as the NP method. Examples of improved performance include, but are not limited to, increased current density, open circuit voltage, fill factor and/or efficiency.
In another aspect, the present invention provides a method of improving the electrical contact between a semiconducting material and an electrode material. In one embodiment, the method improves the electrical contact between a p-type semiconductor layer and metal electrode layer in, for example, a photovoltaic cell, by depositing a metal oxide layer on the p-type semiconductor layer and subsequently depositing a back electrode layer such as a metal layer.
In another aspect, the present invention provides a method of fabrication to produce photovoltaic cells where all of the steps are dry (i.e., no wet processing steps are required). In one embodiment, all of the steps in the process are carried out under vacuum. Optionally, all of the steps can be carried out in the same apparatus.
The following examples are presented to illustrate the present invention. They are not intended to limiting in any manner.
CdS/CdTe photovoltaic cells were prepared using a process described as follows. Commercially available soda lime glass with SnO2:F coating was used as the substrate. A layer of CdS film was deposited on top of the substrate using chemical bath deposition method as described by Chu et al. in “Solution-Grown Cadmium Sulfide Films for Photovoltaic Devices”, Journal of Electrochemical Society, vol. 139, pp. 2443-2446 (1992). CdTe film was deposited on top of CdS using a close-space sublimation method as described by Tyan in “Topics on Thin Film CdS/CdTe Solar Cells”, Solar Cells, vol. 23, pp. 19-29 (1988). Following the CdTe deposition, a cadmium chloride vapor treatment step was performed in a method as described by McCandless et al. in “Optimization of Vapor Post-deposition Processing for Evaporated CdS/CdTe Solar Cells”, Progress in Photovoltaics, vol. 7, pp. 21-30 (1999). After the cadmium chloride treatment, a back electrode, nickel, was deposited by vapor deposition onto the CdTe to form the back electrode. This completed the fabrication of the reference cell without the back buffer layer. For cells with the back buffer layer, the buffer layer was deposited on the CdTe by either sputtering or resistive thermal deposition, prior to the deposition of the back electrode.
Current-voltage (J-V) traces for the photovoltaic cells under illumination were obtained using a solar simulator with light intensity of about 80 mW/cm2. Photovoltaic performance parameters: open-circuit voltage (VOC), short-circuit current density (JSC), fill factor (FF) and cell efficiency (ηeff) were calculated from the J-V traces. The value of short-circuit current density was normalized with the equivalent of Air Mass 1.5 global illumination of 100 mW/cm2.
CdS/CdTe photovoltaic cells were prepared as described in Example 1, except that NiOx was used as the back buffer layer instead of MoOx. The NiOx layer was deposited on top of the p-CdTe layer by reactive sputtering in a mixture of oxygen and argon.
In this example, the back buffer layer for the CdS/CdTe cell was prepared using the conventional NP treatment. With this treatment, the CdS/CdTe cell was dipped in a mixture of nitric and phosphoric acids for a duration of several tens of seconds to produce a tellurium rich surface on top of the CdTe as the back buffer layer. The back electrode was then applied by vapor deposition to this buffer layer to complete the cell fabrication.
Table 3 summarizes the cell performance parameters. It is noted that the VOC, JSC, FF and the overall efficiency are lower for the cells with a thin CdTe layer (2.75 μm and below). Attempts to make cells with a CdTe layer of thickness below 1.8 μm resulted in shorted cells, apparently due to pin-hole formation caused by the solution NP treatment.
The Example discusses photovoltaic cells of the present invention where the back buffer layer comprises MoOx.
In this example, the back buffer layer for the CdS/CdTe cell was a thin layer of MoOx prepared by a dry deposition method. The MoOx film was deposited by vapor deposition in a vacuum chamber using MoO3 powder as the vapor source and a resistive element as the heat source. MoOx film was typically deposited at a rate of 1 nm per sec onto the CdTe surface. After the deposition of MoOx layer, the back electrode was then applied by vapor deposition to this buffer layer to complete the cell fabrication.
This example illustrates that with MoOx as the back buffer layer, various metals can be used as the back contact electrode.
While the invention has been particularly shown and described with reference to specific embodiments (some of which are preferred embodiments), it should be understood by those having skill in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present invention as disclosed herein.
