Patent Application
20150243815
1. Technical Field
Embodiments of the present invention generally relate to photovoltaic (PV) devices, such as solar cells, with increased efficiency and greater flexibility and methods for fabricating the same.
2. Description of the Related Art
As fossil fuels are being depleted at ever-increasing rates, the need for alternative energy sources is becoming more and more apparent. Energy derived from wind, from the sun, and from flowing water offer renewable, environment-friendly alternatives to fossil fuels, such as coal, oil, and natural gas. Being readily available almost anywhere on Earth, solar energy may someday be a viable alternative.
To harness energy from the sun, the junction of a solar cell absorbs photons to produce electron-hole pairs, which are separated by the internal electric field of the junction to generate a voltage, thereby converting light energy to electric energy. The generated voltage can be increased by connecting solar cells in series, and the current may be increased by connecting solar cells in parallel. Solar cells may be grouped together on solar panels. An inverter may be coupled to several solar panels to convert DC power to AC power.
Nevertheless, the currently high cost of producing solar cells relative to the low efficiency levels of contemporary devices is preventing solar cells from becoming a mainstream energy source and limiting the applications to which solar cells may be suited. Accordingly, there is a need for more efficient photovoltaic devices suitable for a myriad of applications.
Embodiments of the present invention generally relate to methods and apparatus for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells.
One embodiment of the present invention provides a photovoltaic (PV) device. The PV device generally includes a window layer, an absorber layer disposed below the window layer such that electrons are generated when photons travel through the window layer and are absorbed by the absorber layer, and a plurality of contacts for external connection coupled to the absorber layer, such that the contacts for external connection are disposed below the absorber layer and do not block the photons from reaching the absorber layer through the window layer.
Another embodiment of the present invention is a method of fabricating a PV device. The method generally includes forming a window layer above a substrate, forming an absorber layer above the window layer such that electrons are generated when photons travel through the window layer and are absorbed by the absorber layer, and forming a plurality of contacts for external connection coupled to the absorber layer, such that the contacts for external connection are disposed above the absorber layer and do not block the photons from reaching the absorber layer through the window layer.
So that the manner in which the above-recited features of the invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
Embodiments of the present invention provide techniques and apparatus for converting electromagnetic radiation, such as solar energy, into electric energy with increased efficiency when compared to conventional solar cells.
The PV unit 100 may comprise a window layer 106 formed above the substrate and any underlying buffer layer(s). The window layer 106 may comprise aluminum gallium arsenide (AlGaAs), such as Al0.3Ga0.7As. The window layer 106 may be undoped. The window layer 106 may be transparent to allow photons to pass through the window layer on the front side of the PV unit to other underlying layers.
A base layer 108 may be formed above the window layer 106. The base layer 108 may comprise any suitable group III-V compound semiconductor, such as GaAs. The base layer 108 may be monocrystalline and may be n-doped.
As illustrated in
The contact of an n-doped base layer to a p+-doped emitter layer creates a p-n layer 112. When light is absorbed near the p-n layer 112 to produce electron-hole pairs, the built-in electric field may force the holes to the p+-doped side and the electrons to the n-doped side. This displacement of free charges results in a voltage difference between the two layers 108, 110 such that electron current may flow when a load is connected across terminals coupled to these layers.
Rather than an n-doped base layer 108 and a p+-doped emitter layer 110 as described above, conventional photovoltaic semiconductor devices typically have a p-doped base layer and an n+-doped emitter layer. The base layer is typically p-doped in conventional devices due to the diffusion length of the carriers.
Once the emitter layer 110 has been formed, cavities or recesses 114 may be formed in the emitter layer deep enough to reach the underlying base layer 108. Such recesses 114 may be formed by applying a mask to the emitter layer 110 using photolithography, for example, and removing the semiconductor material in the emitter layer 110 not covered by the mask using any suitable technique, such as wet or dry etching. In this manner, the base layer 108 may be accessed via the back side of the PV unit 100.
For some embodiments, an interface layer 116 may be formed above the emitter layer 110. The interface layer 116 may comprise any suitable group III-V compound semiconductor, such as GaAs. The interface layer 116 may be p+-doped.
Once the epitaxial layers have been formed, the functional layers of the PV unit 100 (e.g., the window layer 106, the base layer 108, and the emitter layer 110) may be separated from the buffer layer(s) 102 and substrate during an epitaxial lift-off (ELO) process.
Electrical contacts may be used to couple the semiconductor layers of the PV unit 100 to wires for connection to other PV units and for external connection to a load. A conventional solar cell typically has contacts on both the front and back sides of the cell. Front side contacts, especially thicker ones, create shadows where light cannot reach the underlying absorber layer to be converted into electric energy. Therefore, the efficiency potential of the solar cell cannot be obtained. Accordingly, techniques and apparatus for contacting the semiconductor layers of the PV unit without introducing shadows are needed.
The pattern of the recesses 114 in the emitter layer 110 and the remaining portion of the interface layer 116 for the contacts 602, 604 may be based on the desired sheet resistance. The dimensions (e.g., area) of the contacts 602, 604 may be very small compared to the dimensions (e.g., area) of a single PV unit 100. What is more, the pattern of the contacts 602, 604 may provide a built-in tolerance against local defects and shadowing.
The contacts 602, 604 may comprise any suitable electrically conductive material, such as a metal or a metal alloy. Preferably, the material for the contacts should not punch through the semiconductor layers during fabrication. Traditional contacts comprising gold (Au) often had this spiking problem. Furthermore, the material for the back side contacts may preferably be capable of being applied at relatively low metallization process temperatures, such as between 150 and 200° C. For example, the contact 602, 604 may comprise palladium/germanium (Pd/Ge) to meet these design goals. Palladium does not react with GaAs.
Whatever material is selected, the contacts 602, 604 may be fabricated on the PV unit 100 by any suitable method, such as vacuum-evaporation through a photoresist, photolithography, screen printing, or merely depositing on the exposed portion of the PV units that have been partially covered with wax or another protective material. These methods all involve a system in which the part of the PV unit on which a contact is not desired is protected, while the rest of the PV unit is exposed to the metal. Of these, screen printing may be the most cost effective, helping to decrease the cost of the resulting PV devices.
Despite all the contacts 602, 604 being on the back side of the PV unit 100 to reduce solar shadows, dark current and its stability with time and temperature may still be concerns when designing an efficient PV unit. An exposed p-n layer 112 may be a source of dark current, and larger recesses 114 may be responsible for an increase in dark current. Thus, smaller recesses 114 may be desired. However, there is a tradeoff between reducing the size of the recesses 14 to reduce dark current and the probability of fabricating the n-contacts 602 in the recesses 114 without touching the sidewalls.
Therefore, for some embodiments, the sidewalls of the recesses 114 may be passivated as another way to reduce the dark current in the PV unit.
While the foregoing is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application is a continuation application of U.S. patent application Ser. No. 12/605,151 filed Oct. 23, 2009 which claims benefit of U.S. Provisional Patent Application Ser. No. 61/107,966 filed Oct. 23, 2008, which is herein incorporated by reference in its entirety.
| Number | Date | Country | |
|---|---|---|---|
| 61107966 | Oct 2008 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 12605151 | Oct 2009 | US |
| Child | 14706704 | US |
