The present invention relates to a photovoltaic power device and a manufacturing method thereof.
To improve the performance of photovoltaic power devices such as solar batteries, as to how efficiently sunlight is to be taken into inside of a photovoltaic power device is an important factor. Therefore, conventionally, a texture structure having intentionally formed a fine uneven concavo-convex shape in a size of dozens of nanometers to dozens of micrometers on a surface of a light incidence side is manufactured. In this texture structure, light once reflected on a surface is made to enter the surface again to take more sunlight into the inside of the photovoltaic power device, thereby increasing a generated current and improving its photoelectric conversion efficiency.
As a method of forming a texture structure on a solar battery substrate, when a substrate is a monocrystalline silicon (Si) substrate, an anisotropic etching process using a crystal orientation of an alkaline aqueous solution such as a sodium hydroxide solution and a potassium hydroxide solution having crystal orientation dependency in etching speed is widely used (see, for example, Patent Document 1). For example, when an anisotropic etching process is performed on a substrate surface having an (100) surface orientation on the surface, a pyramid-shaped texture having an exposed (111) surface is formed.
However, in the case of a polycrystalline silicon substrate, according to a method of performing an anisotropic etching process by using an alkaline aqueous solution, a crystal surface orientation of crystal particles constituting a substrate surface is not aligned, and the anisotropic etching process itself using a alkaline aqueous solution has an etching rate greatly different depending on the crystal surface. Therefore, a texture structure can be manufactured only partially. Because of this problem, there is a limit in reducing the reflection ratio in the case of the polycrystalline silicon substrate. For example, when the reflection ratio for a wavelength of 628 nanometers is considered, the reflection ratio is about 36% for silicon of which surface is mirror-polished, and the reflection ratio is about 15% for a monocrystalline silicon substrate of a (100) surface when it is wet-etched. The reflection ratio is about 27% to 30% for a polycrystalline silicon substrate when it is wet-etched.
As a method of forming a texture structure on the whole surface without depending on a crystal surface orientation, a technique of mixed acid etching using an etching mask has been proposed (see, for example, Patent Document 2). As a manufacturing method of an etching mask, there can be used a method according to lithography, which is used in a semiconductor process, and a method of mixing fine particles of a low etching resistance in a solution of an etching resistance material and coating this mixture onto a substrate surface.
A dopant liquid containing an N-type diffusion source is coated on a surface of a P-type silicon substrate on which a texture structure is formed in the above manner, and the dopant liquid is subjected to thermal treatment and then diffused, thereby forming a high-concentration N-type diffusion layer having a high concentration of phosphorus on a surface of the texture structure. Grid electrodes made of a metal such as silver arranged in a comb shape at a predetermined position on a texture structure of the silicon substrate, and bus electrodes made of a metal such as silver for collecting a current from the grid electrodes are formed, and back surface electrodes made of a metal such as aluminum and silver are formed on a back surface, thereby forming solar batteries (see, for example, Patent Document 3).
Patent Document 1: Japanese Patent Application Laid-open No. H10-70296
Patent Document 2: Japanese Patent Application Laid-open No. 2003-309276
Patent Document 3: Japanese Patent Application Laid-open No. 2005-116559
A texture structure side of a silicon substrate needs to be diffused with an impurity in a high concentration to have satisfactory electrical contact with grid electrodes made of a metal and to efficiently extract a photocurrent generated within a photovoltaic power device to an external circuit. However, to obtain satisfactory photovoltaic power, preferably, the impurity concentration diffused within the silicon substrate at the texture structure side is controlled to be at or below a predetermined level. Therefore, because a photovoltaic power device with a structure using the conventional techniques described above efficiently extracts a photocurrent generated in the photovoltaic power device to an external circuit while compromising its photoelectric conversion efficiency. Therefore, a technique of improving the photoelectric conversion efficiency more than that of conventional techniques without degrading the efficiency of extracting a photocurrent to an external circuit has been desired.
The present invention has been achieved in view of the above circumstances, and an object of the present invention is to provide a photovoltaic power device that can improve the photoelectric conversion efficiency more than that of conventional techniques without degrading the efficiency of extracting a photocurrent to an external circuit and to provide a manufacturing method thereof.
In order to attain the above object, in a photovoltaic power device including a first-conductivity-type polycrystalline silicon substrate, a first diffusion layer diffused with a second-conductivity-type impurity in a first concentration formed at a light-incidence surface side of the polycrystalline silicon substrate, comb-shaped grid electrodes and bus electrodes that connect the grid electrodes formed on the first diffusion layer, a second diffusion layer of a first-conductivity type formed on a back surface facing a light incidence surface of the polycrystalline silicon substrate, and a back surface electrode formed on the second diffusion layer, the photovoltaic power device of the present invention includes concave portions having a depth reaching the polycrystalline silicon substrate from an upper surface of the first diffusion layer and having a diameter smaller than a distance between centers of the concave portions adjacent with each other in a region where the grid electrodes and the bus electrodes are not formed. Additionally, in the photovoltaic power device of the present invention, an upper surface of a region between the concave portions adjacent with each other includes the first diffusion layer, and a third diffusion layer diffused with a second-conductivity-type impurity in a second concentration, which is lower than the first concentration, is formed in a range of a predetermined depth from a formation surface of the concave portions.
According to the present invention, the first diffusion layer of a low resistance is formed at a light-receiving surface side of a silicon substrate, and concave portions are provided at a predetermined interval such that not the whole of the first diffusion layer is removed, and the third diffusion layer having an impurity concentration lower than that of the first diffusion layer is provided in a range of a predetermined depth from a surface of the concave portions. Therefore, by decreasing the reflection ratio of incident sunlight, a photoelectric conversion can be efficiently performed in the third diffusion layer within the concave portions, and a photocurrent generated by the photoelectric conversion can be caused to reach surface electrodes via the first diffusion layer on a silicon substrate surface having a low resistance. Because the photocurrent is collected by surface electrodes through the first diffusion layer having a low resistance, a resistance loss can be suppressed, a forming area of the surface electrodes can be reduced by expanding an interval between the surface electrodes, and more sunlight can be taken into the silicon substrate. As a result, the photoelectric conversion efficiency can be improved more than that of conventional techniques without degrading the efficiency of extracting a photocurrent to an external circuit.
100 photovoltaic power device
101 silicon substrate
102 N-type diffusion layer
102L low-resistance N-type diffusion layer
102H high-resistance N-type diffusion layer
103 etching resistance film
104 opening
105
a texture-structure forming region
105
b electrode forming region
106 concave portion
109 reflection prevention film
110 P+ layer
111 grid electrode
112 junction portion
113 bus electrode
121 backside electrode
122 backside collecting electrode
200A, 200B, 200C laser processing apparatus
201 stage
203 laser oscillator
204 laser beam
205 reflection mirror
206 beam splitter
207 aperture
208 reduction optical system
211, 213 galvanomirror
212 X-axis direction
214 Y-axis direction
221 holographic optical element
222 collecting lens
Exemplary embodiments of a photovoltaic power device and a manufacturing method thereof according to the present invention will be explained below in detail with reference to the accompanying drawings. The present invention is not limited to the embodiments. In addition, cross-sectional views of the photovoltaic power device explained in the following embodiments are only schematic, and the relationship between thickness and width and the ratio of thickness of each layer shown in the drawings are different from actual products.
First, prior to explanations of a configuration of a photovoltaic power device according to a first embodiment of the present invention, an outline of an entire configuration of a general photovoltaic power device is explained.
Characteristic parts of the first embodiment are explained next.
As shown in
The texture-structure forming region 105a has a low-resistance N-type diffusion layer 102L in which an N-type impurity is diffused in a high concentration, and a high-resistance N-type diffusion layer 102H in which an N-type impurity is diffused in a low concentration to have a higher resistance than that of the low-resistance N-type diffusion layer 102L. More specifically, the texture-structure forming region 105a has the concave portions 106 formed at a predetermined interval to reach the silicon substrate 101 from an upper surface of the low-resistance N-type diffusion layer 102L, in the low-resistance N-type diffusion layer 102L. The low-resistance N-type diffusion layer 102L is left in approximately a meshed shape at portions corresponding to surface portions of the silicon substrate 101 on which the concave portions 106 are not formed. The high-resistance N-type diffusion layer 102H is formed at a predetermined depth from an internal surface of each of the concave portions 106. A diameter of each of the concave portions 106 is set smaller than a distance between centers of adjacent concave portions 106. In the electrode forming region 105b, the light-incidence-side electrodes such as the grid electrodes 111 are formed via a junction portion 112 on the low-resistance N-type diffusion layer 102L. With this arrangement, a portion in which the low-resistance N-type diffusion layer 102L within the texture-structure forming region 105a remains in approximately a meshed shape and the electrode forming region 105b are continuously connected. Surface resistances (sheet resistances) of the low-resistance N-type diffusion layer 102L and the high-resistance N-type diffusion layer 102H are described later. Structures of the light receiving surface and the back surface of the silicon substrate 101 are identical to those explained with reference to
A difference between the photovoltaic power device 100 according to the first embodiment and a conventional photovoltaic power device is explained next.
As shown in
On the other hand, according to the photovoltaic power device 100 of the first embodiment, as shown in
A manufacturing method of the photovoltaic power device in this structure is explained next.
First, the silicon substrate 101 is prepared (
Next, the silicon substrate 101 after removing its damage is input to a thermal oxidation furnace, and is heated in an atmosphere of phosphorus (P) as an N-type impurity. Phosphorus is diffused to the surface of the silicon substrate 101 in a high concentration, thereby forming the low-resistance N-type diffusion layer 102L (
Thereafter, a film having an etching resistance (hereinafter, “etching resistance film”) 103 is formed on the low-resistance N-type diffusion layer 102L formed on one principal surface (
Next, openings 104 are formed in the texture-structure forming region 105a on the etching resistance film 103 (
In the laser processing apparatus 200A, the laser beam 204 output from the laser oscillator 203 is enlarged by the beam splitter 206 after an optical path is changed by the reflection mirror 205, and is input to the aperture 207. After passing through the aperture 207, the laser beam 204 is irradiated to a predetermined position on the etching resistance film 103 by the reduction optical system 208. As a result, plural openings 104 as fine pores are formed in the etching resistance film 103 formed on the silicon substrate 101, and a surface of the silicon substrate 101 of a ground (the low-resistance N-type diffusion layer 102L) is exposed.
A combination of Nd:YAG (Yttrium Aluminum Garnet) laser and a triple harmonic generator is used for the laser oscillator 203. As a result, a wavelength of a laser beam becomes 355 nanometers which can be absorbed by the SiN film. A focal depth of the optical system is set at or higher than 10 micrometers. By selecting strength of a laser beam capable of forming concaves on the silicon substrate 101 of the ground after removing the SiN film, the ratio of a concave depth to a concave diameter can be set large and its light confinement effect can be enhanced. It is made clear by experiment that an opening can be formed on the SiN film at or above 0.4 J/cm2, and concaves can be formed on the silicon substrate 101 of the ground at or above 2 J/cm2. Therefore, laser beam intensity of 3 J/cm2 is used here. Although a triple harmonic wave of the Nd:YAG laser is used for a laser beam source, other laser beam source can be also used when the laser beam source can output a laser beam of a wavelength shorter than 700 nanometers at which damage to the silicon substrate 101 due to a laser beam can be suppressed within 4 micrometers which is within a texture etching depth.
Further, a metal sheet formed with an opening is used for the aperture 207 in the laser processing apparatus 200A described above. Because the laser beam 204 passed through the aperture 207 is reduced and is irradiated to an object to be processed, an opening pattern of the aperture 207 can be relatively large. Therefore, a metal sheet formed with an opening by using wet etching or sandblasting can be also used for the aperture 207. A glass mask having a thin-film metal pattern of a chrome film or the like formed on a glass sheet can be also used for the aperture 207. In this case, it is necessary to pay attention to the transmission ratio of glass and the resistance of a metal thin film.
Next, a portion near the surface of the silicon substrate 101 including the low-resistance N-type diffusion layer 102L is etched through the openings 104 formed on the etching resistance film 103, thereby forming the concave portions 106 (
Further, when the concave portions 106 is formed by this etching, although substantially the whole of the low-resistance N-type diffusion layer 102L at a light-incidence surface side is conventionally removed as shown in
Next, after the etching resistance film 103 is removed by using hydrofluoric acid or the like
When the sheet resistance of the low-resistance N-type diffusion layer 102L becomes lower, contact with the electrodes becomes more satisfactory, a large layout interval between the grid electrodes 11 can be taken, and influence of shades to the silicon substrate 101 attributable to the layout of the grid electrodes 111 can be suppressed. However, to decrease the resistance, a heating time at the diffusion time needs to be set longer or a heating temperature needs to be increased. These processes become a cause of degrading the quality of polycrystalline silicon (the silicon substrate 101). As explained above, because decrease in the resistance of the low-resistance N-type diffusion layer 102L and the quality of the silicon substrate 101 are in a tradeoff relationship, a heating process of the silicon substrate 101 needs to be performed under a condition that the resistance becomes the sheet resistance of the low-resistance N-type diffusion layer 102L corresponding to a characteristic required by the photovoltaic power device 100 to be manufactured. Generally, the surface sheet resistance of the low-resistance N-type diffusion layer 102L is preferably equal to or higher than 30 Ω/sq and lower than 60 Ω/sq. However, considering also mass productivity, the surface sheet resistance of the low-resistance N-type diffusion layer 102L is preferably equal to or higher than 45 Ω/sq and lower than 55 Ω/sq. Generally, the surface sheet resistance of the high-resistance N-type diffusion layer 102H is preferably equal to or higher than 60 Ω/sq and lower than 150 Ω/sq. However, considering stability of a characteristic at a mass production time, the surface sheet resistance of the high-resistance N-type diffusion layer 102H is preferably equal to or higher than 70 Ω/sq and lower than 100 Ω/sq.
Next, a phosphorus glass layer formed by heating in the presence of phosphorous oxychloride (POCl3) vapor is removed in a hydrofluoric acid solution. Thereafter, the reflection prevention film 109 made of an SiN film or the like is formed on a cell surface by a plasma CVD method (
Thereafter, surface electrodes (the grid electrodes 111 and the bus electrodes 113) and back surface electrodes (the backside electrodes 121 and the backside collecting electrodes 122) are formed. In this case, first, a paste mixed with aluminum is formed on the whole surface by screen printing for the backside electrodes 121. Next, a paste mixed with silver is formed by screen printing in a comb shape for the grid electrodes 111 (the bus electrodes 113). A sintering process is then performed. The paste as a basis of the grid electrodes 111 is formed on the electrode forming region 105b. The sintering process is performed at 760° C. in atmosphere. In this case, the grid electrodes 111 are in contact with the low-resistance N-type diffusion layer 102L by piercing through the reflection prevention film 109 at the junction portion 112. Consequently, the low-resistance N-type diffusion layer 102L can obtain a satisfactory resistant junction with upper electrodes (the grid electrodes 111 and the bus electrodes 113). Aluminum in the backside electrodes 121 is diffused to the silicon substrate 101 by sintering, and the P+ layer 110 is formed within a predetermined range from the back surface of the silicon substrate 101. The photovoltaic power device 100 is manufactured as described above.
At the time of forming the openings 104 on the etching resistance film 103 in the texture-structure forming region 105a in
As shown in
Meanwhile, as shown in
According to the first embodiment, the low-resistance N-type diffusion layer 102L is provided in a range of a predetermined depth from the surface at the light-receiving surface side of sunlight. The concave portions 106 are provided at a predetermined interval in the texture-structure forming region 105a. The high-resistance N-type diffusion layer 102H of a high resistance is formed on the internal surface of the concave portions 106. Therefore, at the time of forming the grid electrodes 111 of a comb shape at the light-receiving surface side, light incident to the photovoltaic power device 100 is efficiently converted into a photocurrent, and the generated photocurrent is carried to the grid electrodes 111 via the low-resistance N-type diffusion layer 102L having a low resistance. That is, the resistance loss is suppressed as compared with the resistance loss when sunlight passes through the high-resistance N-type diffusion layer 102H. Consequently, the interval between the grid electrodes 111 formed at the light-receiving surface side can be expanded as compared with those of the photovoltaic power device 100 in the conventional structure. Because the photoelectric conversion efficiency is superior to that of the photovoltaic power device having the same dimension (area) as conventional dimension, the energy efficiency is excellent and an energy saving effect is obtained.
In the explanations of the first embodiment, after the high-resistance N-type diffusion layer 102H is formed within the concave portions 106 in
According to the second embodiment, after etching the phosphorus glass layer in the low-resistance N-type diffusion layer 102L and on the high-resistance N-type diffusion layer 102H, the uppermost surface of the diffusion layers 102L and 102H is etched with a mixed liquid of hydrofluoric acid and nitric acid. Therefore, carrier recombination speed in the N-type diffusion layer can be suppressed.
In the third embodiment, there is explained a case of forming openings in a method different from that of the first embodiment.
In the laser processing apparatus 200B having this configuration, the laser beam 204 collected in a spot shape is irradiated to a predetermined position of the etching resistance film 103 on the silicon substrate 101 to form the openings 104, by scanning with the first and second galvanomirrors 211 and 213. In this manner, by scanning the laser beam 204 in the X-axis direction 212 by rotating the first galvanomirror 211, and by scanning the laser beam 204 in the Y-axis direction 214 by rotating the second galvanomirror 213, the openings 104 can be formed at high speed in the whole region of the silicon substrate 101. Specifically, in the case of forming 10,000 openings 104 per one scanning line at 15 micrometers pitch by using a laser beam of a repetition frequency 500 kilohertz, a scanning frequency of the first galvanomirror 211 can be set at 50 hertz. On the other hand, to form openings in closest arrangement on a triangular lattice, an interval of scanning lines in the Y-axis direction 214 needs to be set at 13 micrometers. Therefore, the scanning speed in the Y-axis direction 214 on the silicon substrate 101 surface is set to 0.65 millimeter. In this manner, the openings 104 of a diameter 5 micrometers can be formed in closest arrangement of 15 micrometers pitch on the etching resistance film 103.
According to the third embodiment, the laser beam 204 can be irradiated by scanning the surface on the etching resistance film 103 as an object to be processed by using the first and second galvanomirrors 211 and 213. Therefore, the openings 104 can be provided at high speed by methods other than multipoint irradiation.
In the fourth embodiment, there is explained a case of forming openings by a method different from that of the first embodiment.
In the laser processing apparatus 200C, one laser beam 204 output from the laser oscillator 203, guided by the reflection mirror 205, and input to the holographic optical element 221 can be irradiated to an object to be processed at a few hundred points simultaneously at a desired interval, by a light interference effect and by the collecting lens 222. By irradiating the laser beam 204 that can be simultaneously irradiated, onto the etching resistance film 103 of the silicon substrate 101 by scanning, a processing time of forming the openings 104 can be substantially shortened as compared with a processing time when the laser processing apparatuses 200A and 200B shown in
In this manner, by using the laser processing apparatus 200C using the holographic optical element 221, the openings 104 can be formed at remarkably high speed in the whole region of the silicon substrate 101. Specifically, by using a laser beam of a repetition frequency 20 kilohertz, a few dozens of seconds is sufficient to process the whole surface of the silicon substrate 101 of 150-mm angle. The openings 104 of a diameter of about 5 micrometers can be formed in closest arrangement of about 15 micrometers pitch on the etching resistance film 103 in this manner.
According to the fourth embodiment, because a plurality of the openings 104 can be formed on the etching resistance film 103 with one-shot laser pulse by using the holographic optical element 221, processing throughput is improved remarkably.
Although a case of using the P-type silicon substrate 101 for the silicon substrate 101 has been explained in the first to fourth embodiments, identical effects are also obtained in the photovoltaic power device 100 of an opposite conductivity type forming a P-type diffusion layer by using the N-type silicon substrate 101. Although polycrystalline silicon is used for a substrate, identical effects are also obtained by using a monocrystalline silicon substrate. Although the substrate thickness is set at 250 micrometers in this case, a substrate of which thickness is reduced to a self-maintainable level, such as about 50 micrometers, can be also used. Although the dimension is described as 150 mm×150 mm, it is only an example, and identical effects are also achieved when the dimension is larger or smaller than the above dimension. In addition, although a silicon substrate has been explained above as the substrate, the present invention is not limited to silicon substrates, and the first to fourth embodiments described above can be applied to semiconductor substrates in general.
As described above, the photovoltaic power device according to the present invention is useful for solar batteries that generate power using sunlight.
This application is a continuation of U.S. application Ser. No. 12/934,580 filed on Sep. 24, 2010, which is a national stage application of PCT/JP2008/055911, filed on Mar. 27, 2008, the entire contents of which are incorporated herein by reference.
Number | Date | Country | |
---|---|---|---|
Parent | 12934580 | Sep 2010 | US |
Child | 14315209 | US |