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Solar cells (or photovoltaic devices) utilize specific properties of semiconductors to convert energy of visible and near visible light of the sun into electrical energy. This conversion results from absorption of the radiant energy in semiconductor materials which frees some valence electrons, thereby generating electron-hole pairs. Conventional solar cells usually include p-n (or p-i-n) junction formed near surface of light incidence. When sunlight striking solar cells creates charge carriers, an intrinsic electric field of the p-n junction pushes new electrons to one side of the junction and new holes to the other. This sorting-out process is what drives the charge carriers in an electric circuit. The energy required to generate electron-hole pairs in a semiconductor material is referred to as a band gap energy, which in general is the minimum energy needed to excite an electron from the valence band to the conduction band.
Solar cells can typically be categorized into two types based on the light absorbing material used: bulk or semiconductor wafer-based solar cells and thin film solar cells. The wafer-based solar cells use mono-, poly- or multi-crystalline silicon (c-Si, poly-Si or mc-Si, respectively), crystalline semiconductor of III-V groups (GaAs, InGaP, and similar) and other materials. The thin-film solar cells can be made of semiconductor thin films such as amorphous and polycrystalline silicon (α-Si and poly-Si, respectively), cadmium telluride (CdTe), cadmium sulfide (CdS), copper indium diselenide (CuInSe2), copper indium diselenide (CuInGaSe2), and others. The thin film solar cells can be formed on various substrates including glass, plastic and others. Besides, there are several emerging solar cell technologies based on use of organic dyes, organic polymers, quantum dots, and others.
The antireflection layer 18 can substantially increase efficiency of the solar cell. The layer 18 can provide a reduction of sunlight reflection by a top surface of the cell 11. The antireflection layer 18 can be made of silicon monoxide (SiO). Adding an additional antireflection layer made of other materials can reduce the reflection even more. Another way to reduce the reflection is to texture the top surface of the solar cell. The highest efficiency cell typically use a well-designed double-layer antireflection coating with a textured top surface.
Several solar cells can be electrically connected to each other in series or in parallel to form a solar module or panel and to meet voltage and current requirements. However the solar cells suffer from several disadvantages. For example, they need an energy storage device, such as a battery, and a blocking device or charge controller protecting the battery from overcharge or discharge. The blocking device 13 can prevent a current flow from the battery 12 to the solar cell 11 at nighttime. It can be made of a semiconductor diode.
Batteries are not only energy storage devices. They also can serve as a power conditioner. By being a part of the electrical circuit, the battery 12 can keep an electrical load nearly constant, hence the solar cell 11 can operate closer to its optimum power output. Conventional batteries are bulky and should be stored in a special place remote from the solar cells. Besides they have memory problem of being partially charged/discharged and decreasing overall performance. These obstacles substantially limit solar cells application in mobile computing and communication devices.
Accordingly, there is a need for a solar cell with an embedded energy storage device having a significant capacitance and low current leakage.
It is therefore an objective of the present application to provide a photovoltaic system with an embedded energy storage device.
According to one embodiment of the present application a photovoltaic system comprises a solar cell, a blocking device and a magnetic capacitor, wherein the solar cell and the magnetic capacitor are stacked over each other, and wherein the solar cell and the magnetic capacitor are electrically coupled to each other through the blocking device.
These and other features, aspects, and advantages of the present disclosure will become better understood with regard to the following description, accompanying drawings and appended claims, where:
Reference will now be made in detail to the embodiments of the present application, examples of which are illustrated in the accompanying drawings. A numerical order of the embodiments is random. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
All figures are drawn to ease explanation of basic teachings of the present application only. The extensions of the figures with respect to number, position, relationship, and dimensions of the parts to form the embodiment will be explained or will be within the skill of the art after the following description has been read and understood.
Use of conventional capacitors as energy storage devices is limited by their relatively low capacitance and leakage current decreasing overall performance. A conventional capacitor (or condenser) comprises two parallel conductive plates separated from each other by layer of an isolative material. The capacitance of the capacitor can be calculated using an equation (1):
C=ε
0εrA/d, (1)
wherein C is the capacitance of the capacitor, ε0 =8.85·10−12 F/m is a dielectric constant of free space (or vacuum permittivity), εr is a relative dielectric constant (or relative permittivity) of the isolative material disposed between the conductive plates, A is an overlaying area of the parallel conductive plates, and d is a distance between the conductive plates.
The equation (1) suggests that the capacitance C of the capacitor is proportional to the area A of the parallel conductive plate, relative permittivity εr of the isolative material disposed between the conductive plates, but inverse proportional to the distance d between the conductive plates that is frequently equal to the thickness of the dielectric layer. The layer of the isolative material can be made of dielectric or semiconductor materials.
The relative dielectric constant of the isolative materials varies in a broad range from 1 for vacuum to several thousands, for example, for barium titanate BaTiO3. However, this material is not cheap, requires special technology of deposition, and its permittivity is very sensitive to temperature.
The permittivity of the traditional dielectric and semiconductor materials used in electronic and semiconductor industries, such as TiO2, ZnO, SnO2, SiC, Al2O3, SiO2, Ta2O5, ZrO2, HfO2, Si3N4, La2O3, ZrSiO4, HfSiO4, SrTiO3, TixAl1−xOy, HfxAl1−xOy, PbZnTiOX, PbLaTiOX and others, can be substantially increased by positioning the dielectric or semiconductor layer between two magnetic layers substantially exchange coupled to each other.
The magnetic capacitor 22 can comprise a first conductive plate 27, a second conductive plate 28, a layer of an isolative material 25 made of a dielectric or semiconductor and disposed between the conductive plates. The isolative layer 25 can be separated from the conductive plates 27 and 28 by magnetic layers 24 and 26, respectively. The magnetic layer 24 can be disposed between the conductive plate 27 and the isolative layer and can have a direct contacts with the layer 25. Similarly, the magnetic layer 26 can be disposed between the isolative layer 25 and the conductive plate 28 and can have a direct contact with the layer 25. The magnetic layers 24 and 26 are magnetically exchange coupled to each other through the isolative layer 25. The magnetic layers 24 and 26 can be made of a magnetic material having in-plane or perpendicular magnetization direction. The magnetization directions in the layers 24 and 26 are shown by solid arrows. The magnetization directions in the layers 24 and 26 can be anti-parallel to each other. A mutual orientation of the magnetization directions in the magnetic layers 24 and 26 depends on type of an exchange coupling (ferromagnetic or anti-ferromagnetic) between the magnetic layers through the thin layer of the isolative material 25. The anti-parallel mutual orientation of magnetization directions corresponds to the anti-ferromagnetic coupling. Respectively, the parallel orientation of the magnetization directions corresponds to the ferromagnetic coupling between the layers 24 and 26. Type of exchange coupling and its strength substantially depends on thickness and material properties of the layer 25. The anti-parallel direction of magnetizations in the magnetic layers can provide a substantial reduction of a leakage current compared to that of the parallel magnetizations orientation.
The exchange coupling between the magnetic layers can change substantially a permittivity of the isolative layer 25. The permittivity of the layer can be increased by more than thousand times providing a substantial capacitance increase of the magnetic capacitor. An interaction with magnetic layers having spin-polarized electrons may increase substantially a polarization of the isolative material made of an dielectric or semiconductor. That can result in significant increases of electrical charges accumulation at magnetic/insulator interfaces. The permittivity of the isolative layer 25 in the magnetic capacitor can depend on a strength of the exchange coupling between the magnetic layers, thickness and spin polarization of the magnetic layers, their crystalline structure, roughness of the interfaces between the magnetic and isolative layers, properties of the isolative layer material and other parameters. The magnetic layers 24 and 26 may have a multilayer structure with a magnetic material having a substantial spin polarization being disposed adjacent to the isolative layer 25.
A magnetic capacitor can use magnetic materials with in-plane or perpendicular magnetization direction (magnetic anisotropy).
The magnetic capacitor 22-1 shown in
The capacitor 22-1 shown in
The capacitor 22 can have a multi-sectional design comprising several capacitors (sections) stacked above each other and electrically coupled to each other in series or in parallel.
The multi-sectional capacitor 22-3 (
The sections 22-1 of the multi-sectional capacitor can be coupled to each other in parallel (
There is a wide latitude for the choice of materials and their thicknesses within the embodiments of the present application.
The semiconductor layers 14, 15 and 42 can be made of monocrystalline, polycrystalline and amorphous semiconductor material such as Si, Ge, GaAs, CdTe, Cu(In,Ga)Se2, CdS, CdSe, Sb2S3, PbS, ZnTe and others. Thickness of the semiconductor layers can be in a range from about 2 nm to 500 μm.
The metal contacts 16 and 17 can be made of Al, Mo, W, Cr, Pt, Ta, Ti, Cu, TiN, their based alloys and laminates. Thickness of the metal contacts can be in a range from about 2 nm to 500 μm.
The antireflection layer 18 can be made of TiO2, Si3N4, Al2O3, SiO2, SiO, Ta2O5, ZnS, MgF2 and other materials including their based multilayers. Thickness of the antireflection layer can be in a range from about 5 nm to 1 μm.
The magnetic layers 24 and 26 can be made of a magnetic material comprising Fe, Co, Ni, their based alloys and laminates, for example, CoFe, NiFe, CoNiFe, CoFeB, FePt, CoPd, (CoFe/Pt)n, (Co/Pd)n and others. Thickness of the magnetic layers 24 and 26 can be in a range from of about 0.2 nm to about 50 nm.
The isolative layer 25 can be made of dielectric and semiconductor materials such as AlxOy, SiOx, Si, C, TaxOy, TixOy, MgO, AlN, HfxOy, NixOy, VxOy, WxOy, ZrxOy, NbxOy, CuxO, RuOx, CrxOy, SrTiO3, BaTiO3, PbZrTiO3, PbLaTiO3, perovskite-like materials, polyimide, Si, a:Si, poly-Si, Ge, SiC, SiGe, AlSb, AlAs, AN, AlP, BN, BP, BAs, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, InP, AlxGa1−XAs, InxGa1−xAs, InGaP, AlInAs, AlInSb, GaAsN, GaAsP, AlGaN, AlGaP, InO2, InGaN, InAsSb, InGaSb, AlGaInP, InAlGaP, InGaAlP, AlInGaP, AlGaAsP, InGaAsP, AlInAsP, AlGaAsN, InGaAsN, InAlAsN, GaAsSbN, GaInNAsSb, GaInAsSbP, CdSe, CdS, CdTe, ZnO, ZnO2, ZnSe, ZnS, ZnTe, CdZnTe, HgCdTe, HgZnSe, CuCl, PbS, PbTe, SnTe, PbSnTe, Tl2SnTe5, Tl2GeTe5, Bi2Te3, Cd3P2, Cd3As2, Cd3Sb2, Zn3P2, Zn3As2, Zn3Sb2, SnO2, In2O3, CdO, Cu2O, InGaZnO, (In,Sn)2O3, ZnSnO, ZnO, InZnO AgSbO3, 2CdO·GeO2, 2CdO·PbO, CdS·In2Sx, MoO3, (In,Sn)2O3/TiO2, and/or similar materials, their based laminates, such as Ti/TiO2/Ti, Ru/TiO2/Ru, Ru/TaxOy/Ru, Cu/CuxO/Cu, and others. Thickness of the isolative layer 25 can be in a range from about 0.2 nm to about 50 nm.
The conductive plate 27 and 28 can be made of a conductive material comprising a substantial conductivity such as Mo, W, Ti, Cr, Pt, TiN, PtSi, Al, Cu, Ag, Au, Ni, poli-Si and similar or their based alloys and/or laminates. Thickness of the conductive plates 27 and 28 can be in a range from about 0.5 nm to about 5 μm.
The spacer layer 62 can be made of a dielectric (SiXOY, AlXOY, SiXNY or similar) or semiconductor (Si, Ge, or similar) material, or their based laminates. Thickness of the spacer layer 44 can be in a range from about 0.5 nm to about 1 μm.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structures of the disclosed embodiments without departing from the scope or spirit of the application. In view of the foregoing, it is intended that the present application cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
While the specification of this disclosure contains many specifics, these should not be construed as limitations on the scope of the disclosure or of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable sub-combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.
It is understood that the above embodiments are intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the embodiments should be, therefore, determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.
While the disclosure has been described in terms of several exemplary embodiments, those skilled in the art will recognize that the disclosure can be practiced with modification within the spirit and scope of the appended claims. Specifically, one of ordinary skill in the art will understand that the drawings herein are meant to be illustrative, and the spirit and scope of the disclosure are not limited to the embodiments and aspects disclosed herein but may be modified.
This application claims benefit of U.S. Provisional Patent Application Ser. No. 61/844,593, filed on Jul. 10, 2013, the entire content of which is incorporated herein by reference. Not applicable. Not applicable.
Number | Date | Country | |
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61844593 | Jul 2013 | US |