Furber et al., Four-Phase Micropipeline Latch Control Circuits, Jun. 1996, IEEE Transactions on VLSI Systems. |
Cho et al., Design of a 32-bit Fully Asynchronous Microprocessor (FAM), Aug. 1992, Proceedings of the 35th Midwest Symposium on Circuits and Systems. |
Furber et al., Dynamic Logic in Four-Phase Micropipelines, Mar. 1996, 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems. |
Kearney et al., Performance Evaluation of Asynchronous Logic Pipelines with Data Dependent Processing Delays, May 1995, Proceedings, 2nd Working Conference on Asynchronous Design Methodologies. |
Martin, Asynchronous Datapaths and the Design of an Asynchronous Adder, Jun. 1991, Department of Computer Science, California Institute of Technology. |
Burns et al., Synthesis of Self-Timed Circuits by Program Transformation, 1988, The Fusion of Hardware Design and Verification. |
Burns et al., Syntax-directed Translation of Concurrent Programs into Self-timed Circuits, 1988, Advanced Research in VLSI. Proceedings of the 5th MIT Conference. |
Endecott, Superscalar Instruction Issue in an Asynchronous Microprocessor, Jun. 1996, Computers and Digital Techniques, IEEE Proceedings. |
Burns et al., "Syntax-directed Translation of Concurrent programs into Self-timed Circuits", Advanced Research in VLSI. Proceedings of the 50th MIT Conference. MIT Press, pp. 35-50, 1988. |
Burns et al., "Synthesis of self-timed Circuits by Program Translation", The Fusion of hardware Design and Verification, pp. 1-18, 1988. |
Furber, "Four-phase micropipeline latch control circuits", IEEE Transactions on VLSI systems, pp. 247-253, Jun. 1996. |
Kearney, "Performance evaluation of asynchronous logic pipelines with data dependent processing", proceedings., 2nd Working Conference on Asynchronous Design methodologies, 4-13, May 1995. |
Endecott, "Superscalar instruction issue in an asynchronous microprocessor", IEEE Proceedings on Computers and Design Techniques, pp. 266-272, Sep. 1996. |
Cho et al., "Design of a 32-bit fully asynchronous microprocessor (FAM)", Proceedings of the 35th Midwest Symposium on Circuits and Systems, pp. 1500-1503, vol. 2, Aug. 1992. |
Furber et al., "Dynamic logic in four-phase micropipelines", Proceedings, 2nd International Symposium on Advances Research in Asynchronous Circuits and systems., pp. 11-16, Mar. 1996. |
Martin., "Asynchronous datapaths and the design of an asynchronous adder", Dept. of Computer Science, California Institute of Technology. p. 1-23, Jun. 1996. |