PIXEL CIRCUIT AND DRIVING METHOD THEREOF

Abstract

The application discloses a pixel circuit and a driving method thereof. By synchronously resetting a potential of an input end of a light-emitting unit and a potential of a control end of a driving unit, the input end of the light-emitting unit can obtain a longer reset time; when the light-emitting unit emits light, a resetting transistor and an initialization transistor are both in an off state, which can better prevent leakage of the input end of the light-emitting unit, thereby improving display effect of the pixel circuit in a dark state or low gray level.

Description

BACKGROUND OF INVENTION

Field of Invention

The present application relates to the field of display technology, in particular to the field of pixel driving technology, and specifically to a pixel circuit and a driving method thereof.

Description of Prior Art

With development of multimedia, display devices have become more and more important. Correspondingly, requirements for various types of display devices are getting higher and higher, especially in the field of smart phones. Ultra-high frequency drive display, low power consumption drive display, and low frequency drive display are all current and future development needs.

However, in a conventional technical solution of a pixel circuit, an anode of a light emitting diode has a leakage current and a reset time is too short, which seriously affects a dark state or low grayscale display effect of the pixel circuit.

SUMMARY OF INVENTION

The present application provides a pixel circuit and a driving method thereof, which solves the problem of poor display effect of the pixel circuit in a dark state or low gray scale.

In a first aspect, the present application provides a pixel circuit, comprising: a light-emitting device serially connected in a light-emitting loop between a first power signal and a second power signal; a driving transistor serially connected in the light-emitting loop, and configured to control a current flowing through the light-emitting loop; a resetting transistor, wherein one of a drain or a source of the resetting transistor is connected to an initial voltage signal, and another one of the drain or the source of the resetting transistor is connected to an anode of the light-emitting device; and an initialization transistor, wherein one of a drain or a source of the initialization transistor is connected to a gate of the driving transistor, and another one of the drain or the source of the initialization transistor is connected to the anode of the light-emitting device; wherein the resetting transistor and the initialization transistor are connected in series between the initial voltage signal and the gate of the driving transistor.

Based on the first aspect, in a first implementation manner of the first aspect, further comprising: a first light-emitting control transistor, wherein one of a drain or a source of the first light-emitting control transistor is connected to the first power signal, and another one of the drain or the source of the first light-emitting control transistor is connected to one of a drain or a source of the driving transistor; and a second light-emitting control transistor, wherein one of a drain or a source of the second light-emitting control transistor is connected to another one of the drain or the source of the driving transistor, and another one of a drain or a source of the second light-emitting control transistor is connected to the anode of the light-emitting device.

Based on the first implementation manner of the first aspect, in a second implementation manner of the first aspect, wherein a gate of the initialization transistor is connected to a first control signal, a gate of the resetting transistor is connected to a second control signal, the resetting transistor is configured to synchronously reset a potential of the anode of the light-emitting device and a potential of the gate of the driving transistor to a potential of the initial voltage signal according to the second control signal, a gate of the first light-emitting control transistor is connected to a third control signal, a gate of the second light-emitting control transistor is connected to the third control signal, and the second control signal is equal to either the first control signal or the third control signal.

Based on the second implementation manner of the first aspect, in a third implementation manner of the first aspect, comprising: a writing transistor, wherein one of a drain or a source of the writing transistor is connected to a data signal, another one of the drain or the source of the writing transistor is connected to one of the drain or the source of the driving transistor, and a gate of the writing transistor is connected to a fourth control signal.

Based on the third implementation manner of the first aspect, in a fourth implementation manner of the first aspect, comprising: a clamping transistor, wherein one of a drain or a source of the clamping transistor is connected to the gate of the driving transistor, another one of the drain or the source of the clamping transistor is connected to one of the drain or the source of the driving transistor, and a gate of the clamping transistor is connected to the fourth control signal.

Based on the fourth implementation manner of the first aspect, in a fifth implementation manner of the first aspect, comprising: a storage capacitor, wherein a first end of the storage capacitor is connected to the first power signal, and a second end of the storage capacitor is connected to the gate of the driving transistor.

Based on the fifth implementation manner of the first aspect, in a sixth implementation manner of the first aspect, wherein a channel type of the resetting transistor is different from a channel type of the first light-emitting control transistor and a channel type of the second light-emitting control transistor; and wherein the resetting transistor is an oxide transistor, and the first light-emitting control transistor and the second light-emitting control transistor are both silicon transistors.

Based on the sixth implementation manner of the first aspect, in a seventh implementation manner of the first aspect, wherein the channel type of the resetting transistor and a channel type of the initialization transistor are same; and wherein the initialization transistor is an oxide transistor.

Based on any of the foregoing implementation manners of the first aspect, in an eighth implementation manner of the first aspect, wherein a potential of the first power signal is greater than a potential of the second power signal.

In a second aspect, the present application provides a pixel circuit, comprising:

a light-emitting unit serially connected in a light-emitting loop between a first power signal and a second power signal; a driving unit serially connected in the light-emitting loop, and is configured to control a current flowing through the light-emitting loop; an initialization unit, wherein an input end of the initialization unit is connected to an input end of the light-emitting unit, an output end of the initialization unit is connected to a control end of the driving unit, and the initialization unit is configured to initialize a potential of the control end of the driving unit according to a first control signal; and a resetting unit connected to the input end of the light-emitting unit and configured to control a potential of the input end of the light-emitting unit and the potential of the control end of the driving unit to synchronously reset to a potential of an initial voltage signal according to a second control signal.

Based on the second aspect, in a first implementation manner of the second aspect, further comprising: a light-emitting control unit serially connected in the light-emitting loop, wherein an output end of the light-emitting control unit is connected to the input end of the light-emitting unit, and the light-emitting control unit is configured to control the light-emitting loop on and off according to a third control signal.

Based on the first implementation manner of the second aspect, in a second implementation manner of the second aspect, wherein the second control signal is equal to either the first control signal or the third control signal.

Based on the second implementation manner of the second aspect, in a third implementation manner of the second aspect, further comprising: a writing unit coupled to an input end or an output end of the driving unit and configured to write a data signal to the pixel circuit according to a fourth control signal.

Based on the third implementation manner of the second aspect, in a fourth implementation manner of the second aspect, further comprising: a clamping unit, wherein an output end of the clamping unit is connected to the control end of the driving unit, an input end of the clamping unit is connected to the input end of the driving unit or the output end of the driving unit, and the clamping unit is configured to clamp the potential of the control end of the driving unit to a potential of the input end of the driving unit or a potential of the output end of the driving unit according to the fourth control signal.

Based on the fourth implementation manner of the second aspect, in a fifth implementation manner of the second aspect, further comprising: a storage unit, wherein a first end of the storage unit is connected to the first power signal, a second end of the storage unit is connected to the control end of the driving unit, and the storage unit is configured to store the potential of the control end of the driving unit.

In a third aspect, the present application provides a driving method of a pixel circuit, comprising following steps: controlling an initial voltage signal to synchronously initialize a potential of an input end of a light-emitting unit and a potential of a control end of a driving unit by a first control signal and a second control signal; controlling a data signal to be written to an input end of the driving unit or an output end of the driving unit by a fourth control signal, and clamping a potential of the control end of the driving unit to a potential of the input end of the driving unit or a potential of the output end of the driving unit by the fourth control signal; and driving the light-emitting unit to emit light with a voltage difference between a first power signal and a second power signal by a third control signal.

In the pixel circuit and the driving method thereof provided in the present application, by synchronously resetting the potential of the input end of the light-emitting unit and the potential of the control end of the driving unit, the input end of the light-emitting unit can obtain a longer reset time; when the light-emitting unit emits light, the resetting transistor and the initialization transistors are all in the off state, which can better prevent the leakage of the input end of the light-emitting unit, thereby improving the display effect of the pixel circuit in the dark state or low gray level.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic diagram of a first structure of a pixel circuit provided by an embodiment of the application.

FIG. 2 is a schematic diagram of a second structure of the pixel circuit provided by an embodiment of the application.

FIG. 3 is a schematic diagram of a third structure of the pixel circuit provided by an embodiment of the application.

FIG. 4 is a schematic diagram of a fourth structure of the pixel circuit provided by an embodiment of the application.

FIG. 5 is a schematic flowchart of the driving method provided by an embodiment of the application.

FIG. 6 is a timing diagram of the pixel circuit provided by an embodiment of the application.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

In order to make the purpose, technical solutions and effects of this application clearer and clearer, the following further describes this application in detail with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the application, and not used to limit the application.

As shown in FIGS. 1 to 4, an embodiment provides a pixel circuit, comprising a light-emitting unit 40, a light-emitting control unit 10, and a resetting unit 30; the light-emitting unit 40 serially connected in a light-emitting loop between a first power signal ELVDD and a second power signal ELVSS; the light-emitting control unit 10 serially connected in the light-emitting loop, wherein an output end of the light-emitting control unit 10 is connected to the input end of the light-emitting unit 40, and the light-emitting control unit 10 is configured to control the light-emitting loop on and off according to a light-emitting control signal EM(N); and the resetting unit 30 connected to the input end of the light-emitting unit 40 and configured to control a potential of the input end of the light-emitting unit 40 to synchronously reset to a potential of an initial voltage signal VI according to a first scan signal SCAN (N-1) or the light-emitting control signal EM(N). The input end of the light-emitting unit 40 is controlled to reset by the light-emitting control signal EM (N) or the first scan signal SCAN (N-1), which can obtain a longer reset time. At the same time, when the light-emitting unit 40 emits light, a resetting transistor T7 and an initialization transistor T4 are both in the off state, which can better prevent the leakage of the input end of the light-emitting unit 40, thereby improving the display effect of the pixel circuit in the dark state or low gray level.

Wherein, the light-emitting control unit 10 comprises a first light-emitting control transistor T5 and a second light-emitting control transistor T6. An input end of the first light-emitting control transistor T5 is connected to the first power signal ELVDD, and a control end of the first light-emitting control transistor T5 is connected to the light-emitting control signal EM (N); an input end of the second light-emitting control transistor T6 is connected to an output end of a driving transistor T1, and a control end of the second light-emitting control transistor T6 is connected to the light-emitting control signal EM (N).

It can be understood that the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are in an off state or a saturated state at the same time, so as to simultaneously control the on and off of the light-emitting loop. Wherein, the light-emitting control signal EM (N) can be, but is not limited to, an Nth level light-emitting control signal.

Wherein, the resetting unit 30 comprises a resetting transistor T7, an input end of the resetting transistor T7 is connected to the initial voltage signal VI, an output end of the resetting transistor T7 is connected to the output end of the second light-emitting control transistor T6, and a control end of the resetting transistor T7 is connected to the first scan signal SCAN (N-1) or the light-emitting control signal EM (N).

It should be noted that the light-emitting control signal EM (N) controls the resetting transistor T7 to be turned on during the non-light emitting period, and the initial voltage signal VI is input to the light-emitting unit 40 or an input end of a light emitting device LED to reset its potential.

The light-emitting unit 40 comprises a light emitting device LED, an input end of the light emitting device LED is connected to the output end of the resetting transistor T7, and an output end of the light emitting device LED is connected to the second power signal ELVSS. Among them, the light emitting device LED may be, but not limited to, an OLED light emitting diode.

In one of the embodiments, the pixel circuit further comprises a driving unit 20 is serially connected to the light-emitting loop, and is configured to control a current flowing through the light-emitting loop.

The driving unit 20 comprises a driving transistor T1, and an input end of the driving transistor T1 is connected to the output end of the first light-emitting control transistor T5.

In one of the embodiments, the pixel circuit further comprises an initialization unit 50. An input end of the initialization unit 50 is connected to the output end of the resetting unit 30, and an output end of the initialization unit is connected to the control end of the driving unit 20, and is configured to initialize a potential of the control end of the driving unit 20 according to the first scan signal SCAN (N-1).

The initialization unit 50 comprises an initialization transistor T4, an input end of the initialization transistor T4 is connected to the output end of the resetting transistor T7, an output end of the initialization transistor T4 is connected to the control end of the driving transistor T1, and a control end of the initialization transistor T4 is connected to the first scan signal SCAN (N-1).

In one of the embodiments, the pixel circuit further comprises a writing unit 60 coupled to the input end or the output end of the driving unit 20, and is configured to write a data signal Vdata to the pixel circuit according to a second scan signal SCAN(N).

The writing unit 60 comprises a writing transistor T2, an input end of the writing transistor T2 is connected to the data signal Vdata, an output end of the writing transistor T2 is connected to the input end of the driving transistor T1 or the output end of the driving transistor T1, and a control end of the writing transistor T2 is connected to the second scan signal SCAN(N).

In one of the embodiments, the pixel circuit further comprises a clamping unit 80, an output end of the clamping unit 80 is connected to the control end of the driving unit 20, and an input end of the clamping unit 80 is connected to the input end of the driving unit 20 or the output end of the driving unit 20, and is configured to clamp the potential of the control end of the driving unit 20 to the potential of the input end of the driving unit 20 or the potential of the output end of the driving unit 20 according to the second scan signal SCAN(N).

The clamping unit 80 comprises a clamping transistor T3. An output end of the clamping transistor T3 is connected to the control end of the driving transistor T1. An input end of the clamping transistor T3 is connected to the input end of the driving transistor T1 or the output end of the driving transistor T1. A control end of the clamping transistor T3 is connected to the second scan signal SCAN(N).

In one of the embodiments, the pixel circuit further comprises a storage unit 70, a first end of the storage unit 70 is connected to the first power signal ELVDD, and a second end of the storage unit 70 is connected to the control end of the driving unit 20, and is configured to store the potential of the control end of the driving unit 20.

The storage unit 70 comprises a storage capacitor Cst, a first end of the storage capacitor Cst is connected to the first power signal ELVDD, and a second end of the storage capacitor Cst is connected to the control end of the driving transistor T1.

In one of the embodiments, the potential of the first power signal ELVDD is not less than the potential of the second power signal ELVSS.

In one of the embodiments, the first light-emitting control transistor T5, the second light-emitting control transistor T6, and the driving transistor T1 are all P-type low temperature polysilicon thin film transistors.

In one of the embodiments, the resetting transistor T7, the initialization transistor T4, the writing transistor T2, and the clamping transistor T3 are all N-type oxide thin film transistors. Among them, the oxide-type clamping transistor T3 has better low leakage characteristics, and can better prevent the gate leakage of the driving transistor T1.

When the resetting transistor T7 and the initialization transistor T4 are both

N-type oxide thin film transistors, they can better prevent the anode leakage of the light emitting device LED. It is understandable that the oxide thin film transistor has low leakage characteristics. Therefore, during the off phase of the resetting transistor T7 and the initialization transistor T4, the anode of the light-emitting device LED can minimize the occurrence of its leakage.

Among them, in the embodiment of this application, only two scan signals of the same group type (that is, both high potential effective or low potential effective) and one light-emitting control signal EM (N) are used. The corresponding GOA circuit can reduce the design complexity. For example, reducing the use of the inverter at the output or the adjustment of the output phase, thereby simplifying the structure of the corresponding GOA circuit, and helping to achieve a narrow frame.

As shown in FIG. 5, in one of the embodiments, the present application provides a driving method of a pixel circuit, which comprises following steps of:

Step S10: controlling an initial voltage signal VI to synchronously initialize a potential of an input end of a light-emitting unit 40 and a potential of a control end of a driving unit 20 by a first control signal and a second control signal; step S20: controlling a data signal Vdata to be written to an input end of the driving unit 20 or an output end of the driving unit 20 by a fourth control signal, and clamping a potential of the control end of the driving unit 20 to a potential of the input end of the driving unit 20 or a potential of the output end of the driving unit 20 by the fourth control signal; and step S30: driving the light-emitting unit 40 to emit light with a voltage difference between a first power signal ELVDD and a second power signal ELVSS by a third control signal. The input end of the light-emitting unit 40 is controlled to reset by the light-emitting control signal EM (N) or the first scan signal SCAN (N-1), a longer reset time can be obtained, and the input end of the light-emitting unit 40 is not prone to leakage current, thereby improving the display effect of the pixel circuit in the dark state or low gray scale.

Specifically, as shown in FIG. 6, when the light-emitting control signal EM(N) is at a high potential, the light-emitting control unit 10, that is, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are both in an off state, and the light emitting device LED does not emit light. When the first scan signal SCAN (N-1) is at a high potential and the second scan signal SCAN (N) is at a low potential, the resetting transistor T7 and the initialization transistor T4 are both in the on state to simultaneously initialize or reset the potential of the input end of the light emitting device LED and/or the potential of the gate of the driving transistor T1. When the first scan signal SCAN(N-1) is at a low potential and the second scan signal SCAN(N) is at a high potential, the second scan signal SCAN(N) controls the data signal Vdata to be written to the input end of the driving unit 20 or drive the output end of the unit 20, and the second scan signal SCAN(N) clamps the potential of the control end of the driving unit 20 to the potential of the input end of the driving unit 20 or the potential of the output end of the driving unit 20.

When the light-emitting control signal EM (N) is at a low potential, the first scan signal SCAN (N-1) is at a low potential, and the second scan signal SCAN (N) is at a low potential, and the light emitting device LED emits light.

Among them, the first scan signal SCAN(N-1) can be but is not limited to the N-1 level scan signal; the second scan signal SCAN(N) can be but is not limited to the N level scan signal, and N may be an integer not less than 2.

Among them, the light-emitting control signal EM (N) is displayed in the dark state or low gray scale, that is, the duration of its high potential is greater than the first scan signal SCAN (N-1) or the second scan signal SCAN (N) at the high potential. Therefore, when the light-emitting control signal EM(N) is used in this embodiment to control the input end of the light-emitting device LED, that is, the anode of the light-emitting diode to reset, the anode of the light-emitting diode can obtain a longer reset time. In addition, the number of input signals used by the pixel circuit in the corresponding embodiment can be reduced.

It should be noted that the input end of the corresponding thin film transistor mentioned in this application can be but not is limited to its drain, and can also be its source without affecting its function and effect. In the same way, the output end of the corresponding thin film transistor mentioned in this application can be but is not limited to its drain, and can also be its source without affecting its function and effect.

In one of the embodiments, the present application provides a display panel, which comprises any pixel circuit in the above embodiments.

Wherein, the first control signal may be, but is not limited to, the first scan signal SCAN (N-1), and may also be another square wave signal. The third control signal can be, but is not limited to, the light-emitting control signal EM (N), and can also be another square wave signal. The second control signal can be, but is not limited to, the first control signal or the third control signal, and can also be another square wave signal. The fourth control signal can be, but is not limited to, the second scan signal SCAN(N), and can also be other square wave signals.

It can be understood that for those of ordinary skill in the art, equivalent substitutions or changes can be made according to the technical solutions and inventive concepts of the present application, and all these changes or substitutions shall fall within the protection scope of the appended claims of the present application.

Claims

1. A pixel circuit, comprising: a light-emitting device serially connected in a light-emitting loop between a first power signal and a second power signal;a driving transistor serially connected in the light-emitting loop, and configured to control a current flowing through the light-emitting loop;a resetting transistor, wherein one of a drain or a source of the resetting transistor is connected to an initial voltage signal, and another one of the drain or the source of the resetting transistor is connected to an anode of the light-emitting device; andan initialization transistor, wherein one of a drain or a source of the initialization transistor is connected to a gate of the driving transistor, and another one of the drain or the source of the initialization transistor is connected to the anode of the light-emitting device;wherein the resetting transistor and the initialization transistor are connected in series between the initial voltage signal and the gate of the driving transistor.

2. The pixel circuit according to claim 1, further comprising: a first light-emitting control transistor, wherein one of a drain or a source of the first light-emitting control transistor is connected to the first power signal, and another one of the drain or the source of the first light-emitting control transistor is connected to one of a drain or a source of the driving transistor; anda second light-emitting control transistor, wherein one of a drain or a source of the second light-emitting control transistor is connected to another one of the drain or the source of the driving transistor, and another one of the drain or the source of the second light-emitting control transistor is connected to the anode of the light-emitting device.

3. The pixel circuit according to claim 2, wherein a gate of the initialization transistor is connected to a first control signal, a gate of the resetting transistor is connected to a second control signal, the resetting transistor is configured to synchronously reset a potential of the anode of the light-emitting device and a potential of the gate of the driving transistor to a potential of the initial voltage signal according to the second control signal, a gate of the first light-emitting control transistor is connected to a third control signal, a gate of the second light-emitting control transistor is connected to the third control signal, and the second control signal is equal to either the first control signal or the third control signal.

4. The pixel circuit according to claim 3, further comprising: a writing transistor, wherein one of a drain or a source of the writing transistor is connected to a data signal, another one of the drain or the source of the writing transistor is connected to one of the drain or the source of the driving transistor, and a gate of the writing transistor is connected to a fourth control signal.

5. The pixel circuit according to claim 4, further comprising: a clamping transistor, wherein one of a drain or a source of the clamping transistor is connected to the gate of the driving transistor, another one of the drain or the source of the clamping transistor is connected to one of the drain or the source of the driving transistor, and a gate of the clamping transistor is connected to the fourth control signal.

6. The pixel circuit according to claim 5, further comprising: a storage capacitor, wherein a first end of the storage capacitor is connected to the first power signal, and a second end of the storage capacitor is connected to the gate of the driving transistor.

7. The pixel circuit according to claim 6, wherein a channel type of the resetting transistor is different from a channel type of the first light-emitting control transistor and a channel type of the second light-emitting control transistor; and wherein the resetting transistor is an oxide transistor, and the first light-emitting control transistor and the second light-emitting control transistor are both silicon transistors.

8. The pixel circuit according to claim 7, wherein the channel type of the resetting transistor and a channel type of the initialization transistor are same; and wherein the initialization transistor is an oxide transistor.

9. The pixel circuit according to claim 1, wherein a potential of the first power signal is greater than a potential of the second power signal.

10. A pixel circuit, comprising: a light-emitting unit serially connected in a light-emitting loop between a first power signal and a second power signal;a driving unit serially connected in the light-emitting loop, and is configured to control a current flowing through the light-emitting loop;an initialization unit, wherein an input end of the initialization unit is connected to an input end of the light-emitting unit, an output end of the initialization unit is connected to a control end of the driving unit, and the initialization unit is configured to initialize a potential of the control end of the driving unit according to a first control signal; anda resetting unit connected to the input end of the light-emitting unit and configured to control a potential of the input end of the light-emitting unit and the potential of the control end of the driving unit to synchronously reset to a potential of an initial voltage signal according to a second control signal.

11. The pixel circuit according to claim 10, further comprising: a light-emitting control unit serially connected in the light-emitting loop, wherein an output end of the light-emitting control unit is connected to the input end of the light-emitting unit, and the light-emitting control unit is configured to control the light-emitting loop on and off according to a third control signal.

12. The pixel circuit according to claim 11, wherein the second control signal is equal to either the first control signal or the third control signal.

13. The pixel circuit according to claim 12, further comprising: a writing unit coupled to an input end or an output end of the driving unit and configured to write a data signal to the pixel circuit according to a fourth control signal.

14. The pixel circuit according to claim 13, further comprising: a clamping unit, wherein an output end of the clamping unit is connected to the control end of the driving unit, an input end of the clamping unit is connected to the input end of the driving unit or the output end of the driving unit, and the clamping unit is configured to clamp the potential of the control end of the driving unit to a potential of the input end of the driving unit or a potential of the output end of the driving unit according to the fourth control signal.

15. The pixel circuit according to claim 14, further comprising: a storage unit, wherein a first end of the storage unit is connected to the first power signal, a second end of the storage unit is connected to the control end of the driving unit, and the storage unit is configured to store the potential of the control end of the driving unit.

16. The pixel circuit according to claim 10, wherein a potential of the first power signal is greater than a potential of the second power signal.

17. A driving method of a pixel circuit, comprising following steps: controlling an initial voltage signal to synchronously initialize a potential of an input end of a light-emitting unit and a potential of a control end of a driving unit by a first control signal and a second control signal;controlling a data signal to be written to an input end of the driving unit or an output end of the driving unit by a fourth control signal, and clamping a potential of the control end of the driving unit to a potential of the input end of the driving unit or a potential of the output end of the driving unit by the fourth control signal; anddriving the light-emitting unit to emit light with a voltage difference between a first power signal and a second power signal by a third control signal.

18. The driving method of the pixel circuit according to claim 17, wherein a potential of the first power signal is greater than a potential of the second power signal.