Patent Grant
12039927
Reference is made to PCT application PCT/US21/15031, entitled “STACKED OLED MICRODISPLAY WITH LOW-VOLTAGE SILICON BACKPLANE” and filed Jan. 26, 2021 as well as PCT Application PCT/US21/15038, entitled “OLED DISPLAY WITH PROTECTION CIRCUIT” and filed Jan. 26, 2021. Reference is also made to non-provisional U.S. application Ser. No. 16/695,191, entitled “MULTIMODAL MICROCAVITY OLED WITH MULTIPLE BLUE-EMITTING LAYERS”, filed Nov. 26, 2019, now U.S. Pat. No. 11,031,577.
The subject invention relates to a pixel circuit, and more particularly to a pixel circuit for crosstalk reduction.
Crosstalk in displays is where the emitted luminance provided by one pixel is unintentionally affected by another pixel. This is undesirable because the pixel affected no longer provides the exact luminance according to the image signal and so, the quality of the image can be degraded. Depending on the amount and nature of the crosstalk, important factors such as color reproduction, contrast (difference between maximum and minimum luminance), grayscale, resolution and “ghosting” in displays can all be negatively impacted.
Any and all types of displays that involve individually controlled pixels to generate an image can be affected by crosstalk to some degree. For example, crosstalk can affect image quality in LED, Quantum Dot and OLED devices. Crosstalk issues tend to be independent of display type. For example, Electroluminescent displays (ELD) displays, backlit Liquid Crystal displays (LCD), Light-emitting diode displays (LED) including MicroLED displays, Organic Light-Emitting Diode displays (OLED), Plasma displays (PDP), Stereoscopic Displays and Quantum Dot displays (QLED) may all suffer from some degree of image degradation from crosstalk. Crosstalk issues also tend to be independent of the type of the light-generating engine in the display; for example, LED, OLED, Quantum Dots. Etc. based displays can all be affected. Typically, the pixels in flat panel displays (i.e., not CRTs) are controlled either by some type of matrix addressing such as active-matrix or passive-matrix designs. Both of these designs can be subject to crosstalk issues.
In some cases, crosstalk may be due to the control circuitry of the display itself such as parasitic capacitance or residual currents. However, this tends not to be a large problem for most designs.
Not all displays suffer from the same degree from crosstalk and some types may be more prone to crosstalk issues. In particular, microdisplays (typically active-matrix devices), where the individual pixels are small and located relatively close together, are susceptible to crosstalk problems. Likewise, OLED displays, which depend on charge migration through vertically stacked organic layers, can also be susceptible to crosstalk problems due to lateral migration. A discussion of crosstalk effects in these formats can be found in Diethelm et al, “Quantitative analysis of pixel crosstalk in AMOLED displays”, Journal of Information Display, 19(2), 61 (2018); Pennick et al, “Modelling crosstalk through common semiconductor layers in AMOLED displays”, J. Soc. Info. Display, 26(9), 546 (2018); and Braga et al, “Modeling Electrical and Optical Cross-Talk between Adjacent Pixels in Organic Light-Emitting Diode Displays”, Soc. Info. Display Digest; 50(S1), Paper 3.3 (2019).
Typically, a microdisplay is less than two inches diagonal (approx. 5 cm) down to an ultra-small display size of less than 0.25″ diagonal. In most cases, the resolution of the microdisplay is high and the pixel pitch is usually 5 to 15 microns. First introduced commercially in the late 1990s, they are commonly used for rear-projection TVs, Head Mounted Displays (HMDs), head-up displays (HUDs), electronic view finders (EVFs), near-eye displays, augmented reality devices, virtual reality devices, smart watches and other wearable devices, and digital cameras. Microdisplays can be made from a range of light-generating technologies, including in particular, MicroLED (Light Emitting Diode) and Organic Light Emitting Diode (OLED).
Currently, microLED microdisplays are based on a standard Gallium Nitride (GaN) wafer, adopted from standard LEDs. This approach has the potential to provide high luminance display devices without lifetime issues at a relatively low price. In general, the standard GaN wafer is patterned into arrays of micro-LEDs. The microLED display is then produced by an integration of the micro-LED array and transistors. However, this approach has several manufacturing concerns including monolithic formation of the micro-LEDs over the transistors, pixel spacing, color generation, and spatial uniformity due to variations of color and luminance between the individual microLEDs.
OLED technology shares many of the attractive features of microLED technology for microdisplays. It is self-emissive, has excellent image quality, is efficient and has an ultra-high color rendition and wide color space. Moreover, formation of an OLED over the transistors is much easier and lower cost than formation of a microLED because OLED layers can be vacuum deposited or directly coated on the transistor backplane. On the other hand, OLEDs can have limited luminance and limited lifetime.
Thus, OLED microdisplays are very attractive from the standpoint of cost and manufacturability. Such devices would typically use active-matrix TFT circuitry either on a non-conducting substrate such as glass or a silicon backplane to control the individual pixel. Typically, these would be manufactured using an OLED formulation with an individually controlled electrode controlled by the circuitry in the backplane. In terms of the OLED, they could be formulated so that each pixel is formulated differently (i.e., each individual pixel emits red (R), green (G) or blue (B) light) or the OLED is formulated in common across all pixels and emits white light so that when used in conjunction with a color filter array (CFA), individual R, G or B pixels are formed. Of these, OLED formulations that are common across all pixels are preferable because they are cheaper and easier to manufacture.
Crosstalk can be caused by both optical and chemical/electrical mechanisms. Some optical processes that can increase the amount of crosstalk include light-scattering and wave-guiding within the device. Optical cross-over can occur in any type of device that internally generates light. Specific to OLEDs with common layers across all pixels, some chemical/electrical processes that can increase crosstalk include lateral carrier migration from an active-pixel area to a neighboring non-active pixel area within the same layer. This migration of charge can create voltage and current in the neighboring pixels and leads to undesired and unintentional emission from that pixel.
It is desirable that the amount of crosstalk between pixels from all sources be 10% or less of the total amount of emission of that pixel, preferable 3% or less, and most preferable 1% or less.
It is believed that there are multiple mechanisms that can result in crosstalk. Short-range modes (0.2-0.7 μm) appear to be a combination of lateral charge carrier and optical mechanisms. Medium-range modes (3-7 μm) interactions appear to be primarily due to lateral charge carrier migration but can be due partially to optical mechanisms. Long-range modes (50-200 μm) interactions appear to be primarily due to light-scatter from an active pixel area to a non-active area. It is also believed that there is an even longer-range optical contribution to crosstalk based on wave-guiding according to the pixel pitch.
Some useful methods to minimize the problem of crosstalk due to optical processes within a display device include:
Some useful methods to minimize the problem of crosstalk due to carrier migration in the OLED device include:
It is also possible to reduce crosstalk by compensation of the driving signal. The original image signal may be adjusted to compensate for differences in light emission by each pixel due to crosstalk so that the desired emission is achieved. However, this requires that the amount of crosstalk present in each pixel in each image be predictable and the image signal be recalculated for each image frame. This greatly increases demand for computation as well as overall computation time. This increases the cost of the device as well as affects response time. In such an approach, there may be parts of the color volume in the areas of high color saturation that cannot be reproduced by displays relying solely on this approach.
Generally speaking, crosstalk is most visible and of highest concern for those pixels that are supposed to have minimum or no (“black’) light emission, or relatively low emission. This is because the additional unintentional light, even if small, arising from crosstalk becomes a very large percentage of overall emission compared to the low or no emission intentionally coming from the pixel. The addition of a small amount of light arising from crosstalk to a pixel with high emission should be less noticeable.
Crosstalk is also more problematic in situations where there are large differences between the emission of a pixel and pixels that are adjacent or spatially close. This could be in terms of pixels where the luminance is low or “black” (non-emitting or minimum emittance) being close to pixels where the luminance is high or at its maximum level. Crosstalk issues can also apply to situations where single color-emitting pixels (for example, a red pixel) are close to pixels emitting a different color (for example, a green pixel) even though the luminance values for both are similar. Moreover, if an unlit pixel of a different color from the color of a neighboring lit pixel but emits that different color because of crosstalk, then highly saturated primary and secondary colors cannot be realized by the display.
There are two common situations where pixels with low or no emission are located near high emission pixels. The first is according to the image. It should be noted that most images are correlated; that is, pixels that are close together will most often have a similar amount of emission and so the degree of crosstalk will be relatively low within the region. For example, there will be little crosstalk in the middle of a large black patch or the middle of a large white patch. Only at edges or boundaries within the image will there be large differences in emission between pixels. Thus, correlated regions of emission may not be uniform and be different in the center than along the boundaries due to crosstalk. The same problem occurs with correlated single-color pixels where color mixing will be more pronounced along edges and boundaries.
The second situation is a display where the emission is generated by scanning through the individual pixels as opposed to all pixels lighting simultaneously. Examples of such devices include passive-matrix and active-matrix displays. In such displays, the pixels are arranged in a matrix of columns and rows. In active-matrix displays, a data signal corresponding to the required luminance according to the image for each pixel along a particular row is created. Then, a scan line allows the data signal to pass to the pixels along that particular row, and the pixels produces the required luminance as per the data signal. Then, the data signals for the next row are generated and the scan line for the next row is activated so the pixels in the next row can create luminance. This row-by-row scanning is repeated to create the entire image and occurs within the threshold of vision to detect. However, crosstalk allows some pixels to produce light when they are supposed to be in an “off” state at that time.
Thus, it would be desirable to prevent emission from pixels due to crosstalk in pixelated display devices by removing or dissipating any voltage or current being supplied to the light-generating portion of a pixel whenever the pixel is supposed to be in an “OFF” or minimum emission state. While such a solution could be applied to any kind of display, it would be particularly suitable when applied to an OLED microdisplay, and even more desirably, where the OLED is a multimodal (white) microcavity OLED used in combination with a CFA. This is because the common layers in the multimodal microcavity OLED allow carrier migration from one “ON” pixel to another neighboring pixel, which might be “OFF”, thus creating enough voltage in the neighboring “OFF” pixel to cause emission, because the layers in a microcavity OLED are necessarily thick (in order to create the microcavity) which promotes lateral carrier migration, and for multimodal OLED microdisplays with 3 or more stacks of light-emitting units, because of high voltages required to drive these multistack OLEDs. This also applies to OLED microdisplays with individually deposited R, G and B emissive materials within the designated pixels, but where all pixels share at least one common OLED layer.
US20100091001A1 and U.S. Pat. No. 8,035,580 both describe a pixel circuit for digital driving of an OLED. Pixel emission due to current leakage through a driving transistor is prevented using a bypass transistor that connects the anode of an OLED to voltage source (which can be set to a potential less than that at the cathode of the OLED) when the pixel is in an “OFF” state. The same data signal is applied to the gates of both the bypass transistor and the driving transistor when a scan line is activated for that row of pixels.
CN107134257B describes a pixel circuit for preventing pixel emission due to carrier migration within a charge generating layer (CGL) using a transistor that connects the anode of an OLED to a low voltage source VSENSE. The gate of the connecting transistor is controlled by a scan line separate from the scan line used to control the driving transistor.
U.S. Ser. No. 10/665,161B2 describes a pixel circuit for preventing pixel emission due to current leakage through a driving transistor where there is a discharge section that can cause a flow of the drive current to bypass the light emitting element. The discharge section contains a transistor whose gate is controlled by a scan signal separate from the scan signal that controls the driving transistor.
U.S. Pat. No. 9,324,264B2 describes a pixel circuit for preventing pixel emission using a bypass unit, with a bypass transistor, that connects the anode of an OLED to VVAR (which can be set to a potential less that that at the cathode of the OLED) when the pixel is in an “OFF” state. In various embodiments, the gate of the bypass transistor is controlled by a scan line or a separate DC voltage supply.
U.S. Pat. No. 9,123,294B2 describes a pixel circuit for compensating the threshold voltage of the driving TFT. As part of the circuit, there is a transistor that allows the driving current to bypass the OLED so that there is no emission from the pixel. The gate of this transistor is controlled by the same scan line used to control the gate of the driving transistor or a different scan line.
US20030112205A1 describes a pixel circuit that can reduce the occurrence of residual image phenomenon using a discharging circuit which discharges electric charge accumulated across the pixel. The discharging circuit contains a bypass transistor who gate is controlled by the scan line.
US202000066815 discloses a pixel circuit with a leakage current sink to prevent crosstalk between pixels that contains a leakage current control transistor located between the connection between a serially connected drive and emission transistors and a ground. The gate of the leakage current control transistor is controlled by VBIAS, which is the same for all pixels in the display, and not a data signal.
US20180180951 describes a display device with a pixel circuit that has a transistor whose source is connected to a node between a driving transistor and the anode of a light-emitting device and whose drain is connected to a potential supply line, which can be a ground. The gate of this transistor is controlled by a scan line.
US20100253666 describes a pixel circuit with a discharge transistor connected between a node located between a driving transistor and the pixel whose gate is controlled by a scan signal.
Lin et al, “UHD AMOLED Driving Scheme of Compensation Pixel and Gate Driver Circuits Achieving High-Speed Operation”, J. Elec. Devices Soc., 6, 26 (2017) describes a pixel circuit for compensating variations in Vth. As part of the circuit, there is a transistor in electrical contact with the OLED and VSS that allows the driving current to bypass the OLED. The gate of this bypass transistor is controlled by a scan line different from the scan line used to control the scan transistor that controls the gate of the drive transistor.
Kimura et al, “New pixel driving circuit using self-discharging compensation method for high resolution OLED micro displays on a silicon backplane”, J. Soc. Info. Display, 25(3), 167 (2017) disclose a pixel circuit for luminance uniformity that includes a bypass circuit between the anode of the OLED and VSS to improve contrast. This bypass circuit has a transistor whose gate is controlled by a scan line different from the scan line used to control the scan transistor that controls the gate of the drive transistor.
Kwak et al, “Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays”, Japanese Journal of Applied Physics, 50, 03CC05 (2011) describe a pixel circuit for improving uniformity that includes a bypass circuit between a node located between an emission transistor and the anode of the OLED and a ground. The gate of this bypass transistor is connected to the node so that Vg=Vs in order to limit the drain voltage at the emission transistor. The purpose of this is so as not to exceed the maximum allowed Vds of the transistors.
Vogel et al, “OLED microdisplays in near-to-eye applications: challenges and solutions”, Proc. SPIE 10335, Digital Optical Technologies, 1022502 (2017) describe the problems of making OLED microdisplays. It notes that “The challenge at high luminance is to supply and modulate the forward voltage at dynamic range levels of 2V up to 7 V (or even more, depending on OLED stack architecture) toward each OLED pixel; this requires integrated driving transistors able to withstand voltage swing of 5 V or more. That's a high-voltage for advanced mixed-signal CMOS processes . . . .” This reference also notes “Due to opaque CMOS backplanes with feasible voltage sweeps of about 5V, only top-emitting single and double units can be integrated.”. It describes OLED configurations that require a higher operating voltage, which results in the need for transistors rated to operate at voltages greater than 5V, and the impact such higher voltage transistors would have on aperture ratio and pixel size.
Some important features of the invention include, but are not limited to:
An active-matrix display comprising a power source VDD (1); a pixel array of columns and rows, each light-emitting pixel (2) having an individually controlled segmented electrode (109) and an opposite electrode (125); a driving circuit comprising at least one data line (3) that supplies a data signal (VDATA) for each pixel (2) along a column, wherein the data signal (VDATA) controls the gate of a driving transistor (T1) whose source and drain are connected between the power source VDD (1) and the segmented electrode (109) and at least one scan line (4) that supplies a scan signal (VSCAN) that controls the gate of a scan transistor (T4) that enables the loading of the data signal (VDATA) from the data line (3) to the gate of the driving transistor (T1) for each pixel (2) along a row; and a pixel control circuit (5) in electrical contact with the segmented electrode (109) wherein the pixel control circuit (5) prevents light emission by the pixel (2) based on the value of the data signal (VDATA) for that pixel (2).
The pixel control circuit (5) can be attached to a node (NODE1) located along the electrical line between the driving transistor (T1) and the segmented electrode (109). The pixel control circuit (5) prevents light emission by having a bypass transistor (T3) that allows electrical connection between the segmented electrode (109) and a sink (6), which drains the voltage and/or current to a level below that needed for light emission, whenever the data signal (VDATA) indicates that the pixel (2) should be non-emitting or have emission below a threshold. The pixel control circuit (5) is disabled when the value of the data signal (VDATA) for that pixel (2) indicates emission above a threshold.
The pixel control circuit (5) may comprise: a decision subunit (9) that compares the data signal voltage VDATA to a reference voltage VREF and based on that comparison, provides an output voltage VOUTPUT; and a latch subunit (10) that receives the output voltage VOUTPUT from the decision subunit (9) and controls the bypass transistor (T3) so that either the electrical connection between the segmented electrode (109) and the sink (6) is allowed or disallowed based on VOUTPUT.
Additionally, whenever the scan signal (VSCAN) indicates that the scan transistor (T4) should prevent the loading of the data signal (VDATA) to the gate of the driving transistor (T1) and VOUTPUT was set to disable the bypass transistor (T3), then the bypass transistor (T3) allows electrical connection between the segmented electrode (109) and a sink (6), which drains the voltage and/or current to a level below that needed for light emission.
The pixel control circuit (5) may comprise a decision subunit (9) that compares the data signal voltage VDATA to a reference voltage VREF and based on that comparison, provides an output voltage VOUTPUT; a transistor (TB) whose gate is controlled by a scan signal VSCAN and is connected in series between the decision subunit (9) and the gate of the bypass transistor (T3); so that whenever VSCAN is such that the transistor (TB) is enabled so that VOUTPUT is applied to the gate of the bypass transistor (T3), electrical connection between the segmented electrode (109) and a sink (6) is allowed or disallowed based on the value of VOUTPUT.
Any of the above pixel control circuits where VREF and the voltage of the power source VDD (1) are the same.
The above displays can be an OLED microdisplay, particularly where the light-emitting pixels (2) are formed using a multimodal microcavity OLED with a color filter array (129A, 129B, 129C), may additionally have three or more stacks of light-emitting units (113, 117, 121), or may have a threshold voltage Vth of 5V or greater.
Any of the above displays where there is a switching transistor (T6) connected in series between the driving transistor (T1) and the segmented electrode (109) so that the driving transistor (T1) and switching transistor (T6) are in series between the power source (1) and the segmented electrode (109). The driving transistor (T1) and switching transistors (T6) can be both p-channel transistors and the bypass transistor (T3) may be a n-channel transistor.
The above displays have reduced crosstalk effects.
It should be noted that any of the described features may be combined in any order or extent without limitation as desired, except when incompatible.
For the purposes of this disclosure, the terms “over” or “above” mean that the structure involved is located above another structure, that is, on the side opposite from the substrate. “Top”, “uppermost” or “upper” refers to a side or surface further from the substrate while “bottom”, “bottommost” or “bottom” refers to the side or surface closest to the substrate. Unless otherwise noted, “over” should be interpreted as either that the two structures may be in direct contact or there may be intermediate layers between them. By “layer”, it should be understood that a layer has two sides or surfaces (an uppermost and bottommost) and that multiple layers may be present and is not limited to a single layer.
For light-emitting units or layers, R indicates a layer that primarily emits red light (>600 nm, desirably in the range of 620-660 nm), G indicates that a layer primarily emits green light (500-600 nm, desirably in the range of 540-565 nm) and B indicates a layer that primarily emits blue light (<500 nm, desirably in the range of 440-485 nm). It is important to note that R, G and B layers can produce some degree of light outside the indicated range, but the amount is always less than the primary color. Y (yellow) indicates that a layer that emits significant amounts of both R and G light with a much lesser amount of B light. “LEL” means light-emitting layer. Unless otherwise noted, wavelengths are expressed in vacuum values and not in-situ values.
The threshold voltage (Vth) of the OLED stack can be estimated by linear extrapolation of the I-V curve after significant light emission begins back to the voltage axis. Because this method is not exact because I-V response curves for OLEDs may not be completely linear over their response ranges, values calculated in this manner are not exact. A general range is +/−10%.
Active-matrix displays are generally understood to have an array of individual controlled pixels arranged in a two-dimensional array of orthogonal columns and rows. However, it is also understood that “columns” and “rows” are subjective terms and do not imply any particular orientation but rather two groupings of individual pixels which only overlap at a single pixel. It is conventional in the active-matrix art that “columns” are generally portrayed as being aligned in a vertical direction in the array and “rows” are generally portrayed as being aligned in a horizontal direction in the array. Likewise, there are common electrical connections for all pixels along a “column” which are conventionally referred to as “data lines” and which are portrayed as being in a vertical direction as well common electrical connections for all pixels along a “row” which are conventionally referred to “scan” or “select” lines and which are portrayed as being in a horizontal direction. However, these conventional terms may or may not reflect the actual physical locations of the pixels. It is generally understood that “data signals” sent to a pixel control the amount of luminance required by that pixel, while “scan or select signals” control the timing of when the “data signal” is sent and received by the pixel.
In active-matrix displays, each pixel must have at least one individually controlled electrode that is separate and distinct from the individually controlled electrode of other pixels in order to operate. In other words, the individually controlled electrode portion of each pixel is ‘segmented’ or divided up into individually controlled portions as compared to being common or continuous across all pixels. Typically, electrical connection of the pixel circuit to the light-emitting element is made through the segmented electrode. Note that in the context of this description, a “pixel” acts as a single, uniform and minimum unit and is not further subdivided. For example, a color pixel (that is, a discrete point in a color image) that can produce white light can be composed of three separated but spatially correlated “pixels”, each emitting one of R, G or B light which together act as subpixels for the color pixel. Further note that a pixel can consist of a single light-emitting element or multiple commonly controlled light-emitting elements that all act together in unison.
In the following, the terms “OFF” and “ON” are used generally in reference to a specific element or feature and may have different requirements depending the kind of element. For a pixel, “OFF” means no (or a minimum amount below a threshold of) light being emitted from the pixel and “ON” means at least some light above a minimum level (above a threshold) is being emitted. “ON” may mean full emission or partial emission; that is, some level of emission above the minimum, which is desirably zero. For the light-generating engine in the pixel (i.e., OLED or LED), “OFF” means no measurable luminance above a minimum luminance and “ON” means there is measurable luminance above the minimum. For NMOS/PMOS circuit elements such as p-channel and n-channel transistors, “OFF” means Ids is essentially zero except for any leakage current; “ON” means that Ids is non-zero and at least some current passes through the transistor. This applies to all transistors including scan, drive, emission and bypass transistors without regard to the type of transistor. In such elements, “OFF” or “ON” is controlled by the voltage applied to the gate of the device. In terms of a Data or Scan signal, “OFF” means a data value that is applied to the pixel circuit, particularly the gate of a transistor, such that any/all of the below described “OFF” conditions occur; likewise, “ON” means a data value that is applied to the pixel circuit, particularly the gate of a transistor, such that any/all of the below described “ON” conditions occur.
A pixel that is “OFF” should have no more than 1% of the maximum emission that can be produced, and more preferably 0.01%. Ideally, an “OFF” pixel should have no emission at all. An “OFF” pixel can also be called a “dark” or “black” pixel, which are equivalent terms.
The minimum amount of emission can be defined or set according to a threshold emission value which will depend on the type and characteristics of the particular display. Typically, the threshold can be 1% or less of the maximum emission that the pixel is capable of emitting, desirably less than 0.1% of the maximum emission and most desirably zero emission.
The data or image signal in displays is sent by the control circuitry to each subpixel to control the level of its emission. It is common that these image signals are not continuous but quantized into some number of levels between the signal that generates the upper or maximum level of emission and the signal that generates no or the least amount of emission. These levels are called Code Values or CV (among other designations). A common system used in displays is where a CV=0 indicates no emission and a CV=255 indicates maximum emission so that there are 254 discrete intermediate levels between the two extremes. For example, in an 8-bit, sRGB-like color encoding, 1% intensity corresponds to about CV 26, while 0.01% corresponds to less than one CV, although it should be noted that using more than 8 bits or using a different nonlinear encoding would mean 1% or 0.01% would correspond to different CVs. Ideally, in CV terms, the threshold for emission to apply the PCC circuit should be <30 CV, desirably <5 CV and most desirably 0 CV or the equivalent if not 8-bit, sRGB-like color encoding.
The data or image signal in displays is sent by the control circuitry to each subpixel to control the level of its emission. It is common that these image signals are not continuous but quantized into some number of levels between the signal that generates the upper or maximum level of emission and the signal that generates no or the least amount of emission. These levels are called Code Values or CV (among other designations). A common system used in displays is where a CV=0 indicates no emission and a CV=255 indicates maximum emission so that there are 254 discrete intermediate levels between the two extremes. Thus, in a system using CV values between 0 and 255 to control the luminance of each pixel unit, a threshold for activating the PCC for that pixel unit can be a CV=3 or less and most desirably, a CV of zero.
The purpose of the above active-matrix pixel circuit is to turn “ON” the light-emitting element (to cause emission at some level) or “OFF” the light-emitting element (no or minimum emission) based on the signal from the data line. The signal from the scan line only controls the timing of when the data signal is applied to the pixel. No emission from the pixel will occur whenever the value of the data signal meets any one of the following criteria:
Accordingly, for the purposes of this invention, a pixel is considered “OFF” whenever the data signal has a value intended by the display controller so that any of the above criteria will be met, and “ON” whenever the data signal has a value intended so that none of the above criteria will be met. Note that even if a pixel is “OFF” according to the value of the data signal, there still can be some emission due to crosstalk or other factors such as current leakage through the transistors.
The pixel circuits of the invention are desirably part of a silicon backplane. Silicon backplanes are derived from a silicon wafer (also called a slice or substrate). They are a thin slice of semiconductor, such as a crystalline silicon (c-Si), used for the fabrication of integrated circuits. The wafer serves as the substrate for microelectronic devices built in and upon the wafer. It undergoes many microfabrication processes, such as doping, ion implantation, etching, thin-film deposition of various materials, and photolithographic patterning. Finally, the individual microcircuits are separated by wafer dicing and packaged as an integrated circuit. Wafers are grown from crystal having a regular crystal structure, with silicon having a diamond cubic structure with a lattice spacing. When cut into wafers, the surface is aligned in one of several relative directions known as crystal orientations. Silicon wafers are generally not 100% pure silicon, but are instead formed with an initial impurity doping concentration of boron, phosphorus, arsenic, or antimony which is added to the melt and defines the wafer as either bulk n-type or p-type. For background, see Chapter 7 in “Flat Panel Display Manufacturing”, Souk, L., Ed., 2018. It is desirable that the silicon backplane be a single-crystal Si wafer.
In order to provide control circuitry for the operation of the stacked OLED, thin-film transistors (TFTs) along with other components such as capacitors, resistors, connecting wires, and the like are provided on the surface of the silicon wafer. For example, see T. Arai, “High Performance TFT Technologies for the AM-OLED Display manufacturing”, Thesis, Nara Institute of Science and Technology, 2016; M. K. Han, Proc. of ASID '06, 8-12 October, New Delhi; U.S. Pat. No. 9,066,379; and U.S. Ser. No. 10/163,998. It should be understood that the TFTs may or may not incorporate the silicon wafer as part of the TFT structure or may be prepared from separate materials deposited on the surface.
TFTs can be made using a wide variety of semiconductor materials. The characteristics of a silicon-based TFT depend on the silicon's crystalline state; that is, the semiconductor layer can be either amorphous silicon, microcrystalline silicon, or it can be annealed into polysilicon (including low-temperature polysilicon (LTPS) and laser annealing).
The manufacture of silicon backplanes with suitable control circuitry is a very well known, understood and predictable art. However, because of the cost and complexity of the manufacturing process and equipment, it is often not practical to build facilities to manufacture a particular backplane. Instead, a foundry model was been widely adopted in the industry where the functional characteristics of microelectronic devices have become more standardized. This standardization allowed design to be split from manufacture. A design that obeyed the appropriate design rules could be more easily and cheaply manufactured by different companies that had compatible manufacturing methods. For this reason, the control circuitry on silicon backplanes is generally limited to the use of standard components selected from a range of options provided by the manufacturer of the backplane. For example, a manufacturer of silicon backplanes may provide the option of incorporating various designs of transistors such as 1.8V, 2.5V, 3.3V, 5V, 8V and 12V into a customer's design, but would not be able to provide (without great expense) transistors that are not included in the offered designs.
For the purposes of this application, “Low-Voltage” (LV) is defined as those analog microelectronic components that are sized and designed to safely and reliably operate at 5V or less. “Medium-Voltage” (MV) microelectronic devices are generally considered to be in the range of 9-12V while “High-Voltage” (HV) microelectronic devices are generally considered to be in the range of 18-25V. It should be noted that these voltage ratings are set by the manufacturers and the manufacturers do not recommend exceeding the set maximum voltage for each transistor.
Active-matrix displays, which generate light (luminescence) upon electrical activation, that have been deposited or integrated onto a thin-film transistor (TFT) array located on a silicon chip, where the TFT array functions as a series of switches to control the current flowing to each individual pixel. Typically, this continuous current flow is controlled by at least two TFTs at each pixel (to trigger the luminescence), with one TFT to start and stop the charging of a storage capacitor and the second to provide a voltage source at the level needed to create a constant current to the pixel.
This is illustrated in
In basic pixel circuit 100 of an individual pixel, there is a power source 1 connected to the source of a driving transistor T1 and the segmented electrode of a light-emitting element 2 which is connected to the drain of T1. The gate of T1 is connected to a data line 3 through the source and drain of a scan (select) transistor T4. The gate of T4 is connected to a scan line 4. The data line 3 supplies a data signal VDATA, which is typically a voltage. The scan line 4 supplies a scan signal VSCAN, which is typically a voltage. There is a pixel control circuit (PCC) 5 attached to NODE1 located between the drain of T1 and the segmented electrode of the light-emitting element 2. PCC 5 is also connected to the data line 3 as well as a sink 6. The opposite electrode of the light-emitting element 2 is connected to a second power source 7. In this example, T1 and T4 are p-channel transistors.
NODE1 is an electrical connection located along the electrical line between the driving transistor and the pixel (2). Desirably, there are no other electrical components connected in series between NODE1 and the light-emitting element (2). Desirably, there is at least one driving transistor in series between NODE1 and the power source (1).
In terms of operation, the power source 1 will supply sufficient power to the segmented electrode of the light-emitting element 2 whenever the data signal, delivered through the data line 3 and select transistor T4 to the gate of T1, enables current flow through T1 and so, the pixel will emit according to the magnitude of the data signal. The select transistor T4 is controlled by the scan line 4 in order to select an individual row of pixels. In pixel rows not selected, T4 prevents the voltage from the data line 3 flowing to the gate of driving transistor T1 and so, T1 does not enable current flow from the power source 1 to the segmented electrode of the light-emitting element 2 and so, the pixel should not change its emissions until the scan line reconnects the pixel to the data line.
PCC 5 helps to prevent increased emission in pixels from crosstalk by maintaining the voltage and/or current at the segmented electrode 2 below that required to cause light emission whenever the data signal is such that it will not enable current flow through T1 (i.e., no emission from the pixel is desired). PCC 5 uses the data signal as input. Whenever the data signal is such that it will not cause the pixel to emit or only have very low emission, PCC 5 electrically connects the segmented electrode 2 to sink 6, which maintains the voltage and/or current at a level below that necessary to cause the pixel to emit. However, whenever the data signal is such that it will cause the pixel to emit, then PCC 5 does not connect the segmented electrode 2 to sink 6. In this way, the pixel is prevented from having emission whenever the data signal is such that the pixel is supposed to be non-emitting, even if there is enough voltage and/or current at that pixel for emission due to crosstalk. When the pixel is supposed to be emitting above some minimum amount, PCC 5 is not involved in the driving of the pixel. It should be noted that whether PCC 5 connects the segmented electrode 2 to the sink 6 is determined by the value of the data signal received from the data line 3 and is independent of whether the row is selected through the scan line 4.
PCC 5 is an integral part of the pixel circuit 100. By integral part of the pixel circuit, it is meant that the PCC 5 is located locally in the backplane together with the driving transistor and other components of the pixel circuit underneath the pixel and within the active display area. PCC 5 only controls one pixel at a time according to the data signal for that pixel over the frame period. It does not control other pixels along the same row that are typically selected by a scan or select line.
PCC 5 is not part of the device circuitry (a display controller) that determines and controls the data signal and the timing of the scan/select signal; such controller circuitry is typically located outside the active display area. Generally speaking, the display (image) controller converts a plurality of image signals into a plurality of image data signals and transmits the same to the data driver. The controller receives a vertical synchronization signal Vsync, a horizontal synchronizing signal Hsync, and a clock signal, generates control signals for controlling the scan driver, the emission control driver, and the data driver, and transmits them to the appropriate line. Further, the controller generates the power control signal for controlling the power supply and transmits the same to the power supply. While the internal operations of the controller may use the data signal and scan signal to turn “ON” or “OFF” a particular pixel, this is different from the invention where the determination to enable the bypassing of an “OFF” pixel is made in the local individual pixel circuit and based on the data signal.
Sink 6 is a pixel circuit component that controls the voltage at the segmented electrode of the pixel. It can contain an electrical connection to a power source VBIAS which maintains the voltage below Vth of the pixel to prevent emission. The power supply wiring for VBIAS is preferred to be common to all pixels to make the backplane simpler, more compact, and lower cost (less mask levels). Sink 6 can also be connected to a ground or have an electrical connection to the opposite electrode 125 of the pixel (typically, VSS).
As noted, the decision circuit 9 makes a determination, based on the data signal for that pixel, of whether the pixel is supposed to be “ON” or “OFF” and then activates T3 appropriately to allow or disallow potential to pass from the segmented electrode 2 to the sink 6. This control of T3 can be based only on the data signal with no other input. This determination, which is based only on the data signal, can be made in any number of ways or methods.
For example, consider an example of a display with pixel circuits where the data signal, expressed as the voltage VDATA, is zero when the emission from the pixel should be “OFF” and high (non-zero) whenever the emission from the pixel should be “ON”. In this case, VDATA can be used directly and without modification as input for the latch circuit 10 as shown in 200 in
In general, the decision circuit 9 may comprise a decision circuit that has the function of telling if an input voltage is above or below a given threshold. A decision circuit can also compare two voltages and provides an output to indicate which is larger. Decision circuits (sometimes referred to as a comparator or comparator circuit) are often used, for example, to check whether an input has reached some predetermined value. Comparator circuits for use in OLEDs are well-known. For example, see U.S. Pat. No. 9,786,209B2, US20060082528A1, US 20190088205, U.S. Pat. No. 7,595,596B2, In et al, “P-8: A Novel Feedback-Type AMOLEDs Driving Method for Large-Size Panel Applications”, Society for Information Display, 36(1), 252 (2005) and Neha et al, “Design and Analysis of Comparators using 180 nm CMOS Technology”, International J. of Elec. And Comm. Tech., 7(2), 122 (2016).
One example of a suitable decision circuit 9 that requires a reference signal is shown in
If the voltage VREF connected to the gate of T13 is less than VDATA connected to the gate of T14, T13 is “OFF” and T14 is “ON” and N1 will go low such that T3 (the bypass transistor) turns “ON”. The mechanism for this is as VDATA increases to be greater than VREF the voltage at N2 becomes VDATA−Vgs of T14. The Vgs of T14 becomes the value such that Ids of T14=Ids of T15 (bias current) At this point Vgs of T13=VREF−VN2 is less than the threshold voltage of T13 and T13 turns “OFF”. When T13 turns “OFF”, Ids of T13=“OFF” thus Ids of T11 and T12=“OFF”. T14 is trying to set its Ids to IBIAS but with T13 “OFF”, the VDRAIN of T14 lowers so as to turn “ON” T3.
If the voltage VREF connected to the gate of T13 is greater than VDATA connected to the gate of T14, T13 is “ON” and T14 is “OFF” and N1 will go high such that T3 (the bypass transistor) turns “OFF”. The mechanism is now reversed with the voltage at N2 becomes Vref−Vgs of T13 where Vgs of T13 becomes the value such that Ids of T13=Ids of T15 (bias current). The Ids of T11 and T12=Ids of T13. The Vgs of T14 decreases until it is less than the threshold voltage of T14 and T14 turns “OFF”. The drain voltage of T14 now rises so as to turn “OFF” T3.
The use and operation of latch circuits (also known as flip-flop circuits) are well-known and have been used in OLEDs. For example, see U.S. Pat. No. 8,068,072, US20090295770 and U.S. Ser. No. 10/546,541.
The general operational sequence of pixel circuit 200 is shown in the flow diagram shown in
In a second step, the display controller sends a scan signal via scan line 4 that sets scan transistor T4 to be “ON” for the entire 1st row of pixels. The scan clock controls the timing of which rows are activated by the scan signal.
In a third step, which is simultaneous with the second step, a data signal is sent through data line 3 for each individual pixel along that 1st row. The data signal serves as input to two different portions of the pixel circuit. In the first, the signal data passes through T4 to the gate of the drive transistor T1. The data signal controls the gate of the drive transistor T1 to allow the appropriate amount of power to pass from the power supply 1 to the light-emitting element 2. In the second, the data signal is input to PCC 5 which controls the gate of the bypass transistor T3.
Step 4 depends on the data signal. If the data signal is such that T1 is turned “ON” and so power can flow from power supply 1 to light-emitting element 2, the pixel will emit light. Simultaneously, the decision circuit 9 of the PCC 5 determines whether the data signal is sufficient to cause T1 to be “ON”. In the case of pixel circuit 200, this determination is made by comparing the data signal to a reference signal. If the difference between the data signal and the reference signal is such that the determination is that the data signal will cause pixel emission, then a “OFF” signal is sent as output by decision circuit 9 to a latch circuit 10. Latch circuit 10 then passes the output signal to the gate of bypass transistor T3 so that T3 is “OFF” and allows no electrical connection between the segment electrode of 2 and the sink 6. The latch circuit 10 also “locks” the “OFF” signal and maintains it during the entire frame and until reset during the initialization of a new frame. In this way, the presence of the bypass transistor T3 has no effect on the operation of an emitting pixel and the display operates in a normal manner.
However, if the difference between the data signal and the reference signal is such that the determination is that the data signal will not allow pixel emission, then a “ON” signal is sent as output by decision circuit 9 to a latch circuit 10. Latch circuit 10 then “locks” the “ON” signal at the gate of T3 and maintains it during the entire frame and until reset during the initialization of a new frame. In this way, whenever the data signal indicates that the pixel should not be emitting light, the bypass transistor T3 is “ON” and so any power at the segmented electrode of the light-emitting element 2 will be shunted to sink 6 and there will not be any emission from the pixel. In this case, the pixel is protected against emission caused by electrical crosstalk as well as any current leakage through the drive transistor T1.
The timing of the latch circuit 10 is controlled by shunt clock 11 which is part of the display controller and activates the latch circuit 10 during the time during which the data and scan signals are being written for that individual pixel and the determination by PCC 5 is being made. The shunt clock 11 is specific to a row and the latch circuit 10 prevents data written to subsequent rows without impacting data written to previous rows. While the shunt clock 11 can be different from a scan clock which controls the timing of scan sign sent to the gate of T4 to allow that data signal to pass to the gate of T1, it is desirably the same. It can also initiate at the same time as the scan signal and end before the scan signal ends.
It is important that the latch circuit 10 maintains the “ON” or “OFF” signal at T3 for the entire time of the image frame until reinitialized. This is because the data line supplies a data signal for each individual pixel of the column at one time or another. In normal operation, the data signal is not received by pixels in any row not selected by the scan signal because the scan transistor T4 is “OFF”. However, in this case, the PCC 5 will receive the data signal for other pixels in different rows, without regard to whether its row has received a scan signal to activate T4. By ‘locking’ the signal that controls T3 at the time that pixel is being actively received the intended data signal, the data signal for other pixels will not affect whether the bypass transistor is “ON” or “OFF” for that individual pixel.
This is one of the advantages of using a PCC to control a bypass transistor solely on the basis of the value of the data signal without direct involvement of the scan signal. As part of the initialization of Step 1, a data signal signifying that the pixel should be “OFF” can be sent to all pixels at once so that the PCC 5 causes the bypass transistor T3 to be “ON” and so, there is no pixel emission for any reason. Then during steps 2-7, the bypass transistor T3 in each pixel is turned “OFF” or “ON” (as determined by the data signal) as each row is scanned in sequence. This means that any neighboring pixel rows that are not yet activated will have the bypass transistor turned “ON”. For example, while the Nth row is being activated and the bypass transistor T3 is being turned “ON” or “OFF” according to the data signal whether that pixel should emit or not, the bypass transistor T3 will be “ON” for the entire (N+1)th, (N+2)th, etc. rows. Since some of the pixels in the Nth row will be emitting, crosstalk can cause potential at the segmented electrodes in neighboring pixels in the (N+1)th, (N+2)th, etc row, even though they haven't been activated yet. Yet, because the bypass transistor T3 is “ON” in these un-activated rows, they cannot emit. In this way, the effects of crosstalk can be reduced.
Another advantage of using a PCC is that a rolling scan could be used for crosstalk minimization in which an active (“ON”) display row was bordered by “OFF” lines. Thus, for rows N, (N+1), (N+2), the pixels in row (N+1) would be turned “ON” while rows N and (N+2) would be turned “OFF”. In this way, the effects of crosstalk can also be reduced.
It is also possible that after each pixel in a row that has been scanned and activated, to resend a data signal signifying that all of the pixels along that row should be “OFF”. This will require that a second scan signal activate that recently activated row in order to send the “OFF” data signal. For example, a scan signal activates the Nth row to receive the appropriate “ON” or “OFF” data signal for the pixels in that row. Then, when the scan signal moves on down the rows and activates the (N+1)th row, a scan signal is resent to the Nth row, but with a data signal that indicates that all pixels should be “OFF”. However, the timing of these two scan signal must not overlap so that the Nth and (N+1)th rows can each receive the correct data signal at the correct time. For example, the timing may be adjusted so that after the (N+1)th row is activated, but before the (N+2)th row is activated, the display controller sends a scan sign to activate the Nth row with a data signal that sets the Nth row pixels to be “OFF”. In this way, even more pixels will be prevented from emitting due to crosstalk.
To be more specific in terms of the operation of the circuit shown in
In this embodiment, the circuit operation of the pixel circuit shown in
The latch circuit 10 receives VOUTPUT while the shunt clock 11 changes from zero to a high (non-zero) value. The output of the latch circuit 10, VLATCH, is then set to be the same as VOUTPUT. The shunt clock 11 then changes from a high value back to zero. This “locks” VLATCH to be the same value as VOUTPUT and no longer changes if VOUTPUT subsequently changes. VLATCH is then applied to the gate of the bypass transistor T3 which is a n-channel transistor. When VLATCH (which is the same as the VOUTPUT when the shunt clock 11 was a high value) is low/zero, then T3 is “OFF” and the pixel emits light normally. When VLATCH is high (non-zero), T3 is “ON” and the pixel will not emit because any current is shunted to the sink 6.
One of the advantages of using a PCC that depends on the signal data to allow the shunting of any voltage and/or current at the segmented electrode of any “OFF” pixel along the entire column will be protected from any crosstalk without regard to whether that pixel is in a selected row or not. Prior art solutions, which depend on the scan signal to shunt voltage and/or current at the segmented electrode, only apply to an activated row. In this way, the total number of possibly “OFF” pixels which have crosstalk protection will be increased and the overall amount of crosstalk will be decreased.
However, not all pixels that could possibly be “OFF” during the frame time will be covered by using the data signal to shunt any voltage and/or current at the segmented electrode to prevent emission. To this end, the use of the data signal to cause shunting can be used together with any of the known methods where the shunting is based on the scan signal. When used in combination, any pixel that is supposed to be “OFF” according to the image will be shunted and no emission will occur.
An example of this combination is shown in
In any case, the purpose of scan lines 4 or 13 is to control the gate of the second bypass transistor T5 so that it is “OFF” when the pixel is emitting, and “ON” when the pixel is non-emitting, without regard to whether the first bypass transistor T3 is “ON” or “OFF”. Most desirably, T5 is “ON” when the pixel is non-emitting and T3 is “OFF”.
However, this is not entirely sufficient by itself since whenever the scan signal 4 indicates that the scan transistor T4 is “ON” so that the drive transistor T1 is activated according to the data signal 3, some pixels may be “ON” (with at least some emission) and some pixels may be “OFF” (no emission) according to the data signal (based on the image). In order to additionally prevent emission in any “OFF” pixels in activated rows, a bypass line 17, which indicates whether the pixel should be emitting or not, is used.
Bypass line 17 can be a reference source that operates the same as reference source 8 in 150 (
Alternatively, the comparison between the data signal from 3 and a reference signal that is indicative of whether the pixel is intended to emit or not does not have to be made within PCC 5, but in a different part of the circuit. In such cases, the decision circuit 9 can use the signal from bypass line 17 directly.
In both of the above options, the decision circuit 9 is located within the PCC 5. It controls the operation of T3 based on some combination of the scan signal from 4 together with the data signal from 3.
In both 275 and 285, the decision circuit 9 will output a signal to the gate of T3 that will enable or disable T3 appropriately. If the value of the data signal from 3 is such that that T1 will be “OFF” (drive value=0), either because T1 is not receiving a data signal (T4 is “OFF”) or because the received data signal from 3 is for no emission, then the signal from 9 will enable T3. If the value of the data signal from 3 is such that T1 will be “ON”, then the signal from 9 will disable T3. It is desirable that each pixel should have a separate and independent bypass line 17 that controls the gate of T3 through a decision circuit.
In 275 and 285, it is desirable that T1 is a P-channel transistor and/or T3 is a P-channel transistor. T1 and T3 may also be N-channel transistors or T1 may be a P-channel and T3 a N-channel.
In some embodiments, the PCC may require a power source. The PCC power source may be the same as power source 1 (i.e., VDD) or it may be a separate and independent power source.
The PCC can be activated over the entire frame time. In some cases, depending on the image requirements, it may be activated over multiple sequential frames or for a limited number over a set number of frames. For example, the PCC can be activated for only 5 out of 10 frames, either as a block of 5 frames, followed by 5 frames where it is not activated or 10 frames in an alternating fashion such as on/off for 10 frames or 2 frames on/2 frames off for 10 frames. In some cases, it may be desirable to only activate the PCC over a portion of an individual frame. For example, the PCC can be activated for half the frame and turned off for the remainder of the frame.
While the pixel circuits described above can be used in any kind of display, particularly active-matrix displays, they would be particularly suitable for an active-matrix OLED microdisplay and even more desirably, when the OLED is a high voltage multimodal (white) microcavity OLED. This is because of the combination of the high voltage necessary to operate such OLEDs, the common layers that allow carrier migration from one “on” pixel to another neighboring pixel, which might be “off”, thus creating enough voltage in the neighboring “off” pixel to cause emission and because the layers in a microcavity OLED are necessarily thick (in order to create the microcavity) which promotes lateral carrier migration.
Microdisplays require very high luminance in order to be useful under all environmental conditions, such as outdoors in bright sunlight. Even under controlled environment conditions such as in VR googles, very high luminance is needed to create an immersive visual experience. Very high luminance from the display allows the use of lower efficiency optics that are smaller, lighter weight, and less expensive, producing a headset that is more competitive.
Currently, state-of-the-art OLED microdisplays do not provide as much luminance as desired. For example, a press release by one manufacturer of tandem OLED microdisplays describes full color products that may be able to deliver as much as 2.5 k nits, but admits that 5 k nits would be a more desirable goal (see https://www.kopin.com/kopin-to-showcase-latest-advances-in-its-lightning-oled-microdisplay-line-up-at-ces-2020/, dated Jan. 7, 2020). Some manufacturers propose that the goal should be 10 k nits or higher (see https://hdguru.com/calibration-expert-is-10000-nits-of-brightness-enough/, dated Jul. 26, 2018). A recent press release of Jun. 20, 2020 (https://www.businesswire.com/news/home/20200630005205/en/Kopin-Announces-Breakthrough-ColorMax%E2%84%A2-Technology-Unparalleled-Color) describes a tandem (2-stack) OLED display which emits >1000 nits. It also announces that “Further improvements in the brightness (>2000 nits) and color fidelity are expected through optimization of OLED deposition conditions. By incorporating a structure to enhance the output coupling efficiency, the brightness of the OLED microdisplay could be increased to >5000 nits within a couple of years.”.
One solution for increasing the total amount of light emitted from OLED devices is to stack multiple OLED units on top of each other, so total light emitted from the stack is the sum of the light emitted by each individual stack. However, while the total light emitted from such OLED stacks is additive based on the total number of individual OLED light-emitting units, the voltage required to drive the OLED stack is additive based on the voltages to drive each independent OLED unit. For example, if a light-emitting OLED unit requires 3 V to produce 250 nits at a given current, then a stack of two such units will require 6V to deliver 500 nits at the same current, a stack of 3 units will require 9V to deliver 750 nits and so forth.
Such OLED stacks are well known; for example, U.S. Pat. Nos. 7,273,663, 9,379,346, 9,741,957; 9,281,487 and US2020/0013978 all describe OLED stacks with multiple stacks of light-emitting OLED units, each separated by intermediate connection layers or charge generation layers. Springer et al, Optics Express, 24 (24), 28131 (2016) reports OLED stacks with 2- and 3-light-emitting units, where each unit has a different color. OLED stacks of up to six light-emitting units have been reported (Spindler et al, “High Brightness OLED Lighting”, SID Display Week 2016, San Francisco CA, May 23-27, 2016). In addition, silicon backplanes with low-voltage 5V drive transistors are available that use tandem (two light-emitting OLED units separated by one CGL) OLED stacks for light emission. See, for example, Cho et al, Journal of Information Display, 20(4), 249-255, 2019; https://www.ravepubs.com/oled-silicon-come-new-joint-venture/, published 2018; and Xiao, “Recent Developments in Tandem White Organic Light-Emitting Diodes”, Molecules, 24, 151 (2019).
However, this approach, which will require higher driving voltages, is difficult to apply in microdisplay applications. A problem is that the microdisplay also needs to have high resolution, requiring that the size of the individual pixels must be as small as possible and that the active (light-emitting) area of the microdisplay contain as many pixels as possible. This requires that the transistors in the control circuitry of the backplane be small, but yet of sufficient size to handle the required voltages and currents without permanent damage or current leakage. Moreover, using circuits with smaller, low-voltage transistors allows for a higher density of pixels within a given size device. However, while having a high density of individual controlled pixels is desirable for high resolution devices, it increases the problem of crosstalk where powering one pixel can cause light emission from neighboring pixels as well.
Another difficulty with the use of microcavity OLEDs with multiple stacks, which have increased emission, also require higher voltages to operate. The high voltages only promote the generation of carrier migration within a pixel and so, there can be increased migration to neighboring pixels resulting increased crosstalk via unintended emission.
Suitable multimodal microcavity OLED formulations have been described in provisional U.S. Applications 62/966,757 and 63/054,387 as well as non-provisional U.S. application Ser. No. 16/695,191. Any of the formulations, descriptions or embodiments described in these references may be applied to this invention. A suitable multimodal microcavity OLED microdisplay 400 is illustrated in
In microdisplay 400, there is a silicon backplane 103 which comprises an array of control circuits such as shown in
It is also important for the control circuitry in OLED microdisplays, which are sample-and-hold type displays, to address the problem of motion blur (see https://www.blurbusters.com/faq/oled-motion-blur/; “Why Do Some OLEDs Have Motion Blur?”, dated Dec. 28, 2018 and https://www.soundandvision.com/content/motion-resolution-issue-oled-tvs, “Is Motion Resolution an Issue with OLED TVs”, dated Jan. 15, 2015).
The only way to reduce motion blur caused by sample-and-hold, is to shorten the amount of time a frame is displayed. This can be accomplished by using extra refreshes (higher Hz) or via black periods between refreshes (flicker). For OLED microdisplays, the best solution is to “shutter” the display image, either by turning off the entire active area at the same time or by a “rolling” technique, where only part of the displayed image is turned off at one time in a sequential manner. The “rolling” technique is preferred. The time that the pixels are turned off is very short and well below the threshold of detectability by the human eye in order to avoid perceivable flicker. This is accomplished in the control circuitry by the inclusion of a shuttering transistor, which when activated through a select line, prevents current from flowing through the OLED and turns the emission by the OLED pixel “OFF” for the desired period of time. In other words, the shuttering transistor is a switch transistor, in that it only turns the pixel “ON” or “OFF” and does not regulate the voltage or current. However, this solution, where the pixels are turned off for part of the time that an image is displayed (generally referred to as the frame time), only increases the need for increased luminance by the OLED whenever it is “ON” since it is the average luminance over the frame that is perceived by the eye. The shuttering to reduce motion blur can be applied to any method of supplying power to the OLED stack; for example, current control or PWM.
For this reason, microdisplays typically have at least two transistors in series between a power source and the light-emitting engine. The first (driving) transistor, delivers the desired power (voltage and/or current) to the light-emitting engine, and is controlled by a scan line which turns that transistor “on” or “off”. The second (switching) transistor controls the duration that the light-emitting engine is “off” to control the motion blur problem. Desirably, both transistors are low voltage (5V or less). Preferably, both transistors are p-channel transistors. Circuits with two or more transistors in the path between the power source and light-emitting element are sometimes referred to has having ‘stacked’ transistors.
Suitable backplanes for OLED microdisplays are well known. See, for example, Ali et al, “Recent advances in small molecule OLED-on-Silicon microdisplays”, Proc. of SPIE Vol. 7415 74150Q-1, 2006; Ying, W., “Silicon Backplane Design for OLED-on-Silicon Microdisplay”, MsE Thesis, Nanying Technological University, 2011; Jang et al, J. Information Display, 20(1), 1-8 (2019); Fujii et al, “4032ppi High-Resolution OLED Microdisplay”, SID 2018 DIGEST, p. 613; US2019/0259337; Prache, Displays, 22(2), 49 (2001); and Vogel et al, 2018 48th European Solid-State Device Research Conference, p. 90, September 2018.
Some suitable pixel circuit designs for OLED microdisplays can be found in Zeng et al, “A Novel Pixel Circuit with Threshold Voltage Variation Compensation in Three-Dimensional AMOLED on Silicon Microdisplays”, P-27, SID 2019 Digest, p. 1313; U.S. Pat. No. 9,066,379; Kimura et al, “New Pixel Driving Circuit Using Self-Discharging Compensation Method for High-Resolution OLED Microdisplays on a Silicon Backplane”, 28-3, SID 2017 Digest, p. 399; Dawson et al, “The Impact of the Transient Response of Organic Light Emitting Diodes on the Design of Active Matrix OLED Displays”, International Electronic Devices Mtg 1998, 875-878; Kwak et al, “Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays”, Japanese Journal of Applied Physics, 50, 03CC05 (2011); Vogel et al, SID 2017 DIGEST, Article 77-1, pp 1125-1128; Liu et al., J. Cent. South Univ., 19, 1276-1282 (2012); Hong et al., SID 2019 DIGEST, Article 9-4, 105 (2019); and Fan et al., International Journal of Photoenergy, Article ID 543273 (2011). In general, all of these references describe pixel circuits that use a driving transistor and a switch transistor in series to deliver power to the anode of the OLED. They also describe the use of p-channel transistors and in some cases, the use of protection circuits to prevent overvoltage. None of these references deal with the problem of crosstalk.
The embodiment shown in
In pixel circuit 450, it is desirable that T1 and T6 are both low voltage (nominally 5V or less) p-channel transistors. It is also desirable that T1 and T6 are located in floating n-wells, where the well voltage is controlled. For example, U.S. Pat. No. 5,764,077 describes a low voltage output buffer using a floating n-well for the low voltage transistors to protect the circuit from overvoltage conditions. Also, the use of floating n-wells is described in U.S. Pat. Nos. 9,066,379 and 7,768,299. In some cases, any of the transistors in the entire pixel circuit can be in located in their own separate n-wells. For example, see Shimazaki et al, “A Shared-Well Dual-Supply-Voltage 64-bit ALU”, IEEE J. of Solid-State Circuits, 39(3), 494 (2004).
It is also desirable to include additional circuitry (not shown) to pixel circuit 450 that protects both the drive and switch transistors against damages from transient excessive voltages. For example, see Kwak et al, U.S. Pat. No. 9,066,379, and Vogel et al, Proc. SPIE 10335, Digital Optical Technologies, 1022502 (2017). Such additional overvoltage protection methods may be incorporated into the PCC.
It is well known to add various types of compensation circuits (with associated gate lines, reference voltage and supply voltages, etc.) to correct for pixel-to-pixel variations in Vth, leakage current, aging effects and other problems leading to non-uniformity. Such additional compensation methods may be incorporated as part of the PCC.
The inventive circuit described above can also be in any transistor-controlled device that operates a load where it is necessary to reduce the voltage or current delivered to the load as a function of either the amount of power delivered to the controlling transistor and/or whether the controlling transistor is switched “ON” or “OFF” by a separate control line.
While crosstalk can be a particular concern with microdisplays, it can also be a serious problem with larger sized display devices such as mobile phones and televisions since they also require high resolution. The pixel circuit described above is suitable for use for reducing crosstalk in any size display device.
Active-matrix displays can be driven with constant luminance over a full frame cycle (often referred to analog programming). A pixel is typically programmed once each single frame period and the data is held constant by a storage capacitor until the next frame cycle when the pixel data is refreshed. In most active-matrix devices, during a frame, each pixel along a column will receive a data signal. Each row in sequence will receive a scan signal that allows the data signal to pass to the pixel driving circuit in each pixel along that row. The data signal can be stored in a capacitor which is part of the pixel circuit (see
Active-matrix displays can also be digitally driven. This method involves of expressing the total luminance provided by a pixel by dividing a single image frame into a plurality of subframes and setting the emission periods for the respective sub-frames to be different. In this driving method, the scan signal is supplied by the scan lines and so, according to the scan signal, the pixels along each row receive the data signal from the data lines. Since the total emission of the pixel in this driving method is according to the time and not the level of the data signal, only two levels of data signal are required. A first data signal allows the pixels to emit light fully, and the second data signal causes the pixels not to emit light.
It should be noted that the pixel circuit can be the same for both the analog and digital methods, as well as any methods of driving based on current, of driving the light-emitting element and all can be used to drive the pixel circuit shown in
The display with the inventive pixel circuit can be full color, bichromatic or monochromatic.
It is well known to those skilled in the art to adjust signal types and levels to be appropriate for the types of circuitries used. In particular, transistors such as n-channel and p-channel transistors fundamentally behave differently and need different signals to work as intended. Examples in this description may describe particular signals in reference to particular transistors, but these should not be considered as limiting. Examples have been described in terms of the performance desired to achieve the desired benefits; modifications that result in the same benefit are well within the skill of the art.
In the above description, reference is made to the accompanying drawings that form a part hereof, and in which are shown by way of illustration specific embodiments which may be practiced. These embodiments are described in detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that structural, logical and electrical changes may be made without departing from the scope of the present invention. The description of any example embodiments is, therefore, not to be taken in a limiting sense. Although the present invention has been described for the purpose of illustration, it is understood that such detail is solely for that purpose and variations can be made by those skilled in the art without departing from the spirit and scope of the invention.
This application claims the benefit of U.S. Provisional Application No. 63/067,516, filed Aug. 19, 2020.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/US2021/043137 | 7/26/2021 | WO |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2022/039889 | 2/24/2022 | WO | A |
| Number | Name | Date | Kind |
|---|---|---|---|
| 4589733 | Yaniv | May 1986 | A |
| 6133692 | Xu et al. | Oct 2000 | A |
| 8035580 | Chung et al. | Oct 2011 | B2 |
| 9123294 | Han et al. | Sep 2015 | B2 |
| 9324264 | Jeong et al. | Apr 2016 | B2 |
| 10665161 | Ota | May 2020 | B2 |
| 11031577 | Hamer et al. | Jun 2021 | B1 |
| 20030112205 | Yamada | Jun 2003 | A1 |
| 20050225232 | Boroson | Oct 2005 | A1 |
| 20050259093 | Osame et al. | Nov 2005 | A1 |
| 20100091001 | Kim | Apr 2010 | A1 |
| 20100253666 | Yamamoto | Oct 2010 | A1 |
| 20110175882 | Stryakhilev | Jul 2011 | A1 |
| 20130249883 | Hwang | Sep 2013 | A1 |
| 20140176520 | Hwang et al. | Jun 2014 | A1 |
| 20160240142 | Jeong | Aug 2016 | A1 |
| 20180180951 | Toyotaka | Jun 2018 | A1 |
| 20190096336 | Lee | Mar 2019 | A1 |
| 20200066815 | Choi et al. | Feb 2020 | A1 |
| Number | Date | Country |
|---|---|---|
| 107134257 | Sep 2019 | CN |
| Entry |
|---|
| English translation, Taiwan office action, with additions (last page, in red) by applicant to show US equivalents. |
| Lin et al, “UHD AMOLED Driving Scheme of Compensation Pixel and Gate Driver Circuits Achieving High-Speed Operation”, J. Elec. Devices Soc., 6, 26 (2017). |
| Kimura et al, “New pixel driving circuit using self-discharging compensation method for high resolution OLED micro displays on a silicon backplane”, J. Soc. Info. Display, 25(3), 167 (2017). |
| Kwak et al, “Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays”, Japanese Journal of Applied Physics, 50, 03CC05 (2011). |
| Vogel et al, “OLED microdisplays in near-to-eye applications: challenges and solutions”, Proc. SPIE 10335, Digital Optical Technologies, 1022502 (2017). |
| Number | Date | Country | |
|---|---|---|---|
| 20230282163 A1 | Sep 2023 | US |
| Number | Date | Country | |
|---|---|---|---|
| 63067516 | Aug 2020 | US |
