The present disclosure generally relates to circuits for use in displays, and methods of driving, calibrating, and programming displays, particularly displays such as active matrix organic light emitting diode displays.
Displays can be created from an array of light emitting devices each controlled by individual circuits (i.e., pixel circuits) having transistors for selectively controlling the circuits to be programmed with display information and to emit light according to the display information. Thin film transistors (“TFTs”) fabricated on a substrate can be incorporated into such displays. TFTs tend to demonstrate non-uniform behavior across display panels and over time as the displays age. Compensation techniques can be applied to such displays to achieve image uniformity across the displays and to account for degradation in the displays as the displays age.
Some schemes for providing compensation to displays to account for variations across the display panel and over time utilize monitoring systems to measure time dependent parameters associated with the aging (i.e., degradation) of the pixel circuits. The measured information can then be used to inform subsequent programming of the pixel circuits so as to ensure that any measured degradation is accounted for by adjustments made to the programming. Such monitored pixel circuits may require the use of additional transistors and/or lines to selectively couple the pixel circuits to the monitoring systems and provide for reading out information. The incorporation of additional transistors and/or lines may undesirably decrease pixel-pitch (i.e., “pixel density”).
In accordance with one aspect, there is provided a method of determining characteristics of at least one circuit element of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising: controlling a biasing of a selected pixel of the at least one selected pixel including a biasing over a monitor line coupled to the selected pixel; controlling a biasing of a first drive transistor; of a first pixel such that a first optoelectronic device of said first pixel is biased so that the first optoelectronic device is turned off, the first pixel sharing the monitor line with the selected pixel; and measuring at least one characteristic of the at least one circuit element of said selected pixel with use of said monitor line.
In some embodiments, one of a source and a drain terminal of the first drive transistor is coupled to the first optoelectronic device and the other of the source and drain terminal of the first drive transistor is coupled to a first supply voltage, and wherein the monitor line is coupled via a first source switch to a first node of the first pixel, the first node between the optoelectronic device and the one of a source and a drain terminal of the first drive transistor, and controlling a biasing of the first drive transistor of the first pixel comprises adjusting at least a voltage of the first supply voltage and a gate terminal of the first drive transistor to ensure the first optoelectronic device is off.
In accordance with another aspect, there is provided a method of determining the characteristics of circuit elements of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising: controlling a biasing of a selected pixel of the at least one selected pixel, said biasing including a biasing over a monitor line coupled to the selected pixel; controlling a biasing of a first pixel coupled to the monitor line via source and drain terminals of a first source switch such that the first source switch is biased with at least one of a zero voltage and a fixed known voltage across the source and the drain terminal of the first source switch resulting in a corresponding one of a zero current and a fixed known current passing through the first source switch, the monitor line shared with the selected pixel; and measuring at least one characteristic of at least one circuit element of said selected pixel with use of said monitor line.
In some embodiments, measuring at least one characteristic of at least one circuit element of said selected pixel comprises measuring the current of the selected optoelectronic device by measuring a current over the monitor line. In some embodiments, measuring at least one characteristic of at least one circuit element of said selected pixel further comprises subtracting a value of the fixed known current from the current measured over the monitor line.
In some embodiments, one of a source and a drain terminal of the first drive transistor is coupled to the first optoelectronic device and the other of the source and drain terminal of the first drive transistor is coupled to a first supply voltage, and wherein one of the source and the drain terminal of the first source switch is coupled to a first node of the first pixel between the optoelectronic device and the one of a source and a drain terminal of the first drive transistor, and the other of the source and the drain terminal of the first source switch is coupled to the monitor line, wherein controlling a biasing of the first pixel comprises biasing a gate of the first drive transistor to turn the first drive transistor on and adjusting a biasing over the monitor line to one of a voltage equal the voltage of the supply voltage and a voltage different from the voltage of the supply voltage by the fixed known voltage, and wherein biasing of the selected pixel comprises biasing a gate of the selected drive transistor to turn the selected drive transistor off.
In accordance with a further aspect there is provided a method of determining characteristics of at least one circuit element of at least one selected pixel sharing a monitor line, said selected pixels in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising: controlling a biasing of a first number of selected pixels of the at least one selected pixel, each selected pixel including a second number of circuit elements of the at least one circuit element, the biasing including a biasing over a monitor line coupled to the first number of selected pixels, the controlling the biasing of the first number of selected pixels having a total number of degrees of freedom of biasing greater than or equal to the product of the first number multiplied by the second number; and measuring with use of said monitor line at least one characteristic of the second number of circuit elements of the first number of selected pixels, while controlling a biasing of a first number of selected pixels, taking at least a number of measurements equal to the product of the first number multiplied by the second number.
In accordance with another further aspect there is provided a method of determining the characteristics of circuit elements of at least one selected pixel in an array of pixels in a display in which each pixel includes a drive transistor for supplying current to an optoelectronic device of the pixel, the method comprising: controlling a biasing of a selected pixel of the at least one selected pixel, said biasing including adjusting a biasing of a gate of a selected drive transistor of the selected pixel until a specific current passes through a selected source switch coupling the selected pixel to a monitor line; controlling a biasing of a first pixel coupled to the monitor line via source and drain terminals of a first source switch such that the first source switch is biased with at least one of a zero voltage and a fixed known voltage across the source and the drain terminal of the first source switch resulting in a corresponding one of a zero current and a fixed known current passing through the first source switch, the monitor line shared with the selected pixel; and measuring at least one characteristic of at least one circuit element of said selected pixel with use of said monitor line.
In some embodiments, the controlling of the biasing of the selected pixel comprises adjusting a voltage applied to the gate of the selected drive transistor until a predetermined current through the selected source switch of the selected pixel is measured over the monitor line, the method further comprising determining a change in characteristics of a selected optoelectronic device of the at least one selected pixel with use of a value of the voltage applied to the gate of the selected drive transistor.
The foregoing and additional aspects and embodiments of the present invention will be apparent to those of ordinary skill in the art in view of the detailed description of various embodiments and/or aspects, which is made with reference to the drawings, a brief description of which is provided next.
The foregoing and other advantages of the invention will become apparent upon reading the following detailed description and upon reference to the drawings.
While the invention is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and will be described in detail herein. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
For illustrative purposes, the display system 50 in
The pixel 10 is operated by a driving circuit (“pixel circuit”) that generally includes a driving transistor and a light emitting device. Hereinafter the pixel 10 may refer to the pixel circuit. The light emitting device can optionally be an organic light emitting diode, but implementations of the present disclosure apply to pixel circuits having other electroluminescence devices, including current-driven light emitting devices. The driving transistor in the pixel 10 can optionally be an n-type or p-type amorphous silicon thin-film transistor, but implementations of the present disclosure are not limited to pixel circuits having a particular polarity of transistor or only to pixel circuits having thin-film transistors. The pixel circuit 10 can also include a storage capacitor for storing programming information and allowing the pixel circuit 10 to drive the light emitting device after being addressed. Thus, the display panel 20 can be an active matrix display array.
As illustrated in
With reference to the top-left pixel 10 shown in the display panel 20, the select line 24i is provided by the address driver 8, and can be utilized to enable, for example, a programming operation of the pixel 10 by activating a switch or transistor to allow the data line 22j to program the pixel 10. The data line 22j conveys programming information from the data driver 4 to the pixel 10. For example, the data line 22j can be utilized to apply a programming voltage or a programming current to the pixel 10 in order to program the pixel 10 to emit a desired amount of luminance. The programming voltage (or programming current) supplied by the data driver 4 via the data line 22j is a voltage (or current) appropriate to cause the pixel 10 to emit light with a desired amount of luminance according to the digital data received by the controller 2. The programming voltage (or programming current) can be applied to the pixel 10 during a programming operation of the pixel 10 so as to charge a storage device within the pixel 10, such as a storage capacitor, thereby enabling the pixel 10 to emit light with the desired amount of luminance during an emission operation following the programming operation. For example, the storage device in the pixel 10 can be charged during a programming operation to apply a voltage to one or more of a gate or a source terminal of the driving transistor during the emission operation, thereby causing the driving transistor to convey the driving current through the light emitting device according to the voltage stored on the storage device.
Generally, in the pixel 10, the driving current that is conveyed through the light emitting device by the driving transistor during the emission operation of the pixel 10 is a current that is supplied by the first supply line 26i and is drained to a second supply line 27i. The first supply line 26i and the second supply line 27i are coupled to the voltage supply 14. The first supply line 26i can provide a positive supply voltage (e.g., the voltage commonly referred to in circuit design as “Vdd”) and the second supply line 27i can provide a negative supply voltage (e.g., the voltage commonly referred to in circuit design as “Vss”). Implementations of the present disclosure can be realized where one or the other of the supply lines (e.g., the supply line 27i) is fixed at a ground voltage or at another reference voltage.
The display system 50 also includes a monitoring system 12. With reference again to the top left pixel 10 in the display panel 20, the monitor line 28j connects the pixel 10 to the monitoring system 12. The monitoring system 12 can be integrated with the data driver 4, or can be a separate stand-alone system. In particular, the monitoring system 12 can optionally be implemented by monitoring the current and/or voltage of the data line 22j during a monitoring operation of the pixel 10, and the monitor line 28j can be entirely omitted. Additionally, the display system 50 can be implemented without the monitoring system 12 or the monitor line 28j. The monitor line 28j allows the monitoring system 12 to measure a current or voltage associated with the pixel 10 and thereby extract information indicative of a degradation of the pixel 10. For example, the monitoring system 12 can extract, via the monitor line 28j, a current flowing through the driving transistor within the pixel 10 and thereby determine, based on the measured current and based on the voltages applied to the driving transistor during the measurement, a threshold voltage of the driving transistor or a shift thereof.
The monitoring system 12 can also extract an operating voltage of the light emitting device (e.g., a voltage drop across the light emitting device while the light emitting device is operating to emit light). The monitoring system 12 can then communicate signals 32 to the controller 2 and/or the memory 6 to allow the display system 50 to store the extracted degradation information in the memory 6. During subsequent programming and/or emission operations of the pixel 10, the degradation information is retrieved from the memory 6 by the controller 2 via memory signals 36, and the controller 2 then compensates for the extracted degradation information in subsequent programming and/or emission operations of the pixel 10. For example, once the degradation information is extracted, the programming information conveyed to the pixel 10 via the data line 22j can be appropriately adjusted during a subsequent programming operation of the pixel 10 such that the pixel 10 emits light with a desired amount of luminance that is independent of the degradation of the pixel 10. In an example, an increase in the threshold voltage of the driving transistor within the pixel 10 can be compensated for by appropriately increasing the programming voltage applied to the pixel 10.
The driving circuit for the pixel 110 also includes a storage capacitor 116 and a switching transistor 118. The pixel 110 is coupled to a select line SEL, a voltage supply line Vdd, a data line Vdata, and a monitor line MON. The driving transistor 112 draws a current from the voltage supply line Vdd according to a gate-source voltage (Vgs) across the gate and source terminals of the drive transistor 112. For example, in a saturation mode of the drive transistor 112, the current passing through the drive transistor 112 can be given by Ids=β (Vgs−Vt)2, where β is a parameter that depends on device characteristics of the drive transistor 112, Ids is the current from the drain terminal to the source terminal of the drive transistor 112, and Vt is the threshold voltage of the drive transistor 112.
In the pixel 110, the storage capacitor 116 is coupled across the gate and source terminals of the drive transistor 112. The storage capacitor 116 has a first terminal, which is referred to for convenience as a gate-side terminal, and a second terminal, which is referred to for convenience as a source-side terminal. The gate-side terminal of the storage capacitor 116 is electrically coupled to the gate terminal of the drive transistor 112. The source-side terminal 116s of the storage capacitor 116 is electrically coupled to the source terminal of the drive transistor 112. Thus, the gate-source voltage Vgs of the drive transistor 112 is also the voltage charged on the storage capacitor 116. As will be explained further below, the storage capacitor 116 can thereby maintain a driving voltage across the drive transistor 112 during an emission phase of the pixel 110.
The drain terminal of the drive transistor 112 is connected to the voltage supply line Vdd, and the source terminal of the drive transistor 112 is connected to (1) the anode terminal of the OLED 114 and (2) a monitor line MON via a read transistor 119. A cathode terminal of the OLED 114 can be connected to ground or can optionally be connected to a second voltage supply line, such as the supply line Vss shown in
The switching transistor 118 is operated according to the select line SEL (e.g., when the voltage on the select line SEL is at a high level, the switching transistor 118 is turned on, and when the voltage SEL is at a low level, the switching transistor is turned off). When turned on, the switching transistor 118 electrically couples node A (the gate terminal of the driving transistor 112 and the gate-side terminal of the storage capacitor 116) to the data line Vdata.
The read transistor 119 is operated according to the read line RD (e.g., when the voltage on the read line RD is at a high level, the read transistor 119 is turned on, and when the voltage RD is at a low level, the read transistor 119 is turned off). When turned on, the read transistor 119 electrically couples node B (the source terminal of the driving transistor 112, the source-side terminal of the storage capacitor 116, and the anode of the OLED 114) to the monitor line MON.
During the second cycle 154, the SEL line is low to turn off the switching transistor 118, and the drive transistor 112 is turned on by the charge on the capacitor 116 at node A. The voltage on the read line RD goes high to turn on the read transistor 119 and thereby permit a first sample of the drive transistor current to be taken via the monitor line MON, while the OLED 114 is off. The voltage on the monitor line MON is Vref, which may be at the same level as the voltage Vb in the previous cycle.
During the third cycle 158, the voltage on the select line SEL is high to turn on the switching transistor 118, and the voltage on the read line RD is low to turn off the read transistor 119. Thus, the gate of the drive transistor 112 is charged to the voltage Vd2 of the data line Vdata, and the source of the drive transistor 112 is set to VOLED by the OLED 114. Consequently, the gate-source voltage Vgs of the drive transistor 112 is a function of VOLED (Vgs=Vd2−VOLED).
During the fourth cycle 162, the voltage on the select line SEL is low to turn off the switching transistor, and the drive transistor 112 is turned on by the charge on the capacitor 116 at node A. The voltage on the read line RD is high to turn on the read transistor 119, and a second sample of the current of the drive transistor 112 is taken via the monitor line MON.
If the first and second samples of the drive current are not the same, the voltage Vd2 on the Vdata line is adjusted, the programming voltage Vd2 is changed, and the sampling and adjustment operations are repeated until the second sample of the drive current is the same as the first sample. When the two samples of the drive current are the same, the two gate-source voltages should also be the same, which means that:
After some operation time (t), the change in VOLED between time 0 and time t is ΔVOLED=VOLED(t)−VOLED(0)=Vd2(t)−Vd2(0). Thus, the difference between the two programming voltages Vd2(t) and Vd2(0) can be used to extract the OLED voltage.
During the first cycle 200 of the exemplary timing diagram in
Sharing a measurement (monitor) line with a plurality of columns can reduce the overhead area. However, sharing a monitor line affects the OLED measurements. In most cases, an OLED from one of the adjacent columns using a shared monitor line will interfere with measurement of a selected OLED in the other one of the adjacent columns.
In one aspect of the invention, the OLED characteristics are measured indirectly by measuring the effect of an OLED voltage or current on another pixel element.
In another aspect of the invention, the OLEDs of adjacent pixels with a shared monitor line are forced in a known stage. The selected OLED characteristic is measured in different stages, and the selected OLED characteristic is extracted from the measurement data.
In yet another aspect of the invention, the drive transistor is used to force the OLED samples to a known status. Here, the drive transistor is programmed to a full ON status. In addition, the power supply line can be modified to make the OLED status independent of the drive TFT characteristics. For example, in the case of a pixel circuit with an n-type transistor and the OLED at the source of the drive transistor, the drain voltage of the drive transistor (e.g., the power supply) can be forced to be lower than (or close to) the full ON voltage of the drive TFT. In this case, the drive transistor will act as a switch forcing the OLED voltage to be similar to the drain voltage of the drive TFT.
In a further aspect of the invention, the status of the selected OLED is controlled by the measurement line. Therefore, the measurement line can direct the characteristics of a selected OLED to the measurement circuit with no significant effect from the other OLED connected to the measurement line.
In a still further aspect of the invention, the status of all the OLED samples connected to the shared monitor lines is forced to a known state. The characteristic is measured, and then the selected OLED is set free to be controlled by the measurement line. Then the characteristic of a selected OLED sample is measured. The difference between the two measurements is used to cancel any possible contamination form the unwanted OLED samples.
In yet another aspect of the invention, the voltage of the unwanted OLED samples is forced to be similar to the voltage of the measurement line. Therefore, no current can flow from the OLED lines to the measurement line.
During a first phase, the voltage Vdd is set to the voltage of the monitor line, and the drive transistors 600a, 600b are programmed to be in a full ON stage. While the read transistors 604a, 604b are ON, the current through these transistors and the monitor line 602 is measured. This current includes all the leakages to the monitor line and other non-idealities. If the leakage current (and non-idealities) is negligible, this phase can be omitted. Also, the drive voltages Vdd need not be changed if the drive transistors are very strong.
During a second phase, the drive transistor of the selected OLED is set to an OFF stage. Thus, the corresponding optoelectronic device is controlled by the monitor line 602. The current of the monitor line 602 is measured again.
The measurements can highlight the changes in the current of the first optoelectronic device for a fixed voltage on the monitor line. The measurement can be repeated for different OLED voltages to fully characterize the OLED devices.
While the device goes in standby, the display can show some basic information. For example, in some wearable devices (e.g., smart watches or exercise bands) the display shows some content all the time. The main challenge in this case is the power consumption associated with the display. This power includes both static power stemming from the backlight or the emissive device in the pixel and dynamic power associated with refreshing the display.
To reduce the static power, the brightness of the display can be reduced, or only a section of the display can be ON and the rest be OFF (or at lower brightness). This also can help the dynamic power consumption since only a small section of the display needs to be programmed.
One case of power adjustment uses a multiplexer to connect different voltage levels to different segments. In another case, the power supply can be adjusted at the pixel level. In this case, the power supply can be adjusted at vertical or horizontal segments or the combination of the two cases. In one example, the VDD and VSS can be adjusted in the same direction (horizontal, vertical or other directions such as diagonal). In another example, VDD and VSS can be adjusted in different directions (e.g., one horizontal and the other vertical, or in other directions such as diagonal).
To eliminate the extra power consumption associated with transferring data between the main system and the display during the standby mode, some basic functionality can be added to the display driver to produce recursive changes in the content. For example, the driver can have multiple frame buffers, which are pre-populated by the main system in advance (e.g., before going to the standby mode, or during boot-up or power-up) and depending on different conditions, one of the frame buffers may be used to program the display. For example, a timer can be used to flip between the frame buffers (see
Alternatively, the driver can perform some basic calculation such as moving an object by a trajectory. In this case, for different conditions, some part of the image in the full frame buffers is moved based on a trajectory, or the object stored in the partial frame buffer is moved and the main frame buffer is modified by the new calculated object.
Referring to
The first pixel 1402a includes a first drive transistor 1400a having one of a source and a drain terminal coupled to supply voltage VDD, and the other of its source and drain terminals coupled to a first optoelectronic device 1401a which in turn is coupled to ground or alternatively VSS. The second pixel 1402b includes a second drive transistor 1400b having one of its source and drain terminals coupled to supply voltage VDD, and the other of its source and drain terminals coupled to a second optoelectronic device 1401b which in turn is coupled to ground or alternatively VSS. A first node B1 (1) between the first drive transistor 1400a and the first optoelectronic device 1401a is coupled across a first source switch 1404a to the monitor line while a second node B1 (2) between the second drive transistor 1400b and the second optoelectronic device 1401b is coupled across a second source switch 1404b to the monitor line. The first and second optoelectronic devices 1401a, 1401b may be OLEDs and are driven by the drive transistors 1400a, 1400b. For clarity of the principles of operation of the embodiment, not shown in
In one aspect, a drive transistor 1400a, 1400b is used to push the associated optoelectronic device 1401a, 1401b in an off state. In other words, the biasing conditions of pixels that are not being measured are changed so as to force the optoelectronic device 1401a, 1401b of that pixel 1402a, 1402b to be off. For example, when measuring the first pixel 1402a including optoelectronic device 1401a, in the second pixel 1402b, biasing conditions such as control of the state of the drive transistor 1400b, are such that optoelectronic device 1401b turns off. The biasing conditions which control the second drive transistor 1400b include VDD and the voltage applied to the gate of the second drive transistor 1400b. As a result, only the intended device i.e., that being measured (in this example optoelectronic device 1401a) is controlled by the monitor line biasing condition and so the voltage or current or the charge created by the intended device can be measured.
In another aspect, the drive transistor 1400a, 1400b forces the current through the associated source switches 1404a, 1404b to be zero or a fixed known current. In this case, the drive transistor 1400a, 1400b makes the voltage across the source switches 1404a, 1404b connected to the devices not intended for measurement to be zero or of a fixed value known to give rise to the fixed known current. A detailed example implementation of this embodiment is described further below.
In another aspect, the intended pixel for measurement of its optoelectronic device 1404a, 1404b is biased at a few different biasing points. This can be done through programming the pixel with different bias levels and/or the monitor line bias level can be modified. From different bias levels and measurement values, the characteristics of the optoelectronic device can be extracted. This can, for example, be performed for both the first pixel 1402a and the second pixel 1402b simultaneously, involving the variation of various biasing inputs and taking sufficient measurements to solve for the unknowns of the devices being characterized, including up to all of both the drive transistors 1400a, 1400b, and both the optoelectronic devices 1401a, 1401b. In one example embodiment, four biasing conditions, VDD, the gate voltage applied to the first drive transistor 1400a, the gate voltage applied to the second drive transistor 1400b, the signal applied to the gates of the source switches 1404a. 1404b, and a biasing level provided over the monitor line are the five possible inputs and the current of each of the four devices, i.e. of the first and second drive transistors 1400a, 1400b, and of the first and second optoelectronic devices 1401a, 1401b are the four unknowns which are solved.
The measurements in the aforementioned cases can be carried out with direct measurements of the voltage or current, in a comparator based manner, or by adjusting one or more bias conditions to progressively determine bias conditions in one or more devices in the pixels.
One example measurement method which forces the current through the a source switches 1404a, 1404b of a pixel not being measured to be zero or a fixed known current, will now be described as used to measure the first optoelectronic device 1401a, of a selected pixel of interest. In this method, the associated first drive transistor 1400a is turned off and other drive transistors (such as the second drive transistor 1400b) of pixels which share the monitor line but which are not being measured (such as the second pixel 1402b), are turned fully on and act as switches. As a result, the voltage at node B1 (2) in the non-measured pixels is set to equal that of VDD. By arranging for the voltage VDD to be the same as the voltage at the monitor line, the current through the second source switch 1404b will be very small. In cases where VDD at node B1 (2) and the voltage at the monitor line are not the same, the current that is capable of passing through the second source switch 1404b with the voltage difference can be measured first and then that measured fixed known current can be subtracted from the measurements of the pixel of interest. During measurement of the current in response to the voltage difference across the second source switch 1404b, the same voltage difference is applied across the second source switch 1404b in order to produce the small current which later is subtracted from the measurements, but the voltages (VDD and that on the monitor line) are chosen so that optoelectronic devices 1404a, 1404b are off. The gate voltages of the driving transistors 1400a, 1400b, as well as VDD can be manipulated to isolate the small current. For example, with both drive transistors 1400a, 1400b fully on and the optoelectronic devices 1401a, 1401b off by virtue of VDD (and hence the voltage at B1(1) and B1(2)) being low enough, the voltage of the monitor line can be set at the same level as VDD. The first drive transistor 1400a can then be set fully off, and VDD varied to the desired voltage difference from the monitor line (which does not affect B1 (1) because the first drive transistor 1400a is off) to produce a delta current through the second source switch 1404b while the optoelectronic devices 1401a, 1401b remain off. This is the fixed known current through the second source switch 1404b in response to the voltage difference.
In this way, once the various small currents through the second source switch 1404b have been isolated and measured for known voltage differences between B1(2) and the monitor line, the first optoelectronic device 1401a, of interest is turned on with high enough voltages (monitor line) while, as described above, the first drive transistor 1400a is turned off and the second drive transistor 1400b is turned on. The current passing through the first source switch is related to that of the first optoelectronic device 1401a and can be isolated by subtracting the fixed known current (due to the known voltage difference between the node B1 (2) and the monitor line) through the second source switch 1404b from the measurement.
As described in association with other embodiments above, indirect measurement can be made by adjusting the bias on the gate of the drive transistor 1400a, 1400b of the pixel of interest 1402a, 1402b, until the current through the associated source switch 1404a, 1404b is fixed (it can be zero or a non-zero value). In this case, the current passing through the drive transistor 1400a, 1400b of the pixel of interest in response to biasing would have had to have been measured first, i.e., characterized independently while the associated optoelectronic device 1401a, 1401b was off. Knowing the change in the current of the drive transistor 1400a, 1400b (from the change in the voltage applied) which results in the zero or some fixed known current through the associated source switch 1404a, 1404b gives an indirect change of current through the associated optoelectronic device 1401a, 1401b.
It should be understood that
While particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and compositions disclosed herein and that various modifications, changes, and variations can be apparent from the foregoing descriptions without departing from the spirit and scope of the invention as defined in the appended claims.
This application is a continuation of U.S. patent application Ser. No. 15/635,653, filed Jun. 28, 2017, now allowed, which is a continuation of U.S. patent application Ser. No. 15/184,233, filed Jun. 16, 2016, now U.S. Pat. No. 9,721,505, which claims priority to Canadian Application No. 2,894,717, filed Jun. 19, 2015, and is a continuation-in-part of and claims the benefit of U.S. patent application Ser. No. 14/491,763, filed Sep. 19, 2014, now U.S. Pat. No. 9,886,899, which is a continuation-in-part of U.S. patent application Ser. No. 14/474,977, filed Sep. 2, 2014, which is a continuation-in-part of U.S. patent application Ser. No. 13/789,978, filed Mar. 8, 2013, now U.S. Pat. No. 9,351,368, each of which is hereby incorporated by reference herein in its entirety.
Number | Name | Date | Kind |
---|---|---|---|
3506851 | Polkinghorn | Apr 1970 | A |
3750987 | Gobel | Aug 1973 | A |
3774055 | Bapat | Nov 1973 | A |
4090096 | Nagami | May 1978 | A |
4354162 | Wright | Oct 1982 | A |
4402075 | Bargeton | Aug 1983 | A |
4996523 | Bell | Feb 1991 | A |
5134387 | Smith | Jul 1992 | A |
5153420 | Hack | Oct 1992 | A |
5170158 | Shinya | Dec 1992 | A |
5204661 | Hack | Apr 1993 | A |
5266515 | Robb | Nov 1993 | A |
5278542 | Smith | Jan 1994 | A |
5408267 | Main | Apr 1995 | A |
5498880 | Lee | Mar 1996 | A |
5572444 | Lentz | Nov 1996 | A |
5589847 | Lewis | Dec 1996 | A |
5619033 | Weisfield | Apr 1997 | A |
5648276 | Hara | Jul 1997 | A |
5670973 | Bassetti | Sep 1997 | A |
5691783 | Numao | Nov 1997 | A |
5701505 | Yamashita | Dec 1997 | A |
5714968 | Ikeda | Feb 1998 | A |
5744824 | Kousai | Apr 1998 | A |
5745660 | Kolpatzik | Apr 1998 | A |
5748160 | Shieh | May 1998 | A |
5758129 | Gray | May 1998 | A |
5835376 | Smith | Nov 1998 | A |
5870071 | Kawahata | Feb 1999 | A |
5874803 | Garbuzov | Feb 1999 | A |
5880582 | Sawada | Mar 1999 | A |
5881299 | Nomura | Mar 1999 | A |
5903248 | Irwin | May 1999 | A |
5917280 | Burrows | Jun 1999 | A |
5949398 | Kim | Sep 1999 | A |
5952789 | Stewart | Sep 1999 | A |
5990629 | Yamada | Nov 1999 | A |
6023259 | Howard | Feb 2000 | A |
6069365 | Chow | May 2000 | A |
6091203 | Kawashima | Jul 2000 | A |
6097360 | Holloman | Aug 2000 | A |
6100868 | Lee | Aug 2000 | A |
6144222 | Ho | Nov 2000 | A |
6229506 | Dawson | May 2001 | B1 |
6229508 | Kane | May 2001 | B1 |
6246180 | Nishigaki | Jun 2001 | B1 |
6252248 | Sano | Jun 2001 | B1 |
6268841 | Cairns | Jul 2001 | B1 |
6288696 | Holloman | Sep 2001 | B1 |
6307322 | Dawson | Oct 2001 | B1 |
6310962 | Chung | Oct 2001 | B1 |
6323631 | Juang | Nov 2001 | B1 |
6333729 | Ha | Dec 2001 | B1 |
6384804 | Dodabalapur | May 2002 | B1 |
6388653 | Goto | May 2002 | B1 |
6392617 | Gleason | May 2002 | B1 |
6396469 | Miwa | May 2002 | B1 |
6414661 | Shen | Jul 2002 | B1 |
6417825 | Stewart | Jul 2002 | B1 |
6430496 | Smith | Aug 2002 | B1 |
6433488 | Bu | Aug 2002 | B1 |
6473065 | Fan | Oct 2002 | B1 |
6475845 | Kimura | Nov 2002 | B2 |
6501098 | Yamazaki | Dec 2002 | B2 |
6501466 | Yamagashi | Dec 2002 | B1 |
6522315 | Ozawa | Feb 2003 | B2 |
6535185 | Kim | Mar 2003 | B2 |
6542138 | Shannon | Apr 2003 | B1 |
6559839 | Ueno | May 2003 | B1 |
6580408 | Bae | Jun 2003 | B1 |
6583398 | Harkin | Jun 2003 | B2 |
6618030 | Kane | Sep 2003 | B2 |
6639244 | Yamazaki | Oct 2003 | B1 |
6680580 | Sung | Jan 2004 | B1 |
6686699 | Yumoto | Feb 2004 | B2 |
6690000 | Muramatsu | Feb 2004 | B1 |
6693610 | Shannon | Feb 2004 | B2 |
6694248 | Smith | Feb 2004 | B2 |
6697057 | Koyama | Feb 2004 | B2 |
6724151 | Yoo | Apr 2004 | B2 |
6734636 | Sanford | May 2004 | B2 |
6753655 | Shih | Jun 2004 | B2 |
6753834 | Mikami | Jun 2004 | B2 |
6756741 | Li | Jun 2004 | B2 |
6756958 | Furuhashi | Jun 2004 | B2 |
6777888 | Kondo | Aug 2004 | B2 |
6781567 | Kimura | Aug 2004 | B2 |
6788231 | Hsueh | Sep 2004 | B1 |
6809706 | Shimoda | Oct 2004 | B2 |
6828950 | Koyama | Dec 2004 | B2 |
6858991 | Miyazawa | Feb 2005 | B2 |
6859193 | Yumoto | Feb 2005 | B1 |
6864637 | Park | Mar 2005 | B2 |
6876346 | Anzai | Apr 2005 | B2 |
6900485 | Lee | May 2005 | B2 |
6903734 | Eu | Jun 2005 | B2 |
6911960 | Yokoyama | Jun 2005 | B1 |
6911964 | Lee | Jun 2005 | B2 |
6914448 | Jinno | Jul 2005 | B2 |
6919871 | Kwon | Jul 2005 | B2 |
6924602 | Komiya | Aug 2005 | B2 |
6933756 | Miyazawa | Aug 2005 | B2 |
6937220 | Kitaura | Aug 2005 | B2 |
6940214 | Komiya | Sep 2005 | B1 |
6954194 | Matsumoto | Oct 2005 | B2 |
6970149 | Chung | Nov 2005 | B2 |
6975142 | Azami | Dec 2005 | B2 |
6975332 | Arnold | Dec 2005 | B2 |
6995519 | Arnold | Feb 2006 | B2 |
7027015 | Booth, Jr. | Apr 2006 | B2 |
7034793 | Sekiya | Apr 2006 | B2 |
7038392 | Libsch | May 2006 | B2 |
7057588 | Asano | Jun 2006 | B2 |
7061451 | Kimura | Jun 2006 | B2 |
7071932 | Libsch | Jul 2006 | B2 |
7106285 | Naugler | Sep 2006 | B2 |
7112820 | Chang | Sep 2006 | B2 |
7113864 | Smith | Sep 2006 | B2 |
7122835 | Ikeda | Oct 2006 | B1 |
7129914 | Knapp | Oct 2006 | B2 |
7164417 | Cok | Jan 2007 | B2 |
7224332 | Cok | May 2007 | B2 |
7248236 | Nathan | Jul 2007 | B2 |
7259737 | Ono | Aug 2007 | B2 |
7262753 | Tanghe | Aug 2007 | B2 |
7274363 | Ishizuka | Sep 2007 | B2 |
7310092 | Imamura | Dec 2007 | B2 |
7315295 | Kimura | Jan 2008 | B2 |
7317434 | Lan | Jan 2008 | B2 |
7321348 | Cok | Jan 2008 | B2 |
7327357 | Jeong | Feb 2008 | B2 |
7333077 | Koyama | Feb 2008 | B2 |
7343243 | Smith | Mar 2008 | B2 |
7414600 | Nathan | Aug 2008 | B2 |
7466166 | Date | Dec 2008 | B2 |
7495501 | Iwabuchi | Feb 2009 | B2 |
7502000 | Yuki | Mar 2009 | B2 |
7515124 | Yaguma | Apr 2009 | B2 |
7535449 | Miyazawa | May 2009 | B2 |
7554512 | Steer | Jun 2009 | B2 |
7569849 | Nathan | Aug 2009 | B2 |
7595776 | Hashimoto | Sep 2009 | B2 |
7604718 | Zhang | Oct 2009 | B2 |
7609239 | Chang | Oct 2009 | B2 |
7612745 | Yumoto | Nov 2009 | B2 |
7619594 | Hu | Nov 2009 | B2 |
7619597 | Nathan | Nov 2009 | B2 |
7639211 | Miyazawa | Dec 2009 | B2 |
7683899 | Hirakata | Mar 2010 | B2 |
7688289 | Abe | Mar 2010 | B2 |
7760162 | Miyazawa | Jul 2010 | B2 |
7808008 | Miyake | Oct 2010 | B2 |
7859520 | Kimura | Dec 2010 | B2 |
7889159 | Nathan | Feb 2011 | B2 |
7903127 | Kwon | Mar 2011 | B2 |
7920116 | Woo | Apr 2011 | B2 |
7944414 | Shirasaki | May 2011 | B2 |
7978170 | Park | Jul 2011 | B2 |
7989392 | Crockett | Aug 2011 | B2 |
7995008 | Miwa | Aug 2011 | B2 |
8063852 | Kwak | Nov 2011 | B2 |
8102343 | Yatabe | Jan 2012 | B2 |
8144081 | Miyazawa | Mar 2012 | B2 |
8159007 | Barna | Apr 2012 | B2 |
8242979 | Anzai | Aug 2012 | B2 |
8253665 | Nathan | Aug 2012 | B2 |
8283967 | Chaji | Oct 2012 | B2 |
8319712 | Nathan | Nov 2012 | B2 |
8456581 | Kimura | Jun 2013 | B2 |
8564513 | Nathan | Oct 2013 | B2 |
8665214 | Forutanpour | Mar 2014 | B2 |
8836684 | Harada | Sep 2014 | B2 |
8872739 | Kimura | Oct 2014 | B2 |
8878816 | Chen | Nov 2014 | B2 |
9153172 | Nathan | Oct 2015 | B2 |
9430958 | Chaji | Aug 2016 | B2 |
9466240 | Jaffari | Oct 2016 | B2 |
9472138 | Nathan | Oct 2016 | B2 |
9659527 | Williams | May 2017 | B2 |
9685114 | Chaji | Jul 2017 | B2 |
9697771 | Azizi | Jul 2017 | B2 |
9721505 | Chaji | Aug 2017 | B2 |
9741292 | Nathan | Aug 2017 | B2 |
9747834 | Chaji | Aug 2017 | B2 |
RE46561 | Chaji | Sep 2017 | E |
9934725 | Chaji | Mar 2018 | B2 |
20010002703 | Koyama | Jun 2001 | A1 |
20010009283 | Arao | Jul 2001 | A1 |
20010024186 | Kane | Sep 2001 | A1 |
20010026257 | Kimura | Oct 2001 | A1 |
20010028226 | Malaviya | Oct 2001 | A1 |
20010030323 | Ikeda | Oct 2001 | A1 |
20010035863 | Kimura | Nov 2001 | A1 |
20010040541 | Yoneda | Nov 2001 | A1 |
20010043173 | Troutman | Nov 2001 | A1 |
20010045929 | Prache | Nov 2001 | A1 |
20010052940 | Hagihara | Dec 2001 | A1 |
20020000576 | Inukai | Jan 2002 | A1 |
20020011796 | Koyama | Jan 2002 | A1 |
20020011799 | Kimura | Jan 2002 | A1 |
20020012057 | Kimura | Jan 2002 | A1 |
20020030190 | Ohtani | Mar 2002 | A1 |
20020047565 | Nara | Apr 2002 | A1 |
20020052086 | Maeda | May 2002 | A1 |
20020080108 | Wang | Jun 2002 | A1 |
20020084463 | Sanford | Jul 2002 | A1 |
20020101172 | Bu | Aug 2002 | A1 |
20020117722 | Osada | Aug 2002 | A1 |
20020140712 | Ouchi | Oct 2002 | A1 |
20020158587 | Komiya | Oct 2002 | A1 |
20020158666 | Azami | Oct 2002 | A1 |
20020158823 | Zavracky | Oct 2002 | A1 |
20020171613 | Goto | Nov 2002 | A1 |
20020181276 | Yamazaki | Dec 2002 | A1 |
20020186214 | Siwinski | Dec 2002 | A1 |
20020190971 | Nakamura | Dec 2002 | A1 |
20020195967 | Kim | Dec 2002 | A1 |
20020195968 | Sanford | Dec 2002 | A1 |
20020196213 | Akimoto | Dec 2002 | A1 |
20030001828 | Asano | Jan 2003 | A1 |
20030001858 | Jack | Jan 2003 | A1 |
20030016190 | Kondo | Jan 2003 | A1 |
20030020413 | Oomura | Jan 2003 | A1 |
20030030603 | Shimoda | Feb 2003 | A1 |
20030062524 | Kimura | Apr 2003 | A1 |
20030062844 | Miyazawa | Apr 2003 | A1 |
20030076048 | Rutherford | Apr 2003 | A1 |
20030090445 | Chen | May 2003 | A1 |
20030090447 | Kimura | May 2003 | A1 |
20030090481 | Kimura | May 2003 | A1 |
20030095087 | Libsch | May 2003 | A1 |
20030098829 | Chen | May 2003 | A1 |
20030107560 | Yumoto | Jun 2003 | A1 |
20030107561 | Uchino | Jun 2003 | A1 |
20030111966 | Mikami | Jun 2003 | A1 |
20030112205 | Yamada | Jun 2003 | A1 |
20030112208 | Okabe | Jun 2003 | A1 |
20030117348 | Knapp | Jun 2003 | A1 |
20030122474 | Lee | Jul 2003 | A1 |
20030122747 | Shannon | Jul 2003 | A1 |
20030128199 | Kimura | Jul 2003 | A1 |
20030151569 | Lee | Aug 2003 | A1 |
20030156104 | Morita | Aug 2003 | A1 |
20030169241 | LeChevalier | Sep 2003 | A1 |
20030169247 | Kawabe | Sep 2003 | A1 |
20030174152 | Noguchi | Sep 2003 | A1 |
20030179626 | Sanford | Sep 2003 | A1 |
20030185438 | Osawa | Oct 2003 | A1 |
20030189535 | Matsumoto | Oct 2003 | A1 |
20030197663 | Lee | Oct 2003 | A1 |
20030214465 | Kimura | Nov 2003 | A1 |
20030227262 | Kwon | Dec 2003 | A1 |
20030230141 | Gilmour | Dec 2003 | A1 |
20030230980 | Forrest | Dec 2003 | A1 |
20040004443 | Park | Jan 2004 | A1 |
20040004589 | Shih | Jan 2004 | A1 |
20040032382 | Cok | Feb 2004 | A1 |
20040041750 | Abe | Mar 2004 | A1 |
20040066357 | Kawasaki | Apr 2004 | A1 |
20040070557 | Asano | Apr 2004 | A1 |
20040070558 | Cok | Apr 2004 | A1 |
20040090186 | Yoshida | May 2004 | A1 |
20040095338 | Miyazawa | May 2004 | A1 |
20040129933 | Nathan | Jul 2004 | A1 |
20040130516 | Nathan | Jul 2004 | A1 |
20040135749 | Kondakov | Jul 2004 | A1 |
20040145547 | Oh | Jul 2004 | A1 |
20040150595 | Kasai | Aug 2004 | A1 |
20040155841 | Kasai | Aug 2004 | A1 |
20040160516 | Ford | Aug 2004 | A1 |
20040171619 | Barkoczy | Sep 2004 | A1 |
20040174349 | Libsch | Sep 2004 | A1 |
20040174354 | Ono | Sep 2004 | A1 |
20040179005 | Jo | Sep 2004 | A1 |
20040183759 | Stevenson | Sep 2004 | A1 |
20040189627 | Shirasaki | Sep 2004 | A1 |
20040196275 | Hattori | Oct 2004 | A1 |
20040227697 | Mori | Nov 2004 | A1 |
20040228369 | Simmons | Nov 2004 | A1 |
20040239696 | Okabe | Dec 2004 | A1 |
20040251844 | Hashido | Dec 2004 | A1 |
20040252085 | Miyagawa | Dec 2004 | A1 |
20040252089 | Ono | Dec 2004 | A1 |
20040256617 | Yamada | Dec 2004 | A1 |
20040257353 | Imamura | Dec 2004 | A1 |
20040257355 | Naugler | Dec 2004 | A1 |
20040263437 | Hattori | Dec 2004 | A1 |
20040263506 | Koyama | Dec 2004 | A1 |
20050007357 | Yamashita | Jan 2005 | A1 |
20050052379 | Waterman | Mar 2005 | A1 |
20050057459 | Miyazawa | Mar 2005 | A1 |
20050067970 | Libsch | Mar 2005 | A1 |
20050067971 | Kane | Mar 2005 | A1 |
20050083270 | Miyazawa | Apr 2005 | A1 |
20050110420 | Arnold | May 2005 | A1 |
20050110727 | Shin | May 2005 | A1 |
20050123193 | Lamberg | Jun 2005 | A1 |
20050140600 | Kim | Jun 2005 | A1 |
20050140610 | Smith | Jun 2005 | A1 |
20050145891 | Abe | Jul 2005 | A1 |
20050156831 | Yamazaki | Jul 2005 | A1 |
20050168416 | Hashimoto | Aug 2005 | A1 |
20050206590 | Sasaki | Sep 2005 | A1 |
20050212787 | Noguchi | Sep 2005 | A1 |
20050219188 | Kawabe | Oct 2005 | A1 |
20050243037 | Eom | Nov 2005 | A1 |
20050248515 | Naugler | Nov 2005 | A1 |
20050258867 | Miyazawa | Nov 2005 | A1 |
20050285822 | Reddy | Dec 2005 | A1 |
20050285825 | Eom | Dec 2005 | A1 |
20060012310 | Chen | Jan 2006 | A1 |
20060012311 | Ogawa | Jan 2006 | A1 |
20060022305 | Yamashita | Feb 2006 | A1 |
20060038750 | Inoue | Feb 2006 | A1 |
20060038758 | Routley | Feb 2006 | A1 |
20060038762 | Chou | Feb 2006 | A1 |
20060066533 | Sato | Mar 2006 | A1 |
20060071887 | Chou | Apr 2006 | A1 |
20060077077 | Kwon | Apr 2006 | A1 |
20060077134 | Hector | Apr 2006 | A1 |
20060077194 | Jeong | Apr 2006 | A1 |
20060092185 | Jo | May 2006 | A1 |
20060114196 | Shin | Jun 2006 | A1 |
20060125408 | Nathan | Jun 2006 | A1 |
20060125740 | Shirasaki | Jun 2006 | A1 |
20060139253 | Choi | Jun 2006 | A1 |
20060145964 | Park | Jul 2006 | A1 |
20060158402 | Nathan | Jul 2006 | A1 |
20060191178 | Sempel | Aug 2006 | A1 |
20060208971 | Deane | Sep 2006 | A1 |
20060209012 | Hagood | Sep 2006 | A1 |
20060214888 | Schneider | Sep 2006 | A1 |
20060221009 | Miwa | Oct 2006 | A1 |
20060227082 | Ogata | Oct 2006 | A1 |
20060232522 | Roy | Oct 2006 | A1 |
20060244391 | Shishido | Nov 2006 | A1 |
20060244697 | Lee | Nov 2006 | A1 |
20060261841 | Fish | Nov 2006 | A1 |
20060279478 | Ikegami | Dec 2006 | A1 |
20060290614 | Nathan | Dec 2006 | A1 |
20070001939 | Hashimoto | Jan 2007 | A1 |
20070001945 | Yoshida | Jan 2007 | A1 |
20070008251 | Kohno | Jan 2007 | A1 |
20070008297 | Bassetti | Jan 2007 | A1 |
20070035340 | Kimura | Feb 2007 | A1 |
20070035489 | Lee | Feb 2007 | A1 |
20070035707 | Margulis | Feb 2007 | A1 |
20070040773 | Lee | Feb 2007 | A1 |
20070040782 | Woo | Feb 2007 | A1 |
20070057873 | Uchino | Mar 2007 | A1 |
20070057874 | Le Roy | Mar 2007 | A1 |
20070063932 | Nathan | Mar 2007 | A1 |
20070063959 | Iwabuchi | Mar 2007 | A1 |
20070075957 | Chen | Apr 2007 | A1 |
20070080908 | Nathan | Apr 2007 | A1 |
20070085801 | Park | Apr 2007 | A1 |
20070091050 | Katayama | Apr 2007 | A1 |
20070109232 | Yamamoto | May 2007 | A1 |
20070126000 | Lin | Jun 2007 | A1 |
20070128583 | Miyazawa | Jun 2007 | A1 |
20070164941 | Park | Jul 2007 | A1 |
20070176918 | Aho | Aug 2007 | A1 |
20070182671 | Nathan | Aug 2007 | A1 |
20070236430 | Fish | Oct 2007 | A1 |
20070236440 | Wacyk | Oct 2007 | A1 |
20070241999 | Lin | Oct 2007 | A1 |
20070242008 | Cummings | Oct 2007 | A1 |
20070296684 | Thomas | Dec 2007 | A1 |
20080001544 | Murakami | Jan 2008 | A1 |
20080043044 | Woo | Feb 2008 | A1 |
20080048951 | Naugler | Feb 2008 | A1 |
20080055134 | Li | Mar 2008 | A1 |
20080062106 | Tseng | Mar 2008 | A1 |
20080068307 | Kawabe | Mar 2008 | A1 |
20080074360 | Lu | Mar 2008 | A1 |
20080088549 | Nathan | Apr 2008 | A1 |
20080094426 | Kimpe | Apr 2008 | A1 |
20080111766 | Uchino | May 2008 | A1 |
20080122819 | Cho | May 2008 | A1 |
20080129906 | Lin | Jun 2008 | A1 |
20080180356 | Minami | Jul 2008 | A1 |
20080198103 | Toyomura | Aug 2008 | A1 |
20080228562 | Smith | Sep 2008 | A1 |
20080231625 | Minami | Sep 2008 | A1 |
20080231641 | Miyashita | Sep 2008 | A1 |
20080252590 | Doi | Oct 2008 | A1 |
20080265786 | Koyama | Oct 2008 | A1 |
20080290805 | Yamada | Nov 2008 | A1 |
20080291223 | Yamazaki | Nov 2008 | A1 |
20090009459 | Miyashita | Jan 2009 | A1 |
20090015532 | Katayama | Jan 2009 | A1 |
20090058789 | Hung | Mar 2009 | A1 |
20090121988 | Amo | May 2009 | A1 |
20090146926 | Sung | Jun 2009 | A1 |
20090153448 | Tomida | Jun 2009 | A1 |
20090153459 | Han | Jun 2009 | A9 |
20090174628 | Wang | Jul 2009 | A1 |
20090201230 | Smith | Aug 2009 | A1 |
20090201281 | Routley | Aug 2009 | A1 |
20090206764 | Schemmann | Aug 2009 | A1 |
20090219232 | Choi | Sep 2009 | A1 |
20090225011 | Choi | Sep 2009 | A1 |
20090244046 | Seto | Oct 2009 | A1 |
20090251452 | Kang | Oct 2009 | A1 |
20090251486 | Sakakibara | Oct 2009 | A1 |
20090278777 | Wang | Nov 2009 | A1 |
20090289964 | Miyachi | Nov 2009 | A1 |
20090295423 | Levey | Dec 2009 | A1 |
20100026725 | Smith | Feb 2010 | A1 |
20100033469 | Nathan | Feb 2010 | A1 |
20100039451 | Jung | Feb 2010 | A1 |
20100039453 | Nathan | Feb 2010 | A1 |
20100045646 | Kishi | Feb 2010 | A1 |
20100066714 | Ozaki | Mar 2010 | A1 |
20100079419 | Shibusawa | Apr 2010 | A1 |
20100129997 | Lin | May 2010 | A1 |
20100134475 | Ogura | Jun 2010 | A1 |
20100141564 | Choi | Jun 2010 | A1 |
20100141626 | Tomida | Jun 2010 | A1 |
20100207920 | Chaji | Aug 2010 | A1 |
20100225634 | Levey | Sep 2010 | A1 |
20100251295 | Amento | Sep 2010 | A1 |
20100269889 | Reinhold | Oct 2010 | A1 |
20100277400 | Jeong | Nov 2010 | A1 |
20100315319 | Cok | Dec 2010 | A1 |
20100315449 | Chaji | Dec 2010 | A1 |
20110050741 | Jeong | Mar 2011 | A1 |
20110063197 | Chung | Mar 2011 | A1 |
20110069089 | Kopf | Mar 2011 | A1 |
20110074762 | Shirasaki | Mar 2011 | A1 |
20110084993 | Kawabe | Apr 2011 | A1 |
20110109350 | Chaji | May 2011 | A1 |
20110157134 | Ogura | Jun 2011 | A1 |
20110169805 | Yamazaki | Jul 2011 | A1 |
20110191042 | Chaji | Aug 2011 | A1 |
20110205221 | Lin | Aug 2011 | A1 |
20120026146 | Kim | Feb 2012 | A1 |
20120054672 | McDowell | Mar 2012 | A1 |
20120169608 | Forutanpour | Jul 2012 | A1 |
20120169793 | Nathan | Jul 2012 | A1 |
20120280962 | Kawabe | Nov 2012 | A1 |
20120293481 | Chaji | Nov 2012 | A1 |
20120299976 | Chen | Nov 2012 | A1 |
20120299978 | Chaji | Nov 2012 | A1 |
20130099692 | Chaji | Apr 2013 | A1 |
20140225883 | Chaji | Aug 2014 | A1 |
20140267215 | Soni | Sep 2014 | A1 |
20140300281 | Chaji | Oct 2014 | A1 |
Number | Date | Country |
---|---|---|
729652 | Jun 1997 | AU |
764896 | Dec 2001 | AU |
1 294 034 | Jan 1992 | CA |
2 249 592 | Jul 1998 | CA |
2 303 302 | Mar 1999 | CA |
2 368 386 | Sep 1999 | CA |
2 242 720 | Jan 2000 | CA |
2 354 018 | Jun 2000 | CA |
2 432 530 | Jul 2002 | CA |
2 436 451 | Aug 2002 | CA |
2 507 276 | Aug 2002 | CA |
2 463 653 | Jan 2004 | CA |
2 498 136 | Mar 2004 | CA |
2 522 396 | Nov 2004 | CA |
2 438 363 | Feb 2005 | CA |
2 443 206 | Mar 2005 | CA |
2 519 097 | Mar 2005 | CA |
2 472 671 | Dec 2005 | CA |
2 523 841 | Jan 2006 | CA |
2 567 076 | Jan 2006 | CA |
2 495 726 | Jul 2006 | CA |
2 557 713 | Nov 2006 | CA |
2 526 782 | Aug 2007 | CA |
2 651 893 | Nov 2007 | CA |
2 672 590 | Oct 2009 | CA |
1588521 | Mar 2005 | CN |
1601594 | Mar 2005 | CN |
1886774 | Dec 2006 | CN |
101116129 | Jan 2008 | CN |
101395653 | Mar 2009 | CN |
101908316 | Dec 2010 | CN |
101978412 | Feb 2011 | CN |
102741910 | Oct 2012 | CN |
103562989 | Feb 2014 | CN |
202006007613 | Sep 2006 | DE |
0 478 186 | Apr 1992 | EP |
1 028 471 | Aug 2000 | EP |
1 130 565 | Sep 2001 | EP |
1 194 013 | Apr 2002 | EP |
1 321 922 | Jun 2003 | EP |
1 335 430 | Aug 2003 | EP |
1 381 019 | Jan 2004 | EP |
1 429 312 | Jun 2004 | EP |
1 439 520 | Jul 2004 | EP |
1 465 143 | Oct 2004 | EP |
1 473 689 | Nov 2004 | EP |
1 517 290 | Mar 2005 | EP |
1 521 203 | Apr 2005 | EP |
2 458 579 | May 2012 | EP |
2 399 935 | Sep 2004 | GB |
2 460 018 | Nov 2009 | GB |
09 090405 | Apr 1997 | JP |
10-254410 | Sep 1998 | JP |
11 231805 | Aug 1999 | JP |
2002-278513 | Sep 2002 | JP |
2003-076331 | Mar 2003 | JP |
2003-099000 | Apr 2003 | JP |
2003-173165 | Jun 2003 | JP |
2003-186439 | Jul 2003 | JP |
2003-195809 | Jul 2003 | JP |
2003-271095 | Sep 2003 | JP |
2003-308046 | Oct 2003 | JP |
2004-054188 | Feb 2004 | JP |
2004-226960 | Aug 2004 | JP |
2005-004147 | Jan 2005 | JP |
2005-099715 | Apr 2005 | JP |
2005-258326 | Sep 2005 | JP |
2005-338819 | Dec 2005 | JP |
569173 | Jan 2004 | TW |
200526065 | Aug 2005 | TW |
1239501 | Sep 2005 | TW |
WO 9811554 | Mar 1998 | WO |
WO 9948079 | Sep 1999 | WO |
WO 0127910 | Apr 2001 | WO |
WO 02067327 | Aug 2002 | WO |
WO 03034389 | Apr 2003 | WO |
WO 03063124 | Jul 2003 | WO |
WO 03075256 | Sep 2003 | WO |
WO 2004003877 | Jan 2004 | WO |
WO 2004015668 | Feb 2004 | WO |
WO 2004034364 | Apr 2004 | WO |
WO 2004086347 | Oct 2004 | WO |
WO 2005022498 | Mar 2005 | WO |
WO 2005055185 | Jun 2005 | WO |
WO 2005055186 | Jun 2005 | WO |
WO 2005069267 | Jul 2005 | WO |
WO 2005122121 | Dec 2005 | WO |
WO 2006063448 | Jun 2006 | WO |
WO 2006128069 | Nov 2006 | WO |
WO 2007079572 | Jul 2007 | WO |
WO 2008057369 | May 2008 | WO |
WO 2009059028 | May 2009 | WO |
WO 2009127065 | Oct 2009 | WO |
WO 2010066030 | Jun 2010 | WO |
WO 2010120733 | Oct 2010 | WO |
Entry |
---|
Ahnood et al.: “Effect of threshold voltage instability on field effect mobility in thin film transistors deduced from constant current measurements”; dated Aug. 2009. |
Alexander et al.: “Pixel circuits and drive schemes for glass and elastic AMOLED displays”; dated Jul. 2005 (9 pages). |
Alexander et al.: “Unique Electrical Measurement Technology for Compensation Inspection and Process Diagnostics of AMOLED HDTV”; dated May 2010 (4 pages). |
Ashtiani et al.: “AMOLED Pixel Circuit With Electronic Compensation of Luminance Degradation”; dated Mar. 2007 (4 pages). |
Chaji et al.: “A Current-Mode Comparator for Digital Calibration of Amorphous Silicon AMOLED Displays”; dated Jul. 2008 (5 pages). |
Chaji et al.: “A fast settling current driver based on the CCII for AMOLED displays”; dated Dec. 2009 (6 pages). |
Chaji et al.: “A Low-Cost Stable Amorphous Silicon AMOLED Display with Full V˜T- and V˜O˜L˜E˜D Shift Compensation”; dated May 2007 (4 pages). |
Chaji et al.: “A low-power driving scheme for a-Si:H active-matrix organic light-emitting diode displays”; dated Jun. 2005 (4 pages). |
Chaji et al.: “A low-power high-performance digital circuit for deep submicron technologies”; dated Jun. 2005 (4 pages). |
Chaji et al.: “A novel a-Si:H AMOLED pixel circuit based on short-term stress stability of a-Si:H TFTs”; dated Oct. 2005 (3 pages). |
Chaji et al.: “A Novel Driving Scheme and Pixel Circuit for AMOLED Displays”; dated Jun. 2006 (4 pages). |
Chaji et al.: “A novel driving scheme for high-resolution large-area a-Si:H AMOLED displays”; dated Aug. 2005 (4 pages). |
Chaji et al.: “A Stable Voltage-Programmed Pixel Circuit for a-Si:H AMOLED Displays”; dated Dec. 2006 (12 pages). |
Chaji et al.: “A Sub-μA fast-settling current-programmed pixel circuit for AMOLED displays”; dated Sep. 2007. |
Chaji et al.: “An Enhanced and Simplified Optical Feedback Pixel Circuit for AMOLED Displays”; dated Oct. 2006. |
Chaji et al.: “Compensation technique for DC and transient instability of thin film transistor circuits for large-area devices”; dated Aug. 2008. |
Chaji et al.: “Driving scheme for stable operation of 2-TFT a-Si AMOLED pixel”; dated Apr. 2005 (2 pages). |
Chaji et al.: “Dynamic-effect compensating technique for stable a-Si:H AMOLED displays”; dated Aug. 2005 (4 pages). |
Chaji et al.: “Electrical Compensation of OLED Luminance Degradation”; dated Dec. 2007 (3 pages). |
Chaji et al.: “eUTDSP: a design study of a new VLIW-based DSP architecture”; dated May 2003 (4 pages). |
Chaji et al.: “Fast and Offset-Leakage Insensitive Current-Mode Line Driver for Active Matrix Displays and Sensors”; dated Feb. 2009 (8 pages). |
Chaji et al.: “High Speed Low Power Adder Design With a New Logic Style: Pseudo Dynamic Logic (SDL)”; dated Oct. 2001 (4 pages). |
Chaji et al.: “High-precision fast current source for large-area current-programmed a-Si flat panels”; dated Sep. 2006 (4 pages). |
Chaji et al.: “Low-Cost AMOLED Television with IGNIS Compensating Technology”; dated May 2008 (4 pages). |
Chaji et al.: “Low-Cost Stable a-Si:H AMOLED Display for Portable Applications”; dated Jun. 2006 (4 pages). |
Chaji et al.: “Low-Power Low-Cost Voltage-Programmed a-Si:H AMOLED Display”; dated Jun. 2008 (5 pages). |
Chaji et al.: “Merged phototransistor pixel with enhanced near infrared response and flicker noise reduction for biomolecular imaging”; dated Nov. 2008 (3 pages). |
Chaji et al.: “Parallel Addressing Scheme for Voltage-Programmed Active-Matrix OLED Displays”; dated May 2007 (6 pages). |
Chaji et al.: “Pseudo dynamic logic (SDL): a high-speed and low-power dynamic logic family”; dated 2002 (4 pages). |
Chaji et al.: “Stable a-Si:H circuits based on short-term stress stability of amorphous silicon thin film transistors”; dated May 2006 (4 pages). |
Chaji et al.: “Stable Pixel Circuit for Small-Area High-Resolution a-Si:H AMOLED Displays”; dated Oct. 2008 (6 pages). |
Chaji et al.: “Stable RGBW AMOLED display with OLED degradation compensation using electrical feedback”; dated Feb. 2010 (2 pages). |
Chaji et al.: “Thin-Film Transistor Integration for Biomedical Imaging and AMOLED Displays”; dated May 2008 (177 pages). |
Chao et al., “A New AMOLED Pixel Circuit With Pulsed Drive and Reverse Bias to Alleviate OLED Degradation,” IEEE Transactions on Electron Devices, Apr. 2012, vol. 59, Issue 4, pp. 1123-1130. |
Chapter 3: Color Spaces Keith Jack: Video Demystified: “A Handbook for the Digital Engineer” 2001 Referex ORD-0000-00-00 USA EP040425529 ISBN: 1-878707-56-6 pp. 32-33. |
Chapter 8: Alternative Flat Panel Display 1-25 Technologies; Willem den Boer: “Active Matrix Liquid Crystal Display. Fundamentals and Applications” 2005 Referex ORD-0000-00-00 U.K.; XP040426102 ISBN: 0-7506-7813-5 pp. 206-209 p. 208. |
European Partial Search Report Application No. 12 15 6251.6 European Patent Office dated May 30, 2012 (7 pages). |
European Patent Office Communication Application No. 05 82 1114 dated Jan. 11, 2013 (9 pages). |
European Patent Office Communication with Supplemental European Search Report for EP Application No. 07 70 1644.2 dated Aug. 18, 2009 (12 pages). |
European Search Report Application No. 10 83 4294.0-1903 dated Apr. 8, 2013 (9 pages). |
European Search Report Application No. EP 05 80 7905 dated Apr. 2, 2009 (5 pages). |
European Search Report Application No. EP 05 82 1114 dated Mar. 27, 2009 (2 pages). |
European Search Report Application No. EP 07 70 1644 dated Aug. 5, 2009. |
European Search Report Application No. EP 10 17 5764 dated Oct. 18, 2010 (2 pages). |
European Search Report Application No. EP 10 82 9593.2 European Patent Office dated May 17, 2013 (7 pages). |
European Search Report Application No. EP 12 15 6251.6 European Patent Office dated Oct. 12, 2012 (18 pages). |
European Search Report Application No. EP. 11 175 225.9 dated Nov. 4, 2011 (9 pages). |
European Supplementary Search Report Application No. EP 09 80 2309 dated May 8, 2011 (14 pages). |
European Supplementary Search Report Application No. EP 09 83 1339.8 dated Mar. 26, 2012 (11 pages). |
Extended European Search Report Application No. EP 06 75 2777.0 dated Dec. 6, 2010 (21 pages). |
Extended European Search Report Application No. EP 09 73 2338.0 dated May 24, 2011 (8 pages). |
Extended European Search Report Application No. EP 11 17 5223, 4 dated Nov. 8, 2011 (8 pages). |
Extended European Search Report Application No. EP 12 17 4465.0 European Patent Office dated Sep. 7, 2012 (9 pages). |
Fan et al. “LTPS_TFT Pixel Circuit Compensation for TFT Threshold Voltage Shift and IR-Drop on the Power Line for Amolded Displays” 5 pages copyright 2012. |
Goh et al. “A New a-Si:H Thin-Film Transistor Pixel Circuit for Active-Matrix Organic Light-Emitting Diodes” IEEE Electron Device Letters vol. 24 No. 9 Sep. 2003 pp. 583-585. |
International Search Report Application No. PCT/CA2005/001844 dated Mar. 28, 2006 (2 pages). |
International Search Report Application No. PCT/CA2006/000941 dated Oct. 3, 2006 (2 pages). |
International Search Report Application No. PCT/CA2007/000013 dated May 7, 2007. |
International Search Report Application No. PCT/CA2009/001049 dated Dec. 7, 2009 (4 pages). |
International Search Report Application No. PCT/CA2009/001769 dated Apr. 8, 2010. |
International Search Report Application No. PCT/IB2010/002898 Canadian Intellectual Property Office dated Jul. 28, 2009 (5 pages). |
International Search Report Application No. PCT/IB2010/055481 dated Apr. 7, 2011 (3 pages). |
International Search Report Application No. PCT/IB2011/051103 dated Jul. 8, 2011 3 pages. |
International Search Report Application No. PCT/IB2012/052651 5 pages dated Sep. 11, 2012. |
International Searching Authority Written Opinion Application No. PCT/IB2010/055481 dated Apr. 7, 2011 (6 pages ). |
International Searching Authority Written Opinion Application No. PCT/IB2012/052651 6 pages dated Sep. 11, 2012. |
International Searching Authority Written Opinion Application No. PCT/IB2011/051103 dated Jul. 8, 2011 6 pages. |
International Searching Authority Written Opinion Application No. PCT/IB2010/002898 Canadian Intellectual Property Office dated Mar. 30, 2011 (8 pages). |
International Searching Authority Written Opinion Application No. PCT/CA2009/001769 dated Apr. 8, 2010 (8 pages). |
Jafarabadiashtiani et al.: “A New Driving Method for a-Si AMOLED Displays Based on Voltage Feedback”; dated May 2005 (4 pages). |
Lee et al.: “Ambipolar Thin-Film Transistors Fabricated by PECVD Nanocrystalline Silicon”; dated May 2006 (6 pages). |
Lin et al., “Lifetime Amelioration for an AMOLED Pixel Circuit by Using a Novel AC Driving Scheme,” IEEE Transactions on Electron Devices, Aug. 2011, vol. 58, Issue 8, pp. 2652-2659. |
Ma e y et al: “Organic Light-Emitting Diode/Thin Film Transistor Integration for foldable Displays” Conference record of the 1997 International display research conference and international workshops on LCD technology and emissive technology. Toronto Sep. 15-19, 1997 (6 pages). |
Matsueda y et al.: “35.1: 2.5-in. AMOLED with Integrated 6-bit Gamma Compensated Digital Data Driver”; dated May 2004 (4 pages). |
Nathan et al. “Amorphous Silicon Thin Film Transistor Circuit Integration for Organic LED Displays on Glass and Plastic” IEEE Journal of Solid-State Circuits vol. 39 No. 9 Sep. 2004 pp. 1477-1486. |
Nathan et al.: “Backplane Requirements for Active Matrix Organic Light Emitting Diode Displays”; dated Sep. 2006 (16 pages). |
Nathan et al.: “Call for papers second international workshop on compact thin-film transistor (TFT) modeling for circuit simulation”; dated Sep. 2009 (1 page). |
Nathan et al.: “Driving schemes for a-Si and LTPS AMOLED displays”; dated Dec. 2005 (11 pages). |
Nathan et al.: “Invited Paper: a-Si for AMOLED—Meeting the Performance and Cost Demands of Display Applications (Cell Phone to HDTV)”; dated Jun. 2006 (4 pages). |
Nathan et al.: “Thin film imaging technology on glass and plastic”; dated Oct. 31-Nov. 2, 2000 (4 pages). |
Ono et al. “Shared Pixel Compensation Circuit for AM-OLED Displays” Proceedings of the 9th Asian Symposium on Information Display (ASID) pp. 462-465 New Delhi dated Oct. 8-12, 2006 (4 pages). |
Philipp: “Charge transfer sensing” Sensor Review vol. 19 No. 2 Dec. 31, 1999 (Dec. 31, 1999) 10 pages. |
Rafati et al.: “Comparison of a 17 b multiplier in Dual-rail domino and in Dual-rail D L (D L) logic styles”; dated 2002 (4 pages). |
Safavaian et al.: “Three-TFT image sensor for real-time digital X-ray imaging”; dated Feb. 2, 2006 (2 pages). |
Safavian et al.: “3-TFT active pixel sensor with correlated double sampling readout circuit for real-time medical x-ray imaging”; dated Jun. 2006 (4 pages). |
Safavian et al.: “A novel current scaling active pixel sensor with correlated double sampling readout circuit for real time medical x-ray imaging”; dated May 2007 (7 pages). |
Safavian et al.: “A novel hybrid active-passive pixel with correlated double sampling CMOS readout circuit for medical x-ray imaging”; dated May 2008 (4 pages). |
Safavian et al.: “Self-compensated a-Si:H detector with current-mode readout circuit for digital X-ray fluoroscopy”; dated Aug. 2005 (4 pages). |
Safavian et al.: “TFT active image sensor with current-mode readout circuit for digital x-ray fluoroscopy [5969D-82]”; dated Sep. 2005 (9 pages). |
Servati et al., “Static Characteristics of a-Si:H Dual-Gate TFTs,” IEEE Transactions on Electron Devices, Apr. 2003, vol. 50, Issue 4, pp. 926-932. |
Smith, Lindsay I., “A tutorial on Principal Components Analysis,” dated Feb. 26, 2001 (27 pages). |
Stewart M. et al. “Polysilicon TFT technology for active matrix OLED displays” IEEE transactions on electron devices vol. 48 No. 5 May 2001 (7 pages). |
Vygranenko et al.: “Stability of indium-oxide thin-film transistors by reactive ion beam assisted deposition”; dated Feb. 2009. |
Wang et al.: “Indium oxides by reactive ion beam assisted evaporation: From material study to device application,” dated Mar. 2009 (6 pages). |
Yi He et al. “Current-Source a-Si:H Thin Film Transistor Circuit for Active-Matrix Organic Light-Emitting Displays” IEEE Electron Device Letters vol. 21 No. 12 Dec. 2000 pp. 590-592. |
International Search Report Application No. PCT/IB2013/059074, dated Dec. 18, 2013 (5 pages). |
International Searching Authority Written Opinion Application No. PCT/IB2013/059074, dated Dec. 18, 2013 (8 pages). |
Extended European Search Report Application No. EP 15173106.4 dated Oct. 15, 2013 (8 pages). |
International Search Report Application No. PCT/IB2016/053592, dated Sep. 26, 2016 (5 pages). |
Written Opinion of the International Searching Authority, International Application No. PCT/IB2016/053592, dated Sep. 26, 2016 (5 pages). |
International Search Report Application No. PCT/IB2017/050170, dated May 5, 2017 (3 pages). |
International Searching Authority Written Opinion Application No. PCT/IB2017/050170, dated May 5, 2017 (4 pages). |
Number | Date | Country | |
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20180182293 A1 | Jun 2018 | US |
Number | Date | Country | |
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Parent | 15635653 | Jun 2017 | US |
Child | 15903698 | US | |
Parent | 15184233 | Jun 2016 | US |
Child | 15635653 | US |
Number | Date | Country | |
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Parent | 14491763 | Sep 2014 | US |
Child | 15184233 | US | |
Parent | 14474977 | Sep 2014 | US |
Child | 14491763 | US | |
Parent | 13789978 | Mar 2013 | US |
Child | 14474977 | US |