This application is based upon and claims priority to Chinese Patent Application No. 201510548838.9, filed Aug. 31, 2015, the entire contents of which are incorporated herein by reference.
The present disclosure generally relates to the display technical field, and more particularly, to a pixel driving circuit, a driving method for the pixel driving circuit and a display device.
In display devices, sub-pixel units are defined by gate scan lines and data lines which are perpendicular with each other. A plurality of data lines and gate scan lines define a pixel array which includes a plurality of sub-pixel units arranged in a matrix. The gate scan lines provide gate scan signals to the pixel units. For example, when a gate scan signal is at a high level, the pixel units corresponding to the gate scan line are turned on, and data signals provided by the data lines are written.
A commonly used Organic Light Emitting Diode (OLED) driving circuit is as shown in
As explained above, the sub-pixels corresponding to D2˜D6 are written with wrong data voltages at this time, and when the wrong data voltages are higher than the right data voltages which shall be provided by the data signal driver, the right data voltages cannot be written into the sub-pixels, because the transistor T2 is a PMOS transistor, and the gate voltage of T2 is higher than the data voltages, resulting in that the transistor T2 is turned off and corresponding sub-pixel cannot be charged. In conclusion, if the transistors in one row corresponding to the gate scan signal Sn are all turned on, displaying problem will occur during the brightness switching of a display from black to white due to the influence of the data signals retained in the previous frame on the writing of the data signals in the current frame.
Aiming at the problem with conventional technologies, the present disclosure provides a pixel driving circuit, a driving method for the pixel driving circuit and a display device, in order to solve the problem that switching transistors are turned on before current data signals are written and thus wrong data voltages are written into sub-pixels, and consequently the switching transistors are non-conducted and corresponding sub-pixel cannot be charged.
In order to achieve the above objective, according to an aspect of embodiments of the present disclosure, there is provided a pixel driving circuit for driving a pixel array including sub-pixels arranged in rows and columns, wherein the pixel driving circuit includes:
a source driving circuit providing data signals to each of the sub-pixels in the pixel array; and
a gate driving circuit providing gate scan signals to each of the sub-pixels in the pixel array;
wherein the gate driving circuit provides the gate scan signals at different timings to the sub-pixels in a repeating unit of the pixel array, respectively, and the repeating unit includes at least one pixel unit including adjacent sub-pixels of different colors in the same row.
According to an embodiment of the present disclosure, the pixel driving circuit further includes:
a plurality of data signal drivers disposed between the source driving circuit and the pixel array, each of the plurality of data signal drivers having an input terminal and an output terminal;
wherein the input terminal of each of the plurality of data signal drivers is connected to the source driving circuit via a source line, and the output terminal of each of the plurality of data signal drivers is connected to the sub-pixels in the pixel array via data lines to transmit the plurality of data signals to the sub-pixels at different timings.
According to an embodiment of the present disclosure, the pixel driving circuit further includes:
a timing control circuit providing data switching signals to the plurality of data signal drivers;
wherein each of the plurality of data signal drivers further has a control terminal connected to the timing control circuit, and whether the output terminals of the data signal drivers output the data signals or not is determined by the data switching signals input at the control terminals of the plurality of data signal drivers.
According to an embodiment of the present disclosure, each of the data signal drivers includes:
a multiplexer having an input terminal connected to the source line and a plurality of output terminals; and
a plurality of first switching elements, each of which has an input terminal connected to a corresponding output terminal of the multiplexer, a control terminal receiving a corresponding data switching signal, and an output terminal connected to a corresponding data line to transmit the data signals to sub-pixels in the pixel array via the data line.
According to an embodiment of the present disclosure, the pixel unit includes M sub-pixels, and the gate driving circuit provides N gate scan signals to N sub-pixels in the repeating unit at different timings, respectively, where M and N are positive integers, and N is an integral multiple of M.
According to an embodiment of the present disclosure, the N gate scan signals are generated by N gate drivers, respectively, and an output terminal of any one of the N gate drivers outputs one of the gate scan signals.
According to an embodiment of the present disclosure, the N gate scan signals are generated by a gate scan signal generation circuit which includes:
a gate driver having an input terminal and N output terminals; and
N second switching elements, each of which has an input terminal connected to a corresponding output terminal of the gate driver, a control terminal receiving a scan switching signal, and an output terminal outputting a corresponding one among the gate scan signals under the control of the scan switching signal.
According to another aspect of embodiment of the present disclosure, there is provided a driving method for a pixel driving circuit, wherein the pixel driving circuit is configured to drive a pixel array including sub-pixels arranged in rows and columns and includes:
a source driving circuit providing data signals to each of the sub-pixels in the pixel array; and
a gate driving circuit providing gate scan signals to each of the sub-pixels in the pixel array;
wherein switching transistors are disposed in the sub-pixels, each of the switching transistors has a control terminal receiving a corresponding gate scan signal via a gate scan line and a data terminal receiving a corresponding data signal via a data line;
wherein the method includes:
turning on (for example, individually turning on) the switching transistors in the sub-pixels in a repeating unit of the pixel array at different time periods under the control of the gate scan signals at different timings, wherein the repeating unit includes at least one pixel unit including adjacent sub-pixels of different colors in the same row; and
when the switching transistors are turned on, transmitting the data signals to the sub-pixels where the switching transistors are located.
According to another embodiment of the present disclosure, the gate scan signals at different timings are generated by a plurality of gate drivers, respectively.
According to another embodiment of the present disclosure, the gate scan signals at different timings are generated by a gate scan signal generation circuit, wherein the gate scan signal generation circuit includes a gate driver and a plurality of switching elements which output the gate scan signals under the control of scan switching signals.
According to another aspect of embodiments of the present disclosure, there is provided a display device including a pixel array and the above pixel driving circuit for driving the pixel array.
The technical solutions of the present disclosure at least have the following advantageous effects:
In conventional technologies, sub-pixels in the same row are controlled by the same gate scan signal, and when the switching transistor of one of the sub-pixels is turned on, the switching transistors of other sub-pixels in the same row are turned on before the current data signals are written. In the present disclosure, sub-pixels in the same row are provided with gate scan signals at different timings (i.e., gate scan signals having different time sequences), and thus the present disclosure can solve the above problem with conventional technologies.
Typical embodiments presenting features and advantages of the present disclosure will be described below in detail. It shall be understood that the present disclosure can have various modifications in different embodiments without departing the scope of the present disclosure. The description and the accompanying drawings are only for the illustrative purpose but not for limiting the present disclosure.
In order to solve the previously-mentioned problem, some embodiments are provided to explain and describe the present disclosure.
The embodiment provides a pixel driving circuit for driving a pixel array 100. The pixel array 100 includes a plurality of sub-pixels arranged in rows and columns.
The source driving circuit 10 provides data signals to each of the sub-pixels in the pixel array 100.
The gate driving circuit 20 provides gate scan signals to each of the sub-pixels in the pixel array 100. Specifically, the gate driving circuit 20 provides the gate scan signals at different timings to a plurality of sub-pixels in a repeating unit of the pixel array 100, respectively. The repeating unit includes at least one pixel unit including adjacent sub-pixels of different colors in the same row.
Referring to
It shall be noted that the source driving circuit 10 is usually disposed at an upper edge or a lower edge of the pixel array 100, and the gate driving circuit 20 is usually disposed at a left edge or a right edge of the pixel array 100. For the situation where the number of the sub-pixels in the horizontal direction is far greater than the number of the sub-pixels in the vertical direction, gate driving circuits are usually disposed at both the left and right edges of the pixel array 100. Specific arrangement may be designed according to actual requirements and detailed descriptions are not elaborated herein.
In an embodiment, the pixel driving circuit may further include a plurality of data signal drivers 30. The plurality of data signal drivers 30 are disposed between the source driving circuit 10 and the pixel array 100 and each has an input terminal and an output terminal. The input terminal of each data signal driver 30 is connected to the source driving circuit 10 via a source line Source, and the output terminal of each data signal driver 30 is connected to the sub-pixels in the pixel array 100 via data lines Data to transmit the data signals to the sub-pixels at different timings.
Each of the data signal driving circuits 30 outputs data signals using one source line Source and a plurality of data lines Data for driving the plurality of sub-pixels in the display region. Thus, the number of the ICs is greatly reduced and thereby the IC costs are lowered.
In an embodiment, the pixel driving circuit may further include a timing control circuit 40 for providing data switching signals SWs to the data signal drivers 30.
Each of the data signal drivers 30 further has a control terminal connected to the timing control circuit 40, and whether the output terminals of the data signal drivers 30 output the data signals is determined by the data switching signals SWs input at the control terminals of the data signal drivers 30.
The pixel driving circuit includes both the data signal drivers 30 and the timing control circuit 40 so as to provide enabling signals (i.e., the above data switching signals SWs) having timing features which are capable of controlling the data signal drivers 30 to provide the data signals to the pixel array.
The multiplexer 31 has an input terminal connected to the source line Source and a plurality of output terminals.
Each of the first switching elements 32 has an input terminal connected to a corresponding output terminal of the multiplexer, a control terminal receiving a corresponding data switching signal SW, and an output terminal connected to a corresponding data line Data to transmit the data signals to sub-pixels in the pixel array via the data line. The data switching signals SWs are provided by the timing control circuit 40.
A pixel unit may include a gate driving circuit 20 for M sub-pixels of different colors. The gate driving circuit 20 provides N gate scan signals to N sub-pixels in repeating units at different timings, respectively, where M and N are positive integers, and N is an integral multiple of M. Generally, M is equal to three, that is, each pixel unit includes sub-pixels of three colors, i.e., red, green and blue. Correspondingly, the gate driving circuits 20 provide gate scan signals to the three sub-pixels in the pixel unit at different timings. If one repeating unit includes two pixel units, the repeating unit includes six sub-pixels, and thus it is needed to provide six gate scan signals at different timings to the repeating unit.
It shall be noted that the N gate scan signals having different time sequences provided by the gate driving circuits 20 may be generated by the following two approaches.
In a first approach, the N gate scan signals are generated by N gate drivers, respectively, and an output terminal of any one of the N gate drivers is connected to a gate scan line.
In a second approach, the N gate scan signals are generated by a gate scan signal generation circuit which includes a gate driver and N second switching elements.
The gate driver has an input terminal and N output terminals.
Each of the N second switching elements has an input terminal connected to the output terminal of the gate driver, a control terminal receiving a scan switching signal and an output terminal outputting a corresponding one among the gate scan signals Sn1˜SnN under the control of the scan switching signal.
For example, N is equal to six in the embodiment. According to the first approach, the six gate scan signals are generated by six gate drivers, respectively, as shown in
In view of the above, in the pixel driving circuit provided by the present embodiment, different gate scan signals are provided to sub-pixels in the same row at different timings. Thus, the embodiment can solve the problem with conventional technologies that sub-pixels in the same row are controlled by the same gate scan signal, and when the switching transistor of one of the sub-pixels is turned on, the switching transistors of other sub-pixels in the same row are turned on before the current data signals are written. Further, the data signal driver can drive multiple sub-pixels using one source line, and thereby costs are lowered.
The circuit in
It shall be noted that the present embodiment is described with an example where the sub-pixels of commonly used three colors include a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B, and in actual application, in addition to the sub-pixels of the three basic colors, sub-pixels of white color may be used to form a pixel unit with the sub-pixels of the three colors (RGBW). Or, sub-pixels of yellow color may be used to form a pixel unit with the sub-pixels of the three colors (RGBY), and then M is equal to four, and N is an integral multiple of M. If one repeating unit includes two pixel units, eight gate scan signals are needed. For example, if each pixel unit includes sub-pixels of red, green, blue and white, the number of the data signals provided by each data signal driver via one source line Source, the number of the required data switching signals and the number of the switching elements in the data signal drivers need to be adaptively adjusted, and detailed description is omitted herein.
It shall be noted that one source line provides six data signals for driving six sub-pixels in the same row in the present embodiment, and alternatively, the one source line can provide n data signals for driving n sub-pixels, where n is equal to or greater than 2, and meanwhile each of the n sub-pixels is provided with one gate scan signal Sn. No matter how many data signals are provided by one source line, the number of the sub-pixels in one repeating unit, the number of the gate scan signals and the number of the data signals provided by one source line shall be consistent with each other.
It shall be noted that, the low level occurs in Sn˜Sn6 in sequence, that is to say, the falling edge at the start of the low level in Sn2 corresponds to the rising edge at the end of the low level in Sn1. However, the data switching signals SWs are different. Referring to
In view of the above, the embodiment can solve the technical problem solved by the first embodiment and achieve the same technical effects, i.e., the present embodiment can solve the problem that the data signals in the previous frame influence the pixels in the current frame when one source line drives multiple sub-pixels.
The present embodiment provides a driving method for a pixel driving circuit. The pixel driving circuit is configured to drive a pixel array including sub-pixels arranged in rows and columns and includes a source driving circuit and a gate driving circuit. The source driving circuit provides data signals to each of the sub-pixels in the pixel array. The gate driving circuit provides gate scan signals to each of the sub-pixels in the pixel array. Switching transistors are disposed in the sub-pixels. Each of the switching transistors has a control terminal receiving a corresponding gate scan signal via a gate scan line and a data terminal receiving a corresponding data signal via a data line. The flowchart of the steps of the driving method is as shown in
In step S10, the switching transistors in sub-pixels in a repeating unit of the pixel array are turned on at different time periods under the control of the gate scan signals at different timings.
In step S20, when the switching transistors are turned on, the data signals are transmitted to the sub-pixels where the switching transistors are located.
The repeating unit includes at least one pixel unit including adjacent sub-pixels of different colors in the same row.
In step S10, the gate scan signals at different timings may be generated by a plurality of gate drivers, respectively, as shown in the circuit in
Alternatively, in step S10, the gate scan signals at different timings may be generated by a gate driver and a plurality of switching elements which output the gate scan signals under the control of scan switching signals, as shown in the circuit in
Taking the pixel driving circuit in
When the gate scan signal Sn1 is at a low level, the timing control circuit outputs a data switching signal SW1 at a low level, the switching element in the data signal driver is turned on, and the data signal is provided to the sub-pixel Pixel 1 controlled by Sn1. Since Sn1 is at a low level, the switching transistor in Pixel 1 is turned on, and the data signal can be written into the sub-pixel Pixel 1. Data signals may be written into other sub-pixels similarly.
In the driving method provided by the present disclosure, the writing of data of sub-pixels in the same row is controlled using different gate scan signals at different timings. Thus, the method can solve the problem with conventional technologies that sub-pixels in the same row are controlled by the same gate scan signal, and when the switching transistor of one of the sub-pixels is turned on, the switching transistors of other sub-pixels in the same row are turned on before the current data signals are written. Further, the data signal driver can drive multiple sub-pixels using one source line, and thereby costs are lowered.
The embodiment further provides a display device which may include a pixel array and the pixel driving circuit as provided in the above first and second embodiments for driving the pixel array.
One of ordinary skill in this art will appreciate that modifications and substitutions made without departing from the scope and spirit of the present disclosure as defined by appending claims shall fall within the protection scope of the claims the present disclosure.
Number | Date | Country | Kind |
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201510548838.9 | Aug 2015 | CN | national |