Patent Grant
9779660
This invention claims priority under 35 U.S.C. 119 from China Application No. 201510229135.X, titled “Pixel Unit Driving Circuit, Driving Method and Pixel Cell”, filed May 7, 2015, the entire contents of which are incorporated herein by reference in its entirety.
Technical Field
The disclosure is related to liquid crystal display technology field, and more particular to a pixel cell driving circuit, a driving method and a pixel cell.
Related Art
The organic light-emitting diode (OLED) display panel, also known as the organic electric lighting display device, is an emerging flat-panel display component. The OLED display panel has the characteristics of simple preparation process, low cost, low power consumption, high lighting brightness, wide operating temperature range, light volume, and fast response. It is easy for the OLED display panel to implement a color display, a large screen display, and a flexible display and to match with the integrated circuit driver. Therefore in the flat-panel display field the OLED display panel has been widely used.
The pixel cells in the OLED display panel are typically arranged in a matrix, and according to the different driving manner, the OLED can be divided into two kinds as a passive-matrix OLED (PM-OLED) driving display panel and an active-matrix OLED (AM-OLED) driving display panel. Although the PM-OLED driving display panel has the simple process and low cost, but it exists the crossfeed, high power consumption, low life expectancy and other shortcomings. Therefore it is unable to meet the requirement of the high-resolution, and large-sized display. In contrast with the PM-OLED, each of the pixel cells in the AM-OLED driving display panel is equipped with a set of pixel cell driving circuit composed by a thin film transistor (TFT) and a storage capacitor and the control of the current of the OLED may be realized by controlling the TFT to turn on or turn off, thereby controlling the OLED to emit light. Since the driving circuit adds the TFT and the storage capacitor, such that the OLED in each of the pixel cells is able to emit light within a controllable frame time, and the driving circuit has small required driving current, low power consumption, and longer life, thereby meeting the requirement of the high-resolution, multi-gray scale, and large-sized display.
The disclosure provides a pixel cell driving circuit which adds a charging signal to charge the storage capacitor when the switch thin film transistor is turned off, so as to avoid the flicker due to the electrical charge leakage which results in the storage capacitor voltage being unstable.
Additionally, the disclosure further provides a pixel cell used to the pixel cell driving circuit which adds a charging line to provide the charging signal and charge the storage capacitor when the switch thin film transistor is turned off, so as to avoid the flicker due to the electrical charge leakage which results in the storage capacitor voltage being unstable and to enhance the stability of the pixel cell.
Additionally, the disclosure further provides a pixel cell driving method used to the pixel cell driving circuit which provides the charging signal to charge the storage capacitor when the switch thin film transistor is turned off, so as to avoid the flicker due to the electrical charge leakage which results in the storage capacitor voltage being unstable and to enhance the display quality.
A pixel cell driving circuit is used to drive an organic electric lighting component. The pixel cell driving circuit includes a first thin film transistor, a second thin film transistor, a third thin film transistor and a storage capacitor; the first thin film transistor is turned on or turned off under a control of a first scanning signal, when the first thin film transistor is turned on; the storage capacitor is charged by a data signal; the second thin film transistor is turned on under an action of the storage capacitor and drives an organic light-emitting diode (OLED) to emit light; the third thin film transistor is turned on under a control of the second scanning signal when the first thin film transistor is turned off, and the storage capacitor is charged by a charging signal.
In one embodiment, the first thin film transistor includes a first gate, a first source and a first drain; the second thin film transistor includes a second gate, a second source and a second drain; the third thin film transistor includes a third gate, a third source and a third drain; the first gate is used to receive the first scanning signal; the first source is used to receive the data signal; the first drain is connected to the second gate, the third drain and one terminal of the storage capacitor; the other terminal of the storage capacitor is connected to the second drain, the second source is connected to one terminal of the OLED, and the other terminal of the OLED is connected to a ground; the third drain is connected to the second gate and the terminal of the storage capacitor; the third gate is used to receive the second scanning signal; the third source is used to receive the charging signal.
In one embodiment, the pixel cell driving circuit further includes a power source; the power source is connected to the second drain and is used to provide a driving voltage to the pixel cell driving circuit.
In one embodiment, the first scanning signal and the data signal are synchronized with each other, the second scanning signal and the charging signal are synchronized with each other; each of a period of the first scanning signal, the second scanning signal, the data signal and the charging signal is one frame period of the pixel cell.
In one embodiment, the second scanning signal relative to the first scanning signal has a first delay time, and the charging signal relative to the data signal has a second delay time.
In one embodiment, the first delay time equals to the second delay time, and the first delay time and the second delay time are less than or equal to ¾ frame period of the pixel cell.
A pixel cell includes a first scanning line and a data line, wherein the pixel cell further includes a second scanning line, a charging line, and a pixel cell driving circuit; the pixel cell driving circuit includes a first thin film transistor, a second thin film transistor, a third thin film transistor and a storage capacitor; the first thin film transistor is turned on or turned off under a control of a first scanning signal, when the first thin film transistor is turned on; the storage capacitor is charged by a data signal; the second thin film transistor is turned on under an action of the storage capacitor and drives an organic light-emitting diode (OLED) to emit light; the third thin film transistor is turned on under a control of the second scanning signal when the first thin film transistor is turned off, and the storage capacitor is charged by a charging signal.
In one embodiment, the first thin film transistor includes a first gate, a first source and a first drain; the second thin film transistor includes a second gate, a second source and a second drain; the third thin film transistor includes a third gate, a third source and a third drain; the first gate is connected to the first scanning line; the first source is connected to the data line; the first drain is connected to the second gate, the third drain and one terminal of the storage capacitor; the other terminal of the storage capacitor is connected to the second drain; the second source is connected to one terminal of the OLED; the other terminal of the OLED is connected to a ground; the third drain is connected to the second gate and the terminal of the storage capacitor; the third gate is connected to the second scanning line; the third source is connected to the charging line.
In one embodiment, the first scanning line is used to provide a first scanning signal, the second scanning line is used to provide a second scanning signal, the data line is used to provide data signal, the charging line is used to provide a charging signal, the second scanning signal relative to the first scanning signal has a first delay time, and the charging signal relative to the data signal has a second delay time.
In one embodiment, the first scanning signal and the data signal are synchronized with each other, the second scanning signal and the charging signal are synchronized each other, each of a period of the first scanning signal, the second scanning signal, and the data signal and the charging signal is one frame period of the pixel cell.
In one embodiment, the first delay time equals to the second delay time, and the first delay time and the second delay time are less than or equal to ¾ frame period of the pixel cell.
In one embodiment, the pixel cell driving circuit further includes a power source; the power source is connected to the second drain and is used to provide a driving voltage to the pixel cell driving circuit.
A pixel cell driving method includes:
providing a first scanning signal, a second scanning signal, a data signal and a charging signal;
the first thin film transistor is turned on under an action of the first scanning signal, such that the data signal charges the storage capacitor through the first thin film transistor;
when a voltage of one terminal of the storage capacitor connected to the second gate of the second thin film transistor achieves to a turn-on voltage of the second thin film transistor, the second thin film transistor is turned on, so as to drive an organic light-emitting diode (OLED) to emit light;
the first thin film transistor is turned off under an action of the first scanning signal, the storage capacitor continues to maintain the second thin film transistor turned on, so as to drive the OLED to emit light;
after the first thin film transistor is turned off for a predetermined time, the third thin film transistor is turned on under an action of the second scanning signal, such that the charging signal charges the storage capacitor through the third thin film transistor.
In one embodiment, the first scanning signal and the data signal are synchronized with each other; the second scanning signal and the charging signal are synchronized with each other; each of a period of the first scanning signal, the second scanning signal, the data signal and the charging signal is one frame period of the pixel cell.
In one embodiment, the second scanning signal relative to the first scanning signal has a first delay time, and the charging signal relative to the data signal has a second delay time.
In one embodiment, the first delay time equals to the second delay time, and the first delay time and the second delay time are less than or equal to ¾ frame period of the pixel cell.
In one embodiment, the predetermined time equals to the first delay time or the second delay time.
The pixel cell driving circuit of the disclosure provides the charging signal delayed for ¾ frame period relative to the data signal and the second scanning signal delayed for ¾ frame period relative to the first scanning signal to control the third thin film transistor to turn on or turn off, and when the first thin film transistor is turned off, the second scanning signal controls the third thin film transistor to turn on, such that the charging signal charges the storage capacitor through the third thin film transistor to avoid the flicker due to the electrical charge leakage which results in the storage capacitor voltage being unstable during the first thin film transistor is turned off.
The above and other exemplary aspects, features and advantages of certain exemplary embodiments of the present disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
The following description with reference to the accompanying drawings is provided to clearly and completely explain the exemplary embodiments of the disclosure. It is apparent that the following embodiments are merely some embodiments of the disclosure rather than all embodiments of the disclosure. According to the embodiments in the disclosure, all the other embodiments attainable by those skilled in the art without creative endeavor belong to the protection scope of the disclosure.
Refer to
The first thin film transistor T1 includes a first gate g1, a first source s1 and a first drain d1. The second thin film transistor T2 includes a second gate g2, a second source s2 and a second drain d2. The third thin film transistor T3 includes a third gate g3, a third source s3 and a third drain d3. The first gate g1 is used to receive the first scanning signal Vs1. The first source s1 is used to receive the data signal Vdata. The first drain d1 is connected to the second gate g2, the third drain d3 and one terminal of the storage capacitor Cs, the other terminal of the storage capacitor Cs is connected to the power source VDD and the second drain d2, i.e. the storage capacitor Cs is connected between the second gate g2 and the second drain d2. The second source s2 is connected to one terminal of the OLED; the other terminal of the OLED is connected to a ground. The third drain d3 is connected to the second gate g2 and the terminal of the storage capacitor Cs, and the third gate g3 is used to receive the second scanning signal Vs2. The third source s3 is used to receive the charging signal Vc.
Refer to
Refer to
In this embodiment, the first scanning signal Vs1 and the data signal Vdata are synchronized with each other, the second scanning signal Vs2 and the charging signal Vc are synchronized with each other. Namely, the first delay time equals to the second delay time, and both of the first delay time and the second delay time are set less than or equal to ¾ frame period.
The operation principle of the pixel cell driving circuit 30 is further illustrated in connection with
When the first scanning signal Vs1 is high level, the first thin film transistor T1 is turned on under the action of the first scanning signal Vs1, the data signal Vdata charges the storage capacitor Cs through the first thin film transistor T1. The third thin film transistor T3 is turned off under the action of the second scanning signal Vs2. When a voltage of one terminal of the storage capacitor Cs connected to the second gate g2 achieves to a turn-on voltage of the second thin film transistor T2, the second thin film transistor T2 is turned on, so as to drive the OLED to emit light.
When the first scanning signal Vs1 is low level, the first thin film transistor T1 is turned off under the action of the first scanning signal Vs1. The second thin film transistor T2 is turned on under the action of the storage capacitor Cs to drive the OLED for emitting light. Since the leakage current exists in the first thin film transistor T1, the electrical charge on the storage capacitor Cs leaks to the data line along the first thin film transistor T1 when the first scanning signal Vs1 is low level, such that the voltage of the storage capacitor Cs is dropped gradually. In order to avoid the OLED flicker due to the voltage of the storage capacitor Cs dropped excessively, after the first thin film transistor T1 is turned off for a predetermined time, the third thin film transistor T3 is turned on under the action of the second scanning signal Vs2, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3, thereby ensuring the storage capacitor Cs being able to provide sufficient voltage to drive the OLED to continue emitting light stably until the first scanning signal Vs1 changes to high level, and then repeats the above process. In one embodiment, the predetermined time is less than or equals to ¾ frame period of the pixel cell.
The pixel cell driving circuit 30 provides the charging signal Vc delayed for ¾ frame period relative to the data signal Vdata and the second scanning signal Vs2 delayed for ¾ frame period relative to the first scanning signal Vs1 to control the third thin film transistor T3 to turn on or turn off, and when the first scanning signal Vs1 is low level, the second scanning signal Vs2 controls the third thin film transistor T3 to turn on, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3 to avoid the flicker due to the electrical charge leakage which results in the storage capacitor Cs voltage being unstable when the first thin film transistor T1 is turned off.
Refer to
The first thin film transistor T1 includes a first gate g1, a first source s1 and a first drain d1. The second thin film transistor T2 includes a second gate g2, a second source s2 and a second drain d2. The third thin film transistor T3 includes a third gate g3, a third source s3 and a third drain d3. The first gate g1 is connected to the first scanning line 61. The first source s1 is connected to the data line 65. The first drain d1 is connected to the second gate g2, the third drain d3 and one terminal of the storage capacitor Cs. The other terminal of the storage capacitor Cs is connected to the power source VDD and the second drain d2, i.e. the storage capacitor Cs is connected between the second drain d2 and the second gate g2. The second source s2 is connected to one terminal of the OLED, and the other terminal of the OLED is connected to a ground. The third drain d3 is connected to the second gate g2 and the terminal of the storage capacitor Cs, the third gate g3 is connected to the second scanning line 63, and the third source s3 is connected to the charging line 67.
In one embodiment, the first scanning signal Vs1 and the second scanning signal Vs2 are a periodical signal with the same waveform, and the second scanning signal Vs2 relative to the first scanning signal Vs1 has a first delay time. In this embodiment, a period of the first scanning signal Vs1 and the second scanning signal Vs2 is one frame period of the pixel cell 60 and has the same peak value V1. The first delay time is ¾ frame period. It is understood that the first delay time is further less than ¾ frame period, such as ⅔ frame period, ⅗ frame period, ½ frame period and so on.
In one embodiment, the data signal Vdata and the charging signal Vc are a periodical signal with the same waveform, and the charging signal Vc relative to the data signal Vdata has a second delay time. In this embodiment, a period of the data signal Vdata and charging signal Vc is one frame period of the pixel cell 60 and has the same peak value V2. The second delay time is ¾ frame period. It is understood that the second delay time is further less than ¾ frame period, such as ⅔ frame period, ⅗ frame period, ½ frame period and so on.
In this embodiment, the first scanning signal Vs1 and the data signal Vdata are synchronized with each other, the second scanning signal Vs2 and the charging signal Vc are synchronized with each other. Namely, the first delay time equals to the second delay time, and both of the first delay time and the second delay time are set less than or equal to ¾ frame period.
When the first scanning signal Vs1 is high level, the first thin film transistor T1 is turned on under the action of the first scanning signal Vs1. The data signal Vdata charges the storage capacitor Cs through the first thin film transistor T1. The third thin film transistor T3 is turned off under the action of the second scanning signal Vs2. When a voltage of one terminal of the storage capacitor Cs connected to the second gate g2 achieves to a turn-on voltage of the second thin film transistor T2, the second thin film transistor T2 is turned on, so as to drive the OLED to emit light.
When the first scanning signal Vs1 is low level, the first thin film transistor T1 is turned off under the action of the first scanning signal Vs1. The second thin film transistor T2 is turned on under the action of the storage capacitor Cs to drive the OLED for emitting light. Since the leakage current exists in the first thin film transistor T1, the electrical charge on the storage capacitor Cs leaks to the data line along the first thin film transistor T1 when the first scanning signal Vs1 is low level, such that the voltage of the storage capacitor Cs is dropped gradually. In order to avoid the OLED flicker due to the voltage of the storage capacitor Cs dropped excessively, after the first thin film transistor T1 is turned off for a predetermined time, the third thin film transistor T3 is turned on under the action of the second scanning signal Vs2, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3, thereby ensuring the storage capacitor Cs able to provide sufficient voltage to drive the OLED to continue emitting light stably until the first scanning signal Vs1 changes to high level, and then repeats the above process. In one embodiment, the predetermined time is less than or equals to ¾ frame period of the pixel cell.
The pixel cell 60 adds the charging line 67 to provide the charging signal Vc, sets the charging signal Vc as the data signal Vdata delayed for ¾ frame period and provides the second scanning signal Vs2 delayed fir ¾ frame period relative to the first scanning signal Vs1 to control the third thin film transistor T3 to turn on or turn off, and when the first scanning signal Vs1 is low level, the second scanning signal Vs2 controls the third thin film transistor T3 to turn on, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3 to avoid the flicker due to the electrical charge leakage which results in the storage capacitor Cs voltage being unstable when the first thin film transistor T1 is turned off.
Refer to
Step S1: a first scanning signal, a second scanning signal, a data signal and a charging signal are provided.
Specifically, the first scanning signal Vs1 is provided by the first scanning line 61, the second scanning signal Vs2 is provided by the second scanning line 63, the data signal Vdata is provided by the data line 65, and the charging signal Vc is provided by the charging line 67.
In one embodiment, the first scanning signal Vs1 and the second scanning signal Vs2 are a periodical signal with the same waveform, and the second scanning signal Vs2 relative to the first scanning signal Vs1 has a first delay time. In this embodiment, a period of the first scanning signal Vs1 and the second scanning signal Vs2 is one frame period and has the same peak value V1, the first delay time is ¾ frame period. It is understood that the first delay time further less than ¾ frame period, such as ⅔ frame period, ⅗ frame period, ½ frame period and so on.
In one embodiment, the data signal Vdata and the charging signal Vc are a periodical signal with the same waveform, and the charging signal Vc relative to the data signal Vdata has a second delay time. In this embodiment, a period of the data signal Vdata and charging signal Vc is one frame period and has the same peak value V2, the second delay time is ¾ frame period. It is understood that the second delay time is further less than ¾ frame period, such as ⅔ frame period, ⅗ frame period, ½ frame period and so on.
In this embodiment, the first scanning signal Vs1 and the data signal Vdata are synchronized with each other, the second scanning signal Vs2 and the charging signal Vc are synchronized with each other. Namely, the first delay time equals to the second delay time, and both of the first delay time and the second delay time are set less than or equal to ¾ frame period.
Step S2: the first thin film transistor T1 is turned on under an action of the first scanning signal Vs1, such that the data signal Vdata charges the storage capacitor Cs through the first thin film transistor T1.
Specifically, when the first scanning signal Vs1 is high level, the first thin film transistor T1 is turned on under the action of the first scanning signal Vs1; meanwhile, the third thin film transistor T3 is turned off under the action of the second scanning signal Vs2. The data signal Vdata charges the storage capacitor Cs through the first thin film transistor T1.
Step S3: when a voltage of one terminal of the storage capacitor Cs connected to the second gate g2 of the second thin film transistor T2 achieves to a turn-on voltage of the second thin film transistor T2, the second thin film transistor T2 is turned on, so as to drive the OLED to emit light.
Step S4: the first thin film transistor T1 is turned off under the action of the first scanning signal Vs1, the storage capacitor Cs continues to maintain the second thin film transistor T2 to turn on, so as to drive the OLED to emit light.
Specifically, when the first scanning signal Vs1 is low level, the first thin film transistor T1 is turned off under the action of the first scanning signal Vs1. The second thin film transistor T2 is turned on under the action of the storage capacitor Cs to drive the OLED for emitting light. Since the leakage current exist in the first thin film transistor T1, the electrical charge on the storage capacitor Cs leaks to the data line along the first thin film transistor T1 when the first scanning signal Vs1 is low level, such that the voltage of the storage capacitor Cs is dropped gradually.
Step S5: after the first thin film transistor T1 is turned off for a predetermined time, the third thin film transistor T3 is turned on under the action of the second scanning signal Vs2, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3. In one embodiment, the predetermined time is less than or equals to ¾ frame period of the pixel cell.
Specifically, in order to avoid the OLED flicker due to the voltage of the storage capacitor Cs dropped excessively, after the first thin film transistor T1 is turned off for a predetermined time, the third thin film transistor T3 is turned on under the action of the second scanning signal Vs2, such that the charging signal Vc charges the storage capacitor Cs through the third thin film transistor T3, thereby ensuring the storage capacitor Cs to be able to provide enough voltage to drive the OLED to continue emitting light stable until the first scanning signal Vs1 changes to high level, and then repeats the above steps S1-S5.
Although the present disclosure is illustrated and described with reference to specific embodiments, those skilled in the art will understand that many variations and modifications are readily attainable without departing from the spirit and scope thereof as defined by the appended claims and their legal equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015 1 0229135 | May 2015 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2015/078746 | 5/12/2015 | WO | 00 |
| Number | Name | Date | Kind |
|---|---|---|---|
| 20150364082 | Gu | Dec 2015 | A1 |
| 20150371586 | Chen | Dec 2015 | A1 |
| 20160063924 | Oh | Mar 2016 | A1 |
| 20160232849 | Jeon | Aug 2016 | A1 |
| Number | Date | Country | |
|---|---|---|---|
| 20160329018 A1 | Nov 2016 | US |
