1. Field of the Invention
The present invention relates to a planar lightwave circuit including optical waveguides formed on a planar substrate, and a method of producing the planar lightwave circuit.
2. Discussion of the Background Art
Silica based optical waveguides have polarization dependence attributable to stress birefringence, therefore, etching (over-etching) is performed deeply up to below the optical waveguides such that the stress birefringence is removed, whereby the polarization dependence is remedied (see Patent Literature 1, for instance).
However, stress birefringence of optical waveguides depends on the density of their pattern. For example, a sparse pattern like Mach-Zehnder Interferometer (MZI) and a dense pattern like Arrayed-Waveguide Grating (AWG) are different from each other in stress birefringence. Therefore, in a case of a planar lightwave circuit including a plurality of interferometers on one substrate, their stress birefringence depends on circuits, so that, it is difficult to simultaneously make all of the interferometers independent from polarization by over-etching.
Therefore, an object of the present invention is to provide a planar lightwave circuit that can reduce differences in stress birefringence among circuits, and simultaneously make all of interferometers independent from polarization by over-etching, and a method of producing the planar lightwave circuit.
In order to achieve the object described above, in the present invention, dummy patterns are provided on both sides of each of optical waveguides having a low optical waveguide density, such that differences in stress birefringence according to differences in optical waveguide density are remedied.
Specifically, a planar lightwave circuit according to the present invention includes: at least two interferometers each of which is composed of a plurality of optical waveguides; dummy patterns that are disposed on both sides of each of the optical waveguides of the interferometer, having an optical waveguide density lower than the highest optical waveguide density, of the interferometers.
If the dummy patterns are provided on both sides of each of the optical waveguides, it is possible to change the stress birefringence. Therefore, the present invention can provide a planar light circuit that can reduce differences in stress birefringence among circuits, and simultaneously make all of the interferometers independent from polarization by over-etching, by providing the dummy patterns on both sides of each of optical waveguides having a low optical waveguide density.
In the planar lightwave circuit according to the present invention, there is a characteristic that the dummy patterns are the same material as the optical waveguides of the interferometers. In optical waveguide forming processes, the dummy patterns can be also formed, therefore, a production cost can be reduced.
In the planar lightwave circuit according to the present invention, the dummy patterns may have substantially the same optical waveguide density as the interferometer having the highest optical waveguide density.
A method of producing a planar lightwave circuit according to the present invention includes: a film forming process of sequentially forming an undercladding layer and a core layer on a substrate; and after the film forming process, an etching process of etching the core layer except for portions to be optical waveguides and portions to be dummy patterns to be disposed on both side of each of the optical waveguides, and removing portions of the undercladding layer, below the portions of the core layer removed by the etching, in a depth direction.
In the etching process of forming the optical waveguides, it is possible to provide the dummy patterns on both sides of each of optical waveguides having a low optical waveguide density. Therefore, the present invention can provide a method of producing the planar lightwave circuit that can reduce differences in stress birefringence among circuits, and simultaneously make all of the interferometers independent from polarization by over-etching.
The present invention can provide a planar lightwave circuit and a method of producing the planar lightwave circuit that can reduce differences in stress birefringence among circuits, and simultaneously make all of interferometers independent from polarization by over-etching.
Embodiments of the present invention will be described with reference to the accompanying drawings. The embodiments described below are examples of the present invention, and the present invention is not limited to the following embodiments. Further, throughput the present specification and the drawings, components having the same reference numeral are identical to each other.
A planar lightwave circuit of the present embodiment includes at least two interferometers each of which includes a plurality of optical waveguides, and dummy patterns that is disposed on both sides of each of the optical waveguides of each interferometer, having an optical waveguide density lower than the highest optical waveguide density, of the at least two interferometers.
The optical waveguide density of the interferometer A2 is lower than the optical waveguide density of the interferometer A1. For this reason, the planar lightwave circuit 101 includes dummy patterns 17 on both sides of each of the optical waveguides 13 of the interferometer A2. The dummy patterns 17 are the same material as the optical waveguides 13 of the interferometer A2. Like in the interferometer A2 of
A method of producing the planar lightwave circuit 101 includes a film forming process of sequentially forming an undercladding layer and a core layer on a substrate, and after the film forming process, an etching process of etching the core layer except for portions to be optical waveguides and portions to be dummy patterns to be disposed on both side of each of the optical waveguides, and removing portions of the undercladding layer, below the portions of the core layer removed by the etching, in a depth direction.
Next, the etching process will be described. A resist pattern 54 of an optical waveguide pattern and a dummy pattern is formed by a photolithographic technique (
After the etching process is completed, the resist pattern 54 is removed, and an overcladding layer 55 primarily containing SiO2 is formed (
In the planar lightwave circuit 101 created by the above-mentioned production method, the size of a cross section of a core is 4.5 μm×4.5 μm, a relative refractive index is 1.5%, and the ridges of the undercladding are 4.0 μm in height. Further, in the interferometer A1 (AWG), the optical waveguides 13 are disposed at intervals of 13.7 μm on the inside of the array, and at intervals of 8.1 μm on the outside of the array. Furthermore, in the interferometer A2 (MZI), the interval of the optical waveguides (the distance between two arms) is up to 1500 μm. The dummy patterns 17 are long from one to the other coupler of the MZI, and the widths of the dummy patterns 17 are set to 500 μm. In a case where each dummy pattern 17 is composed of a plurality of arrayed optical waveguides, the intervals of these optical waveguides are set to about the intervals (8.1 μm to 13.7 μm) between the optical waveguides 13.
The polarization dependence of the planar lightwave circuit 101 created as described above will be compared with that of a planar lightwave circuit 100 with no dummy patterns according to the related art.
In
The above is an example of the present embodiment, and even in a case of a combination of a variable optical attenuator (VOA) and an AWG, and a case where a planar lightwave circuit has three or more interferometers, if the polarization dependence of each of interferometers except for an interferometer having the highest optical waveguide density is adjusted by forming dummy patterns with a gap G according to the optical waveguide density of the corresponding interferometer, it is possible to simultaneously make all of the interferometers independent from polarization.
Number | Date | Country | Kind |
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2009-289995 | Dec 2009 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2010/072569 | 12/15/2010 | WO | 00 | 6/11/2012 |