1. Field of the Invention
The present invention relates to a field emitter, and more particularly to a cathode plate structure formed on a common plane.
2. Description of Prior Art
In recent years, flat panel display comes with the thin and light features, and its resolution and brightness are even better than those of traditional televisions, and thus flat panel displays are used extensively in the applications of different display sizes including the flat display panels as small as those for mobile phones or as large as those for outdoor billboards, and the applications of flat panel displays become increasingly popular in the market.
Various different types of flat panel displays are introduced constantly to the market, and liquid crystal display (LCD), plasma display panel (PDP), organic light emitting diode display (OLED) and field emission display (FED), particularly the field emission display (FED) become the mainstreams of flat panel displays. The principle of the field emission display (FED) primarily bombards an electron beam produced by an electron emission source of a cathode onto a fluorescent layer to produce light.
In general, a conventional field emission display of a triode structure includes an anode plate, a cathode plate, and a gate electrode layer between the anode and cathode plates, wherein the gate electrode layer provides an electric potential to attract electrons produced by the cathode plate, and the anode conductive layer provides a high potential to accelerate the kinetic energy of electrons and bombard electrons onto the anode plate to produce light.
Although the conventional structure provides a normal light emission for the field emission display, the gate electrode layer is designed and disposed directly between the cathode plate and the anode plate and proximate to the emitter of the cathode plate, and thus causing a more complicated manufacturing procedure of the cathode plate and incurring a higher manufacturing cost. To lower the cost and overcome the shortcomings of the aforementioned structure, another conventional cathode structure disposed on a common plane of the emitter and the gate electrode as disclosed in U.S. Pat. No. 6,891,320 was developed, and such patent made changes to the cathode structure that adopts a stacking method, and thus not only simplifying the manufacturing procedure, but also lowering the manufacturing cost.
The aforementioned design of forming the emitter and the gate electrode on a common plane structure of the cathode substrate has the advantages of lowering the cost and simplifying the manufacturing procedure, but it also affects the electric field of the electrons horizontally attracted from the emitter to the gate electrode. Since the vector of the electric field at the gate electrode surface affects the quantity and direction of the field emission electrons. With the same condition of electric potential, the larger the interval between the emitter and the gate electrode, the smaller is the intensity of the surface field of the emitter, and thus the efficiency of producing electrons by the emitter is reduced and the light emitting effect of the field emitter is affected directly.
Although the interval between the emitter and the gate electrode can be reduced to less than several microns (μm) by semiconductor fabrication processes, yet a high cost is incurred. Under the same condition of electric potential, the interval between the emitter and the gate electrode is too small, and the two electric fields interfere with each other, so that a portion of the free electrons discharged from the emitter are attracted by the gate electrode and cannot be accelerated to the anode, but the free electrons are moved towards the gate electrode instead, and thus causing an electric leak. If a thick film process is adopted, the manufacturing cost can be lowered, but the interval between the emitter and the gate electrode must be maintained above tens of microns (μm) due to the accuracy of the printed circuit board, or else a deformation caused by the planarity of the emitter and the gate electrode or the sintered material will result, and the emitter and the gate electrode will not function. To compensate the excessively large interval formed between the emitter and the gate electrode by the foregoing process, it is necessary to increase the electric potential of the anode plate to obtain a larger electric field of the anode plate with respect to the cathode plate, and thus regardless of which manufacturing process is adopted, there is a drawback of using the common plane structure of the cathode plate. The prior art definitely requires further improvements and feasible solutions.
In view of the foregoing shortcomings of the prior art, the inventor of the present invention based on years of experience in the related industry to conduct experiments and modifications, and finally developed a plane emissive cathode structure of a field emission display in accordance with the present invention to overcome the shortcomings of the prior art.
Therefore, it is a primary objective of the present invention to provide a plane emissive cathode structure of a field emission display that changes the electric field distribution by a dielectric layer, and the dielectric layer is disposed in an interval formed by corresponding separated emitter layer and gate electrode layer on a common plane for changing the electric field distributions of the emitter layer and the gate electrode layer. Since the common plane structure can be formed directly on a cathode substrate, the manufacturing cost can be lowered.
To achieve the foregoing objective, the present invention provides a plane emissive cathode structure of a field emission display, and the cathode plate includes a cathode substrate and a plurality of cathode units disposed on the cathode substrate.
The cathode unit includes an emitter layer, a gate electrode layer and a dielectric layer, wherein the emitter layer and the gate electrode layer are formed on a common plane of the cathode substrate and separated with an interval apart from each other, and the dielectric layer is disposed in an interval formed by the emitter layer and the gate electrode layer, but the dielectric layer is not connected to the interval formed by the emitter layer and the gate electrode layer to form a common plane structure of the cathode plate
The features of the invention believed to be novel are set forth with particularity in the appended claims. The invention itself however may be best understood by reference to the following detailed description of the invention, which describes certain exemplary embodiments of the invention, taken in conjunction with the accompanying drawings in which:
The technical characteristics, features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiments with reference to the accompanying drawings. The drawings are provided for reference and illustration only, but not intended for limiting the present invention.
Referring to
The dielectric layer 123 is formed in the interval 125 between the emitter layer 121 and the gate electrode layer 12, and the emitter layer 121 and the gate electrode layer 122 are disposed on a common plane of the cathode substrate 11. In the meantime, the dielectric layer 123 and its adjacent emitter layer 121 and gate electrode layer 122 maintains a predetermined interval from each other, and the dielectric layer 123 is not connected to the emitter layer 121 or the gate electrode layer 122, wherein the interval is maintained within a range from 5 μm to 15 μm, and the dielectric layer 123 of this preferred embodiment is made of a material containing glass such as a glass paste, and the material is an insulator having a dielectric constant equal to or greater than 7, and the thickness of the dielectric layer 123 is 0.5 time to 1.5 times of the thickness of the emitter layer 121. In this preferred embodiment as shown in the figure, the thickness of the dielectric layer 123 is greater than the thickness of the emitter layer 121 and the gate electrode layer 122, or the thickness of the dielectric layer 123 is smaller than the thickness of the emitter layer 121 and the gate electrode layer 122 as shown in
Referring to
Referring to
The present invention is illustrated with reference to the preferred embodiment and not intended to limit the patent scope of the present invention. Various substitutions and modifications have suggested in the foregoing description, and other will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.
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Number | Date | Country | |
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20080297025 A1 | Dec 2008 | US |