The present invention relates to a plasma display device and a power module, and more particularly to a power module which integrates output transistors for driving a plasma display panel (PDP), and a plasma display device comprising this power module.
With the recent increase in the size of display devices, demands are being made for a decrease in the thickness of display devices, and various types of flat display devices have been proposed. For example, a matrix panel which displays a digital signal as is, or in other words a gas-discharge panel such as a PDP, and matrix panels such as a DMD (Digital Micromirror Device), an EL display element, a fluorescent display tube, and a liquid crystal display element have been proposed. Of these flat display devices, the gas-discharge panel has entered into practical use as a display device for a large-screen, direct view HDTV (high definition television) for reasons such as: manufacturing is simple, and therefore the screen can be enlarged easily; the gas-discharge panel is self-luminous, and therefore the display quality is high; and the response speed is high.
In a plasma display device, each field (frame) has a plurality of light-emitting blocks (subfields: SF) constituted by a plurality of sustain discharge pulses, and halftones are displayed in accordance with the combination of subfields. The power consumption of the plasma display device depends on the number of light-emitting pulses (sustain discharge pulses, or sustain pulses) contributing to the light emission, and in recent years, applying a power module which integrates power devices for controlling the sustain pulses to the plasma display device has been considered. Accordingly, it has become desirable to provide a power module in which thermal stress can be reduced, enabling an increase in reliability, and a plasma display device comprising such a power module.
Note that a conventional plasma display device and power module, as well as the problems thereof, will be described in detail below with reference to the drawings.
An object of the present invention is to provide a plasma display device which is capable of reducing thermal stress in a power module, which is a problem encountered during use of the power module, and thereby extending the life of the power module and reducing power consumption. A further object of the present invention is to provide a power module in which thermal stress can be reduced, enabling an improvement in reliability.
A first aspect of the present invention provides a plasma display device comprising a power module having a plurality of power devices, and temperature detecting means installed in the power module. The temperature of the power module is controlled by feeding temperature information detected by the temperature detecting means back to input signal control means.
A second aspect of the present invention provides a power module for driving a plasma display panel in accordance with a signal from input signal control means, comprising a plurality of power devices for generating a drive signal for the plasma display panel, and temperature detecting means for detecting the temperature of the power module. The temperature of the power module is controlled by feeding temperature information detected by the temperature detecting means back to the input signal control means.
According to the plasma display device of the present invention, thermal stress in the power module, which is a problem encountered during use of the power module, is reduced, and hence the life of the power module can be increased and power consumption can be reduced. According to the power module of the present invention, thermal stress can be reduced, enabling an improvement in reliability.
The present invention will be described below with reference to the attached drawings, in which:
Before describing embodiments of the plasma display device and power module according to the present invention, a conventional plasma display device and a conventional power module of the background art, and the problems related thereto, will be described in detail with reference to the attached drawings (FIGS. 1 to 3).
A plasma display device which detects the temperature of a PDP and each driver in order to compensate the display characteristic and prevent heating has been proposed in the prior art (see Japanese Unexamined Patent Application Publication H9-006283, for example).
As shown in
The plasma display device S1 further comprises a temperature detector 8 which detects the temperature of the Y common driver 7 and outputs a detection signal STY, a panel heating device 9which heats the PDP 1, a temperature detector 10 which detects the temperature of the PDP 1 and outputs a detection signal STP, the control circuit 2, which controls driving of the PDP 1 on the basis of a predetermined signal (a dot clock CLK, display data DATA, a vertical synchronizing signal VSYNC, a horizontal synchronizing signal HSYNC, and so on) and control of a micro-computer 90, a voltage conversion portion 40 which converts a high voltage input from a drive high-voltage input portion INV into a voltage for each of the pulses applied to the PDP 1, and an EPROM (Erasable and Programmable Read Only Memory) 50 having a drive waveform area 50A, which stores the waveform of each of the pulses applied to the PDP 1 in advance and outputs the waveform of the desired pulse, and a sustain pulse number setting area 50B.
The plasma display device S, further comprises an in-device ambient temperature detector 60 which detects the interior temperature of the device, a control circuit 71 which controls the display of an LED 70 for issuing warnings, a control circuit 81 which controls the operation of an air cooling device 80, a relay control portion 91 which prohibits the application of high voltage to the voltage conversion portion 40 and control circuit 2, a power consumption detector 92 which detects the power consumption of the entire device, and the micro-computer 90 which controls each portion of the plasma display device. Note that in this constitution, high voltage power for driving each driver is applied to each driver together with the control signals SA, SY, SYC, and SX. Further, the display data DATA are input from the outside through a display data input portion IN.
The control circuit 2 comprises a display data control portion 11 which time-divides data corresponding to a single frame (field) of the display data DATA into a plurality of subfield data in accordance with control of the dot clock CLK, display data DATA, and micro-computer 90, and outputs the control signal SA based on these subfield data, and a panel drive control portion 12 which outputs the control signals SX, SYS, and SYC in accordance with control of the vertical synchronizing signal VSYNC, horizontal synchronizing signal HSYNC, and the micro-computer 90. Here, the display data control portion 11 and panel drive control portion 12 exchange data required by each other.
The display data control portion 11 comprises frame memories 20, 22 which temporarily store the input display data DATA frame by frame, and a subtractor 21 which is controlled by the micro-computer 90 to correct the number of gray levels in the display data DATA.
The panel drive control portion 12 comprises a scan driver control portion 30 which outputs the control signal SYS on the basis of a scan pulse PAY included in the subfield data that are corrected by the display data control portion 11, the vertical synchronizing signal VSYNC, and the horizontal synchronizing signal HSYNC, and a shared driver control portion 31 which outputs the control signals SYC and SX on the basis of the number of sustain pulses PXS and PYS included in the subfield data that are corrected by the display data control portion 11, the vertical synchronizing signal VSYNC, and the horizontal synchronizing signal HSYNC.
The voltage conversion portion 40 comprises a Va power source portion 41 which generates a high voltage that is applied to the address electrodes A1 to AM in order to generate a write pulse PAW and an address pulse PAA, on the basis of a high voltage that is applied from an external high voltage generating device (not shown) via the drive high pressure input portion INV, a VW power source portion 42 which generates a high voltage that is applied to the X electrodes X1 to XN in order to generate a write pulse PXW, a VSC power source portion 43 which generates a high voltage that is applied to the Y electrodes Y1 to YN for the purpose of a main address discharge (wall charge storage discharge) during an address period, a Vy power source portion 44 which generates a high voltage that is applied to the Y electrodes Y1 to YN in order to generate the scan pulse PAY during the address period, and a VX power source portion 45 which generates high voltage power (an X address voltage VX) that is applied to the X electrodes X1 to XN for the purpose of the main address discharge (wall charge storage discharge) during the address period.
The micro-computer 90 is connected to a reference voltage output portion OUT for a sustain discharge voltage (sustain pulse voltage), and thus controls the external high voltage generating device (not shown) for generating the sustain discharge voltage, whereby the drive high voltage applied from the drive high voltage input portion INV is controlled and the sustain discharge voltage is controlled.
Further, a power electronic circuit device which is capable of realizing an increase in output current without lowering the safety and increasing the structural complexity of a semiconductor switching element used in a motor control inverter circuit or the like has been proposed in the background art (see Japanese Unexamined Patent Application Publication H11-262241, for example) Japanese Unexamined Patent Application Publication H11-262241 discloses an IGBT module having a power device (IGBT: Insulated Gate Bipolar Transistor) and a temperature sensor, and describes a three-phase inverter circuit installed with six temperature sensors. Moreover, Japanese Unexamined Patent Application Publication H11-262241 discloses a power electronic circuit device which is designed to perform current limitation by controlling the rotation speed of a compressor (air-conditioning motor) to ensure that an element-vicinity temperature, detected by a temperature sensor provided in the vicinity of an IGBT chip, and a junction temperature, estimated on the basis of the average output current of the three-phase inverter circuit, do not exceed a maximum allowable temperature.
As shown in
As shown in
As described above, a device which detects the temperature of the PDP and each driver to compensate the display characteristic and prevent heating has been proposed in the prior art as a plasma display device. However, in this plasma display device, for example, the power device 101 used to perform the sustain discharge is not modularized, and instead it has been proposed that the plurality of power devices 101 be mounted directly on a radiator, and that the temperature of the power device 101 be detected by the temperature detection element 102 provided in the vicinity of each power device 101.
The plasma display device disclosed in the aforementioned Japanese Unexamined Patent Application Publication H9-006283 compensates the display characteristic and prevents heating by detecting the temperature of the PDP and drivers, but does not achieve an increase in the life of a power module integrating a plurality of power devices, and a reduction in power consumption.
Further, the aforementioned Japanese Unexamined Patent Application Publication H11-262241 discloses a power electronic circuit device in which a power module is constituted by fixing to a metal block a semiconductor chip formed with a power interrupting semiconductor switching element used in a motor control inverter circuit or the like, and which limits the current of the semiconductor switching element on the basis of the element-vicinity temperature, detected by a temperature sensor provided in the vicinity of the semiconductor chip, and a quantity of state relating to the current of the semiconductor switching element. However, the power electronic circuit device of Japanese Unexamined Patent Application Publication H11-262241 is fundamentally different to a device for controlling a power module which integrates power devices in a plasma display device for performing display by means of a sustain discharge. Furthermore, the power electronic circuit device of Japanese Unexamined Patent Application Publication H11-262241 achieves an increase in the output current without lowering the element safety and increasing the structural complexity of the device, but does not achieve an increase in the life of a power module which integrates a plurality of power devices and a reduction in power consumption in a plasma display device.
Hence in a conventional plasma display device, for example, it is necessary to design the radiator of a power device used to perform a sustain discharge in consideration of the heat that is generated when the number of PDP sustain pulses is greatest, even in the case of a plasma display device for performing specific display which has a low display frequency. Moreover, in a conventional plasma display device, a power module which integrates a plurality of power devices is not used, and hence an increase in the life of the power module and a reduction in power consumption are not achieved.
Embodiments of the plasma display device and power module according to the present invention will now be described in detail with reference to the attached drawings.
As shown in
The power module 210 is constituted such that the power device 201, ceramic element 203, heat detecting element 202, and so on disposed on (wired to) the substrate 207 are sealed by the mold sealing resin 205. Here, as shown in
As shown in
Specifically, for example, when the temperature of the power module 210 reaches or exceeds a predetermined value (a solder surface prescribed temperature value To, for example), the output of the power module 210 is blocked.
The temperature detection circuit 222 is provided on the exterior of the power module 210, and comprises an operational amplifier circuit (op-amp) 2221, and resistances 2222 to 2224. One end of the thermistor 202 is connected to a reference potential power wire Vcc, and the other end is connected to the positive input terminal of the operational amplifier circuit 2221 and via the resistance 2222 to a low potential power line (GND). Note that the output of the operational amplifier circuit 2221 is fedback to the negative input terminal of the operational amplifier circuit via the resistance 2224, and connected to the low potential power line (GND) via the resistance 2223.
With the thermistor 202 and temperature detection circuit 222 (temperature detecting means) shown in
As is shown clearly in
When the power module temperature control processing begins, first, in a step S1, the temperature of the power module 210 is converted into the corresponding output voltage Vo by the power module 210 and temperature detection circuit 222 described above. The process then advances to a step S2, where the temperature increase saturation temperature Tc of the power module 210 is calculated from the voltage Vo in the input signal control circuit 221 (micro-computer 90). Here, calculation (conversion) of the temperature increase saturation temperature Tc of the power module from the voltage Vo is performed by converting the voltage Vo (the output of the temperature detecting means (temperature information)) into the temperature increase saturation temperature Tc of the power module using a conversion table stored in a storage device in advance, or by calculating the temperature increase saturation temperature Tc of the power module using a coefficient stored in the storage device in advance, for example. Note that semiconductor memory such as a PROM (Programmable Read Only Memory), for example, may be used as the storage device.
Next, in a step S3, the calculated temperature increase saturation temperature Tc of the power module is compared with the predetermined solder surface prescribed temperature value To to determine whether or not the former is lower than the latter. If it is determined in the step S3 that the temperature increase saturation temperature Tc of the power module 210 is lower than the solder surface prescribed temperature value To (Tc<To), the process returns to the step S1, and the same processing is repeated. If, on the other hand, it is determined in the step S3 that the temperature increase saturation temperature Tc of the power module 210 is equal to or greater than the solder surface prescribed temperature value To (Tc>To), the process advances to a step S4, where image quality adjustment is performed by reducing the number of sustain pulses of the PDP 1. More specifically, by reducing the number of sustain pulses, the amount of heat generated by the power devices is reduced, thereby lowering the temperature of the power module 210 and thus adjusting the image quality of the displayed image. The process then returns to the step S1.
In the process described above, the temperature of the power module 210 is lowered by reducing the number of sustain pulses of the PDP 1, but control to lower the temperature of the power module 210 can also be performed by reducing the voltage level of the sustain discharge of the PDP 1, or reducing the magnitude of the power source current used in the sustain discharge, for example.
As shown in
Note that when the power device unit 200 comprises a plurality of the power modules 210, 210, . . . , the temperature detection element 202 may be disposed in the upper portion of only the power module provided in the uppermost position. It is believed that the temperature of the power module disposed in the uppermost position rises by the greatest extent due to heat convection, and hence by detecting the temperature of the power module disposed in the uppermost position, all of the power modules can be controlled. Furthermore, by reducing the number of temperature detecting means (the temperature detection element, temperature detection circuit, and so on), the control operation can be simplified.
As can be seen clearly from a comparison of
First, in a case where full-screen black is displayed on the PDP 1 and power reduction processing is not performed, approximately 80 W of power, for example, are consumed when full-screen black display is applied to the PDP 1, and the temperature increase saturation temperature Tc of the power module increases over time, exceeding the solder surface prescribed temperature value To and rising toward the saturation temperature as shown by the curve L1 in
On the other hand, when the temperature of the power module 210 (the temperature increase saturation temperature Tc of the power module) rises beyond the solder surface prescribed temperature value To during application of the power reduction processing of this embodiment, control is performed to hold the temperature of the power module 210 at a fixed level, as shown by the curve L2 in
Hence in this embodiment, the temperature information that is detected by the temperature detecting means (temperature detection element 202) installed in the power module 210 is fed back to the input signal control circuit 221 (micro-computer 90), and when the temperature (Tc) of the power module 210 increases beyond a predetermined value (the solder surface prescribed temperature value To), the temperature Tc of the power module is controlled to a fixed level (To). Moreover, when this condition remains unchanged for the predetermined time period (T2), control is performed to block the output of the power module 210 and enter into the low power consumption mode (L3). In so doing, breakage of the power devices can be avoided, and power consumption can be reduced.
According to each embodiment of the present invention, breakage of the power devices can be avoided during abnormal heat generation, and by performing serial temperature monitoring, appropriate control can be applied in accordance with the temperature. Further, according to each embodiment of the present invention, thermal stress can be reduced, enabling an increase in the life of the power module, and as a result, the reliability of the plasma display device can be improved.
According to the present invention as described above, it is possible to provide a plasma display device which is capable of reducing thermal stress in a power module, which is a problem encountered during use of the power module, and thereby extending the life of the power module and reducing power consumption. Also according to the present invention, it is possible to provide a power module in which thermal stress can be reduced, enabling an improvement in reliability.
Number | Date | Country | Kind |
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2003-117082 | Apr 2003 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP03/15629 | 12/5/2003 | WO | 8/18/2006 |