This application claims priority to and the benefit of Korean Patent Application No. 10-2007-0077725 filed in the Korean Intellectual Property Office on Aug. 02, 2007, the entire content of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a plasma display device and its driving method.
2. Description of the Related Art
The plasma display device is a display device using a plasma display panel (PDP) that displays characters or images by using plasma generated by a gas discharge. The PDP includes a plurality of scan electrodes and a plurality of sustain electrodes extending in pairs in a row direction on a first substrate, and a plurality of address electrodes extending in a column direction on a second substrate facing the first substrate. In general, the plasma display device is driven (operated) by dividing a single frame into multiple sub-fields having respective luminance weight values. During a reset period of each subfield, cells at crossings of the electrodes are initialized through reset discharges. During an address period, scan pulses are selectively applied to the plurality of scan electrodes by using an integration circuit (IC). During a sustain period, in order to display an actual image, sustain pulses each alternately having a high level voltage and a low level voltage are applied to the scan electrodes that perform sustain discharges.
Generally, a reference voltage (e.g., 0V) is used as the low level voltage of the sustain pulses, and a negative voltage is used as a voltage of the scan pulses. Thus, a driving circuit that drives the scan electrodes includes a transistor for applying the low level voltage to the scan electrodes and a transistor for applying the negative voltage to the scan electrodes. When the negative voltage is applied to the scan electrodes, a current path is formed between a transistor for applying the low level voltage to the scan electrodes and a transistor for applying the negative voltage to the scan electrodes. Thus, a switch element (e.g., a transistor) for cutting off the current path is provided by using two transistors in a driving circuit that drives the scan electrodes. In this manner, extra transistors are used in the driving circuit, and the unit cost is undesirably increased.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention, and therefore, it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
The present invention has been made in an effort to provide a plasma display device and its driving method having advantages of reducing a cost of the driving circuit.
An exemplary embodiment of the present invention provides a plasma display device including a plasma display panel having a plurality of scan electrodes, a plurality of sustain electrodes, and a plurality of address electrodes. The plasma display panel is configured to be driven in a reset period, an address period, and a sustain period. A scan circuit is provided for driving the plurality of scan electrodes. The scan circuit includes a first input terminal, a second input terminal, and an output terminal. The output terminal is coupled to the scan electrodes and configured to provide a voltage of the first input terminal or a voltage of the second input terminal. A capacitor to be charged with a first voltage is provided and includes a first terminal coupled to the first input terminal of the scan circuit and a second terminal coupled to the second input terminal of the scan circuit. A first transistor is provided and coupled between the first terminal of the capacitor and a first power source for supplying a second voltage lower than the first voltage.
Another exemplary embodiment of the present invention provides a method for driving a plasma display device. The plasma display device includes a plasma display panel having a plurality of scan electrodes, a plurality of sustain electrodes, and a plurality of address electrodes. The plasma display also include a scan circuit for driving the plasma display panel in a reset period, an address period, and a sustain period. The scan circuit includes an output terminal coupled to the scan electrodes, a first input terminal, and a second input terminal. The output terminal of the scan circuit is configured to provide a voltage of the first input terminal or a voltage of the second input terminal. A capacitor is provided and have a first terminal coupled to the first input terminal and a second terminal coupled to the second input terminal. The method includes applying a reset voltage to the plurality of scan electrodes during the reset period; applying a scan voltage corresponding to a scan pulse to the plurality of scan electrodes through the second input terminal of the scan circuit during the address period; and applying a sustain voltage alternatively having a high level voltage and a low level voltage to the plurality of scan electrodes through the first input terminal of the scan circuit during the sustain period.
Yet another exemplary embodiment of the present invention provides a plasma display device including a plasma display panel having a plurality of scan electrodes, a plurality of sustain electrodes, and a plurality of address electrodes. The plasma display panel is configured to be driven in a reset period, an address period, and a sustain period. A first transistor is provided and has a first terminal coupled to the scan electrodes. A second transistor is provided and has a second terminal coupled to the scan electrodes. A capacitor is provided and configured to be charged with a capacitor voltage and have a third terminal coupled to a fourth terminal of the first transistor and a fifth terminal coupled to a sixth terminal of the second transistor. A sustain driver is provided and coupled to the fourth terminal of the first transistor and configured to supply sustain pulses each alternately having a high level voltage and a low level voltage to the scan electrodes.
In the following detailed description, only certain exemplary embodiments of the present invention have been shown and described, simply by way of illustration. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
Accordingly, the drawings and description are to be regarded as illustrative in nature and not restrictive. Like reference numerals designate like elements throughout the specification. When it is described that an element is connected to another element, the element may be directly connected to the other element or connected to the other element through a third element.
When it is described in the specification that a voltage is maintained, it should not be understood to strictly imply that the voltage is maintained exactly at a predetermined voltage. To the contrary, even if a voltage difference between two points varies, the voltage difference is expressed to be maintained at a predetermined voltage in the case that the variance is within a range allowed in design constraints or in the case that the variance is caused due to a parasitic component that is usually disregarded by a person of ordinary skill in the art. Because a threshold voltage of a semiconductor device (e.g., a transistor or a diode, etc.) is very low compared with a discharge voltage of a PDP, the threshold voltage can be considered as 0V and approximately processed. Thus, voltage applied to a node or an electrode, etc., by a power source includes voltage which has been changed due to the threshold voltage or a parasitic component, etc., from the voltage of the power source.
The plasma display device and its driving method according to the exemplary embodiment of the present invention will now be described in detail.
As shown in
The PDP 100 includes a plurality of address electrodes (hereinafter referred to as ‘A electrodes’) A1˜Am extending in a column direction on a first substrate (not shown), and a plurality of sustain electrodes (hereinafter referred to as ‘X electrodes’) X1˜Xn and a plurality of scan electrodes (hereinafter referred to as ‘Y electrodes’) Y1˜Yn extending in a row direction as pairs on a second substrate (not shown). In general, the X electrodes X1˜Xn are formed to correspond to respective Y electrodes Y1˜Yn, and the X electrodes X1˜Xn and the Y electrodes Y1˜Yn perform a display operation to display an image during a sustain period. The Y electrodes Y1˜Yn and the X electrodes X1˜Xn are disposed to be perpendicular to the A electrodes A1˜Am. Discharge spaces at crossings of the A electrodes A1˜Am and the X and Y electrodes X1˜Xn and Y1˜Yn form discharge cells 110. Such a structure of the PDP 100 is an exemplary embodiment, and a panel with a different structure applied with driving waveforms to be described hereinbelow can be also applied for the present invention.
The controller 200 receives a video signal from an exterior source and outputs an A electrode driving control signal, an X electrode driving control signal, and a Y electrode driving control signal. The controller 200 divides a single frame into a plurality of subfields and the PDP 100 is driven in these subfields.
The address electrode driver 300 applies a driving voltage to the plurality of A electrodes A1˜Am according to the A electrode driving control signal from the controller 200.
The scan electrode driver 400 applies a driving voltage to the plurality of Y electrodes Y1˜Yn according to the Y electrode driving control signal from the controller 200.
The sustain electrode driver 500 applies a driving voltage to the plurality of X electrodes X1˜Xn according to the X electrode driving control signal from the controller 200.
As shown in
During a falling period of the reset period, the sustain electrode driver 500 biases the X electrode to a voltage Ve, and the scan electrode driver 400 gradually reduces the voltage of the Y electrode from the voltage Vs to a voltage Vnf. In
Subsequently, in order to select light emitting cells during the address period, the scan electrode driver 400 applies scan pulses of a voltage VscL to the Y electrodes (Y) while the sustain electrode driver 500 maintains the voltage of the X electrodes (X) at a voltage Ve. In this case, the address electrode driver 300 applies address pulses of a voltage Va to the A electrodes (A) of cells 110 selected to be light emitting among the plurality of cells 110 at crossings of the Y electrodes (Y) and the X electrodes (X) to which the voltage VscL has been applied, and applies voltage 0V lower than the voltage Va to the A electrodes (A) that pass through non-light emitting cells. Then, address discharges occur between the A electrodes (A) to which the voltage Va has been applied and the Y electrodes (Y) to which the voltage VscL has been applied and between the Y electrodes (Y) to which the voltage VscL voltage has been applied and the X electrodes (X) to which the voltage Ve has been applied, forming negative (−) wall charges on the X and A electrodes (X and A). The scan electrode driver 400 applies a voltage VscH, higher than the voltage VscL, to the Y electrodes (Y) to which the voltage VscL has not been applied.
In detail, during the address period, the scan electrode driver 400 and the address electrode driver 300 apply the scan pulses to the Y electrode (Y1 shown in
Sequentially, during the sustain period, the scan electrode driver 400 applies the sustain pulses each alternately having a high level voltage (the voltage Vs shown in
As shown in
First, the scan circuit 411a includes an upper input terminal (A) and a lower input terminal (B). An output terminal (C) is connected with the Y electrode (Y). In order to select light-emitting cells during the address period, voltage at the upper input terminal (A) and voltage at the lower input terminal (B) are selectively applied to the 25 corresponding Y electrode (Y). In
A drain of the transistor Yrr, whose source is connected with a the second terminal of the capacitor CscH, is connected with the power source Vs that supplies the high level voltage (e.g., the voltage Vs in
A source of the transistor Ys and a drain of the transistor Yg are coupled to the upper input terminal (A) of the scan circuit 411a. A drain of the transistor Ys is connected with the power source Vs and a source of the transistor Yg is connected with the ground terminal (e.g., 0V). In another embodiment, a diode Ds is connected between the upper input terminal (A) of the scan circuit 411a and the source of the transistor Ys. Namely, an anode of the diode Ds is connected with the source of the transistor Ys, and a cathode of the diode Ds is connected with the upper input terminal (A) of the scan circuit 411a. When the transistor Yrr is turned on, the diode Ds cuts off a current path formed to the power source Vs through the body diode of the transistor Ys. In another embodiment, the diode Ds may be connected between the power source Vs and the transistor Ys.
The sustain driver 413 may further include a power recovery circuit (not shown) that may be connected to a contact between the two transistors Ys and Yg and recover reactive power of the sustain pulses to re-use it. An exemplary power recovery circuit is disclosed in U.S. Pat. Nos. 4,866,349 and 5,081,400 by L. F. Weber.
The operation of the scan electrode driving circuit 410 as shown in
During the rising period of the reset period, the transistor Yrr is turned on and the transistor Ys is turned off. Then, as shown in
In the falling period of the reset period, the transistors Yfr and Scl are turned on, and the transistors Yrr and Sch are turned off. Then, as shown in
Referring to
During the sustain period, the transistor Scl is turned off and the transistor Ys is turned on. Then, as shown in
Thereafter, during the sustain period, the transistor Ys is turned off, and the transistor Yg is turned on. Then, as shown in
During the sustain period, the operation as shown in
While this invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
As described above, the plasma display device and its driving method according to embodiments of the present invention, use reduced number of transistors for driving the scan electrodes. Accordingly, the cost of the driving circuit that drives the scan electrodes can be reduced.
Number | Date | Country | Kind |
---|---|---|---|
10-2007-0077725 | Aug 2007 | KR | national |