The present invention relates to a plasma display device in which a plasma display panel is used as a display device.
The plasma display panels (hereinafter also referred to as “panel”) conventionally for use in a plasma display device are roughly classified into an AC type and a DC type having different driving methods. The panels also fall into two types having different discharge systems: a surface discharge type and an opposite discharge type. The current mainstream of the panels is the surface discharge type having a three-electrode structure because this type has higher definition, a larger screen, and simpler manufacturing method.
A surface discharge plasma display panel is structured so that a pair of substrates having a transparent one at least on the front side thereof is faced to each other to form a discharge space therebetween. Further, barrier ribs for partitioning the discharge space into a plurality of spaces are formed on the substrates. Electrode groups are formed on each of the substrates so that discharge occurs in the discharge space partitioned by the barrier ribs. Further, phosphor layers that emit red, green, or blue light are provided in the discharge space. Thus, a plurality of discharge cells is formed. The phosphors are excited by vacuum ultraviolet light that has a short wavelength and is generated by the discharge. Then, the discharge cells having phosphors for emitting red, green, and blue light (red discharge cells, green discharge cells, and blue discharge cells) generate red, green, and blue visible light, respectively. Thus, color display is provided in the panel.
Such a plasma display panel can provide faster display and a larger viewing angle than a liquid crystal panel. The screen size thereof can be increased more easily. Further, the plasma display panel is the self-luminous type, and thus has high display quality. For these reasons, recently, the plasma display panel has been drawing attention particularly among flat panel displays and finding a wide rage of applications, as a display device in a place many people gather or a display device with which people enjoy images on a large screen at home.
In a conventional plasma display device, a panel is held on the front side of a chassis member, and a circuit board is disposed on the rear side of the chassis member. Thus, a module is formed. The panel is predominantly made of glass, and the chassis member is made of a metal, such as aluminum. The circuit board constitutes a driver circuit for causing the panel to emit light. With advancement of increasing the screen size and definition of a plasma display device, popularization in household thereof increases demand for higher image quality and lower power consumption. A conventional panel and a plasma display device using the panel are disclosed in Japanese Patent Unexamined Publication No. 2003-131580 (Patent Document 1), for example.
The present invention provides a plasma display device having higher image quality and lower power consumption.
A plasma display device includes a plasma display panel and data drivers. The plasma display panel includes a front substrate and a rear substrate faced to each other to form a discharge space therebetween. The front substrate includes a plurality of display electrodes, each made of a scan electrode and a sustain electrode. The rear substrate includes a plurality of data electrodes intersected with the display electrodes. Discharges cells are formed at the intersections of the display electrodes and data electrodes. The data drivers are coupled to the data electrodes to supply voltage thereto. Further, the data electrodes have a plurality of main electrode parts provided in portions facing the display electrodes, and wiring parts that connect the plurality of main electrode parts together and are narrower than the main electrode parts. Further, each of the main electrode parts is disposed so that the ends thereof in the longitudinal direction of the data electrode substantially correspond to the furthest separated long sides of the scan electrode and the sustain electrode in the discharge cell. This structure can provide a plasma display device having higher image quality and lower power consumption.
Hereinafter, a description of a plasma display device in accordance with the exemplary embodiment of the present invention is provided, with reference to
First, a description of a structure of a plasma display panel for use in the plasma display device is provided, with reference to
Front panel 31 is structured in the following manner. Display electrodes 62, each made of scan electrode 3 and sustain electrode 4, are disposed in a plurality of rows, on front substrate 1 made of glass. Sustain electrodes 3 and sustain electrodes 4 constituting display electrodes 62 are disposed in parallel with each other via discharge gaps 64. Dielectric layer 5 made of a glass material is formed to cover scan electrodes 3 and sustain electrodes 4. Further, protective layer 6 made of magnesium oxide (MgO) is formed on dielectric layer 5. In this manner, front panel 31 is formed. Further, each scan electrode 3 has transparent electrode 3a, and bus electrode 3b formed on transparent electrode 3a. Similarly, each sustain electrode 4 has transparent electrode 4a, and bus electrode 4b formed on transparent electrode 4a. Transparent electrodes 3a and 4a are made of indium tin oxide (ITO) or other materials, and are optically transparent. Bus electrodes 3b and 4b are predominantly made of a conductive material, such as silver (Ag).
Rear panel 32 is structured in the following manner. A plurality of data electrodes 8 made of a conductive material, such as silver (Ag), are disposed in a stripe pattern on glass rear substrate 2 faced to front substrate 1. Data electrodes 8 are covered with insulating layer 7 made of a glass material. Further formed on insulating layer 7 are barrier ribs 9 made of glass material in a double cross or grid pattern. Barrier ribs 9 are provided to partition discharge space 60 for each discharge cell 61. Further, phosphor layers 10 of red (R), green (G), or blue (B) are provided over the surface of insulating layer 7 between barrier ribs 9 and the side faces of barrier ribs 9. In this manner, rear panel 32 is formed. Front substrate 1 and rear substrate 2 are faced to each other so that data electrodes 8 are intersected with scan electrodes 3 and sustain electrodes 4. Thus, discharge cells 61 partitioned by barrier ribs 9 are formed at the intersections between scan electrodes 3 and sustain electrodes 4, and data electrodes 8.
Further, black light-block layer 33 having high light-blocking effect may be provided between display electrodes 62 and adjacent display electrodes 62 to improve the contrast.
The structure of panel 11 is not limited to the above. For example, panel 11 may be structured to have barrier ribs 9 in a stripe pattern.
As shown in
With reference to
Next, a description of the driving voltage waveforms for driving panel 11 and the operation of panel 11 is provided, with reference to
In a method of driving plasma display device 63, one field period is divided into a plurality of sub-fields, and each sub-field has a initializing period, an address period, and a sustain period.
In the initializing period in the first sub-field, at first, data electrodes D1 to Dm and sustain electrodes SU1 to SUn are kept at 0 (V). Applied to scan electrodes SC1 to SCn at this time is ramp voltage Vi12 that gradually increases from voltage Vi1 (V) of a breakdown voltage or lower to voltage Vi2 (V) exceeding the breakdown voltage. This application causes the first weak initializing discharge in all discharge cells 61, and accumulates negative wall voltage on scan electrodes SC1 to SCn. At this time, positive wall voltage is accumulated on sustain electrodes SU1 to SUn and data electrodes D1 to Dm. Now, the wall voltage on the electrodes indicates the voltage generated by the wall charge accumulated on dielectric layer 5, phosphor layers 10, or the like covering the electrodes.
Thereafter, sustain electrodes SU1 to SUn are kept at positive voltage Vh (V). Applied to scan electrodes SC1 to SCn is ramp voltage Vi34 gradually decreasing from voltage Vi3 (V) to voltage Vi4 (V). This application causes the second weak initializing discharge in all discharge cells 61, and weakens the wall voltage on scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn. Further, the wall voltage on data electrodes D1 to Dm is adjusted to a value appropriate for addressing operation.
Next, in the address period in the first sub-field, scan electrodes SC1 to SCn are held at voltage Vr (V) once. Then, negative scan pulse voltage Va (V) is applied to scan electrode SC1 in the first row. Positive address pulse voltage Vd (V) is applied to data electrode Dk (k=1 to m) of discharge cell 61′to be lit in the first row among data electrodes D1 to Dm. At this time, the voltage at the intersection of data electrode Dk and scan electrode SC1 amounts to the addition of externally applied voltage (Vd−Va) (V) and the wall voltage on data electrode Dk and scan electrode SC1, thus exceeding the breakdown voltage. Then, addressing discharge occurs between data electrode Dk and scan electrode SC1, and between sustain electrode SU1 and scan electrode SC1. Thus, in discharge cell 61 having generated addressing discharge, positive wall voltage is accumulated on scan electrode SC1, negative wall voltage is accumulated on sustain electrode SU1, and negative wall voltage is accumulated on data electrode Dk.
In this manner, the addressing operation is performed so that addressing discharge occurs in discharge cells 61 to be lit in the first row, and wall voltage is accumulated on the corresponding electrodes. On the other hand, the voltage at the intersections between data electrodes D1 to Dm to which no address pulse voltage Vd (V) is applied and scan electrode SC1 does not exceed the breakdown voltage, thus causing no addressing discharge. Similarly, the addressing operation is sequentially performed on discharge cells 61 in the second row to n-th row. Thus, the address period in the first sub-field is completed.
Next, in the sustain period in the first sub-field, positive sustain pulse voltage Vs (V) is applied to scan electrodes SC1 to SCn, as a first voltage. Then, a ground voltage, i.e. 0 (V), is applied to sustain electrodes SU1 to SUn, as a second voltage. At this time, in discharge cell 61 having generated addressing discharge in the address period, the voltage between scan electrode SCi and sustain electrode SUi amounts to the addition of scan pulse voltage Vs (V) and the wall voltage on scan electrode SCi and sustain electrode SUi, thus exceeding the breakdown voltage. Thereby, sustaining discharge occurs between scan electrode SCi and sustain electrode SUi, and the ultraviolet light generated by the sustaining discharge excites phosphor layers 10 so that they emit light. Then, negative wall voltage is accumulated on scan electrode SCi and positive wall voltage is accumulated on sustain electrode SUi. At the same time, positive wall voltage also accumulates on data electrode Dk.
In discharge cells 61 having generated no addressing discharge in the address period, no sustaining discharge occurs and the wall voltage at the completion of the initializing period is kept. Successively, the second voltage, i.e. 0 (V), is applied to scan electrodes SC1 to SCn. At the same time, the first voltage, i.e. sustain pulse voltage Vs (V), is applied to sustain electrodes SU1 to SUn. Thus, in discharge cells 61 having generated sustaining discharge before, the voltage between sustain electrode SUi and scan electrode SCi exceeds the breakdown voltage. As a result, sustaining discharge occurs between sustain electrode SUi and scan electrode SCi again. Negative wall voltage is accumulated on sustain electrode SUi, and positive wall voltage is accumulated on scan electrode SCi.
Thereafter, sustain pulse voltage Vs (V) in the number corresponding to the brightness weight is alternately applied to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, in a similar manner. This application allows continuous sustaining discharge in discharge cells 61 having generated addressing discharge in the address period. Thus, the sustaining operation in the sustain period is completed.
In the succeeding second sub-field, the operation is performed in the initializing period, address period, and sustain period, in a manner substantially similar to the first sub-field. The operation in the third sub-field and thereafter is performed in a similar manner. Thus, the description is omitted.
Next, the structure of panel 11 in plasma display device 63 of the present invention is further detailed, with reference to
With reference to
As shown in
Further, each main electrode part 8a has ends 20 in the longitudinal direction of data electrode 8. Ends 20 are substantially aligned with long side 21 of scan electrode 3 and long side 22 of sustain electrode 4. Long side 21 and long side 22 are the long sides of a pair of scan electrode 3 and sustain electrode 4, respectively, in each discharge cell 61. Long side 21 and long side 22 are the long side of scan electrode 3 and the long side of sustain electrode 4, respectively, on the sides separated at the furthest distance in discharge cell 61.
As the length of main electrode part 8a (the length along the longitudinal direction of data electrode 8) increases, the data current increases. In contrast, as the length of main electrode part 8a decreases, the address pulse voltage necessary for addressing discharge increases, and thus addressing operation is destabilized. For this reason, a structure in which ends 20 of each main electrode part 8a are substantially aligned with long side 21 of scan electrode 3 and long side 22 of sustain electrode 4 allows addressing operation with fewer failures. This structure can also decrease the data current flowing through the data electrodes during addressing operation, and 5 thus provide a plasma display device having higher image quality and lower power consumption.
To provide such an advantage, preferably, positional deviation amount L1 between end 20 of main electrode part 8a and long side 21 of scan electrode 3 is 50 μm or smaller, and positional deviation amount L2 between end 20 and long side 22 of scan electrode 4 is 50 μm or smaller.
Further, ends 20 of main electrode part 8a need not be substantially aligned with long side 21 of scan electrode 3 and long side 22 of sustain electrode 4 in every discharge cell 61 of panel 11 having a large screen. The variation may vary between discharge cells 61 of panel 11. In short, the structure of the panel designed according to the idea that ends 20 of each main electrode part 8a are substantially aligned with long side 21 of scan electrode 3 and long side 22 of sustain electrode 4 can satisfy the structure of the present invention.
Further, as shown in
However, chamfered corners 20a are unlikely to peel off when data electrode 8 is formed, and can secure the driving margin during addressing operation. Further, breakage of insulating layer 7 during the aging process can be inhibited.
As shown in
In the present invention, each data electrode 8 includes main electrode parts 8a wider than wiring parts 8b, in portions faced to scan electrodes 3 and sustain electrodes 4. Further, ends 20 of each main electrode part 8a are substantially aligned with long side 21 of scan electrode 3 and long side 22 of sustain electrode 4. In other words, because the width of wiring part 8b is smaller than the width of main electrode part 8a to be used for discharge in panel 11, the data current is reduced. According to experimental results, a data current of approximately 230 mA flows when the width of each data electrode 8 is approximately 140 μm and constant. In contrast, when each main electrode part 8a is approximately 140 μm wide and each wiring part 8b is approximately 80 μm wide, a data current of approximately 200 mA flows. Thus, the data current can be reduced. This structure can provide plasma display device 63 in which a smaller load is imposed on the circuit of data drivers 13a, even with the use of the single scan system.
As described above, in plasma display device 63 of the present invention, the data current flowing through data electrodes 8 during addressing operation is reduced. Thus, plasma display device 63 having higher image quality and lower power consumption can be provided.
Further, because data drivers 13a for supplying voltage to data electrodes 8 of panel 11 are coupled only to one ends of data electrodes 8, the number of data drivers 13a can be reduced in a higher-definition panel 11. Thus, plasma display device 63 having a lower cost can be provided.
Further, the width of data electrodes 8 in central portion 11b of panel 11 may be different from the width of data electrodes 8 in peripheral portion 11c of panel 11. Hereinafter, a description of this structure is provided, with reference to
With reference to
As shown in
As shown in
Further, as shown in
As described above, widths Wb2 and Wg2 of main electrode parts 8a corresponding to blue (B) and green (G) in peripheral portion 11c of panel 11 are set larger than widths Wb1 and Wg1 of main electrode parts 8a in central portion 11b of panel 11, respectively (Wg1<Wg2, and Wb1<Wb2). This structure can reduce addressing failures caused by charge decreasing during addressing operation. In other words, in the addressing step of selecting discharge cells 61 to be lit, addressing operation is performed with fewer failures. As a result, plasma display panel 63 having higher image quality can be provided.
Peripheral portion 11c of panel 11 may be provided to correspond to the areas in which addressing failures are more likely to be caused by charge decreasing during addressing operation. For example, peripheral portion 11c of panel 11 may be set to areas within 5% of the (vertical) length of the display area of panel 11 from the top end and bottom end of the display area.
In the above description, panel 11 has third area 43 formed between first area 41 and second area 42. However, when main electrode parts 8a in first area 41 have a small difference in width (10 μm or smaller, for example) from main electrode parts 8a in second area 42, third area 43 may be eliminated.
As described above, the present invention can provide plasma display device 63 having higher image quality, lower power consumption, and lower cost.
As described above, the present invention can provide a plasma display device having higher image quality and lower power consumption, and is useful for various kinds of display devices.
Number | Date | Country | Kind |
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2006-051741 | Feb 2006 | JP | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/JP2007/053563 | 2/27/2007 | WO | 00 | 3/31/2008 |